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pc: ACPI BIOS: implement memory hotplug interface
[qemu/ar7.git] / hw / i386 / acpi-build.c
blob6ff7fa398075895eb9d4fc50019039d9872ecaa5
1 /* Support for generating ACPI tables and passing them to Guests
2 *
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 * Copyright (C) 2006 Fabrice Bellard
5 * Copyright (C) 2013 Red Hat Inc
6 *
7 * Author: Michael S. Tsirkin <mst@redhat.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #include "acpi-build.h"
24 #include <stddef.h>
25 #include <glib.h>
26 #include "qemu-common.h"
27 #include "qemu/bitmap.h"
28 #include "qemu/range.h"
29 #include "hw/pci/pci.h"
30 #include "qom/cpu.h"
31 #include "hw/i386/pc.h"
32 #include "target-i386/cpu.h"
33 #include "hw/timer/hpet.h"
34 #include "hw/i386/acpi-defs.h"
35 #include "hw/acpi/acpi.h"
36 #include "hw/nvram/fw_cfg.h"
37 #include "bios-linker-loader.h"
38 #include "hw/loader.h"
39 #include "hw/isa/isa.h"
40 #include "hw/acpi/memory_hotplug.h"
41
42 /* Supported chipsets: */
43 #include "hw/acpi/piix4.h"
44 #include "hw/acpi/pcihp.h"
45 #include "hw/i386/ich9.h"
46 #include "hw/pci/pci_bus.h"
47 #include "hw/pci-host/q35.h"
48
49 #include "hw/i386/q35-acpi-dsdt.hex"
50 #include "hw/i386/acpi-dsdt.hex"
51
52 #include "qapi/qmp/qint.h"
53 #include "qom/qom-qobject.h"
54
55 typedef struct AcpiCpuInfo {
56 DECLARE_BITMAP(found_cpus, ACPI_CPU_HOTPLUG_ID_LIMIT);
57 } AcpiCpuInfo;
58
59 typedef struct AcpiMcfgInfo {
60 uint64_t mcfg_base;
61 uint32_t mcfg_size;
62 } AcpiMcfgInfo;
63
64 typedef struct AcpiPmInfo {
65 bool s3_disabled;
66 bool s4_disabled;
67 uint8_t s4_val;
68 uint16_t sci_int;
69 uint8_t acpi_enable_cmd;
70 uint8_t acpi_disable_cmd;
71 uint32_t gpe0_blk;
72 uint32_t gpe0_blk_len;
73 uint32_t io_base;
74 } AcpiPmInfo;
75
76 typedef struct AcpiMiscInfo {
77 bool has_hpet;
78 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
79 const unsigned char *dsdt_code;
80 unsigned dsdt_size;
81 uint16_t pvpanic_port;
82 } AcpiMiscInfo;
83
84 typedef struct AcpiBuildPciBusHotplugState {
85 GArray *device_table;
86 GArray *notify_table;
87 struct AcpiBuildPciBusHotplugState *parent;
88 } AcpiBuildPciBusHotplugState;
89
90 static void acpi_get_dsdt(AcpiMiscInfo *info)
91 {
92 uint16_t *applesmc_sta;
93 Object *piix = piix4_pm_find();
94 Object *lpc = ich9_lpc_find();
95 assert(!!piix != !!lpc);
96
97 if (piix) {
98 info->dsdt_code = AcpiDsdtAmlCode;
99 info->dsdt_size = sizeof AcpiDsdtAmlCode;
100 applesmc_sta = piix_dsdt_applesmc_sta;
101 }
102 if (lpc) {
103 info->dsdt_code = Q35AcpiDsdtAmlCode;
104 info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
105 applesmc_sta = q35_dsdt_applesmc_sta;
106 }
107
108 /* Patch in appropriate value for AppleSMC _STA */
109 *(uint8_t *)(info->dsdt_code + *applesmc_sta) =
110 applesmc_find() ? 0x0b : 0x00;
111 }
112
113 static
114 int acpi_add_cpu_info(Object *o, void *opaque)
115 {
116 AcpiCpuInfo *cpu = opaque;
117 uint64_t apic_id;
118
119 if (object_dynamic_cast(o, TYPE_CPU)) {
120 apic_id = object_property_get_int(o, "apic-id", NULL);
121 assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
122
123 set_bit(apic_id, cpu->found_cpus);
124 }
125
126 object_child_foreach(o, acpi_add_cpu_info, opaque);
127 return 0;
128 }
129
130 static void acpi_get_cpu_info(AcpiCpuInfo *cpu)
131 {
132 Object *root = object_get_root();
133
134 memset(cpu->found_cpus, 0, sizeof cpu->found_cpus);
135 object_child_foreach(root, acpi_add_cpu_info, cpu);
136 }
137
138 static void acpi_get_pm_info(AcpiPmInfo *pm)
139 {
140 Object *piix = piix4_pm_find();
141 Object *lpc = ich9_lpc_find();
142 Object *obj = NULL;
143 QObject *o;
144
145 if (piix) {
146 obj = piix;
147 }
148 if (lpc) {
149 obj = lpc;
150 }
151 assert(obj);
152
153 /* Fill in optional s3/s4 related properties */
154 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
155 if (o) {
156 pm->s3_disabled = qint_get_int(qobject_to_qint(o));
157 } else {
158 pm->s3_disabled = false;
159 }
160 qobject_decref(o);
161 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL);
162 if (o) {
163 pm->s4_disabled = qint_get_int(qobject_to_qint(o));
164 } else {
165 pm->s4_disabled = false;
166 }
167 qobject_decref(o);
168 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL);
169 if (o) {
170 pm->s4_val = qint_get_int(qobject_to_qint(o));
171 } else {
172 pm->s4_val = false;
173 }
174 qobject_decref(o);
175
176 /* Fill in mandatory properties */
177 pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL);
178
179 pm->acpi_enable_cmd = object_property_get_int(obj,
180 ACPI_PM_PROP_ACPI_ENABLE_CMD,
181 NULL);
182 pm->acpi_disable_cmd = object_property_get_int(obj,
183 ACPI_PM_PROP_ACPI_DISABLE_CMD,
184 NULL);
185 pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE,
186 NULL);
187 pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK,
188 NULL);
189 pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
190 NULL);
191 }
192
193 static void acpi_get_misc_info(AcpiMiscInfo *info)
194 {
195 info->has_hpet = hpet_find();
196 info->pvpanic_port = pvpanic_port();
197 }
198
199 static void acpi_get_pci_info(PcPciInfo *info)
200 {
201 Object *pci_host;
202 bool ambiguous;
203
204 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
205 g_assert(!ambiguous);
206 g_assert(pci_host);
207
208 info->w32.begin = object_property_get_int(pci_host,
209 PCI_HOST_PROP_PCI_HOLE_START,
210 NULL);
211 info->w32.end = object_property_get_int(pci_host,
212 PCI_HOST_PROP_PCI_HOLE_END,
213 NULL);
214 info->w64.begin = object_property_get_int(pci_host,
215 PCI_HOST_PROP_PCI_HOLE64_START,
216 NULL);
217 info->w64.end = object_property_get_int(pci_host,
218 PCI_HOST_PROP_PCI_HOLE64_END,
219 NULL);
220 }
221
222 #define ACPI_BUILD_APPNAME "Bochs"
223 #define ACPI_BUILD_APPNAME6 "BOCHS "
224 #define ACPI_BUILD_APPNAME4 "BXPC"
225
226 #define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0)
227
228 #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables"
229 #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp"
230
231 static void
232 build_header(GArray *linker, GArray *table_data,
233 AcpiTableHeader *h, const char *sig, int len, uint8_t rev)
234 {
235 memcpy(&h->signature, sig, 4);
236 h->length = cpu_to_le32(len);
237 h->revision = rev;
238 memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6);
239 memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4);
240 memcpy(h->oem_table_id + 4, sig, 4);
241 h->oem_revision = cpu_to_le32(1);
242 memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4);
243 h->asl_compiler_revision = cpu_to_le32(1);
244 h->checksum = 0;
245 /* Checksum to be filled in by Guest linker */
246 bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE,
247 table_data->data, h, len, &h->checksum);
248 }
249
250 static inline GArray *build_alloc_array(void)
251 {
252 return g_array_new(false, true /* clear */, 1);
253 }
254
255 static inline void build_free_array(GArray *array)
256 {
257 g_array_free(array, true);
258 }
259
260 static inline void build_prepend_byte(GArray *array, uint8_t val)
261 {
262 g_array_prepend_val(array, val);
263 }
264
265 static inline void build_append_byte(GArray *array, uint8_t val)
266 {
267 g_array_append_val(array, val);
268 }
269
270 static inline void build_append_array(GArray *array, GArray *val)
271 {
272 g_array_append_vals(array, val->data, val->len);
273 }
274
275 static void GCC_FMT_ATTR(2, 3)
276 build_append_nameseg(GArray *array, const char *format, ...)
277 {
278 /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */
279 char s[] = "XXXX";
280 int len;
281 va_list args;
282
283 va_start(args, format);
284 len = vsnprintf(s, sizeof s, format, args);
285 va_end(args);
286
287 assert(len == 4);
288 g_array_append_vals(array, s, len);
289 }
290
291 /* 5.4 Definition Block Encoding */
292 enum {
293 PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */
294 PACKAGE_LENGTH_2BYTE_SHIFT = 4,
295 PACKAGE_LENGTH_3BYTE_SHIFT = 12,
296 PACKAGE_LENGTH_4BYTE_SHIFT = 20,
297 };
298
299 static void build_prepend_package_length(GArray *package, unsigned min_bytes)
300 {
301 uint8_t byte;
302 unsigned length = package->len;
303 unsigned length_bytes;
304
305 if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) {
306 length_bytes = 1;
307 } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) {
308 length_bytes = 2;
309 } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) {
310 length_bytes = 3;
311 } else {
312 length_bytes = 4;
313 }
314
315 /* Force length to at least min_bytes.
316 * This wastes memory but that's how bios did it.
317 */
318 length_bytes = MAX(length_bytes, min_bytes);
319
320 /* PkgLength is the length of the inclusive length of the data. */
321 length += length_bytes;
322
323 switch (length_bytes) {
324 case 1:
325 byte = length;
326 build_prepend_byte(package, byte);
327 return;
328 case 4:
329 byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT;
330 build_prepend_byte(package, byte);
331 length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1;
332 /* fall through */
333 case 3:
334 byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT;
335 build_prepend_byte(package, byte);
336 length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1;
337 /* fall through */
338 case 2:
339 byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT;
340 build_prepend_byte(package, byte);
341 length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1;
342 /* fall through */
343 }
344 /*
345 * Most significant two bits of byte zero indicate how many following bytes
346 * are in PkgLength encoding.
347 */
348 byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length;
349 build_prepend_byte(package, byte);
350 }
351
352 static void build_package(GArray *package, uint8_t op, unsigned min_bytes)
353 {
354 build_prepend_package_length(package, min_bytes);
355 build_prepend_byte(package, op);
356 }
357
358 static void build_extop_package(GArray *package, uint8_t op)
359 {
360 build_package(package, op, 1);
361 build_prepend_byte(package, 0x5B); /* ExtOpPrefix */
362 }
363
364 static void build_append_value(GArray *table, uint32_t value, int size)
365 {
366 uint8_t prefix;
367 int i;
368
369 switch (size) {
370 case 1:
371 prefix = 0x0A; /* BytePrefix */
372 break;
373 case 2:
374 prefix = 0x0B; /* WordPrefix */
375 break;
376 case 4:
377 prefix = 0x0C; /* DWordPrefix */
378 break;
379 default:
380 assert(0);
381 return;
382 }
383 build_append_byte(table, prefix);
384 for (i = 0; i < size; ++i) {
385 build_append_byte(table, value & 0xFF);
386 value = value >> 8;
387 }
388 }
389
390 static void build_append_int(GArray *table, uint32_t value)
391 {
392 if (value == 0x00) {
393 build_append_byte(table, 0x00); /* ZeroOp */
394 } else if (value == 0x01) {
395 build_append_byte(table, 0x01); /* OneOp */
396 } else if (value <= 0xFF) {
397 build_append_value(table, value, 1);
398 } else if (value <= 0xFFFF) {
399 build_append_value(table, value, 2);
400 } else {
401 build_append_value(table, value, 4);
402 }
403 }
404
405 static GArray *build_alloc_method(const char *name, uint8_t arg_count)
406 {
407 GArray *method = build_alloc_array();
408
409 build_append_nameseg(method, "%s", name);
410 build_append_byte(method, arg_count); /* MethodFlags: ArgCount */
411
412 return method;
413 }
414
415 static void build_append_and_cleanup_method(GArray *device, GArray *method)
416 {
417 uint8_t op = 0x14; /* MethodOp */
418
419 build_package(method, op, 0);
420
421 build_append_array(device, method);
422 build_free_array(method);
423 }
424
425 static void build_append_notify_target_ifequal(GArray *method,
426 GArray *target_name,
427 uint32_t value, int size)
428 {
429 GArray *notify = build_alloc_array();
430 uint8_t op = 0xA0; /* IfOp */
431
432 build_append_byte(notify, 0x93); /* LEqualOp */
433 build_append_byte(notify, 0x68); /* Arg0Op */
434 build_append_value(notify, value, size);
435 build_append_byte(notify, 0x86); /* NotifyOp */
436 build_append_array(notify, target_name);
437 build_append_byte(notify, 0x69); /* Arg1Op */
438
439 /* Pack it up */
440 build_package(notify, op, 1);
441
442 build_append_array(method, notify);
443
444 build_free_array(notify);
445 }
446
447 /* End here */
448 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
449
450 static inline void *acpi_data_push(GArray *table_data, unsigned size)
451 {
452 unsigned off = table_data->len;
453 g_array_set_size(table_data, off + size);
454 return table_data->data + off;
455 }
456
457 static unsigned acpi_data_len(GArray *table)
458 {
459 #if GLIB_CHECK_VERSION(2, 22, 0)
460 assert(g_array_get_element_size(table) == 1);
461 #endif
462 return table->len;
463 }
464
465 static void acpi_align_size(GArray *blob, unsigned align)
466 {
467 /* Align size to multiple of given size. This reduces the chance
468 * we need to change size in the future (breaking cross version migration).
469 */
470 g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
471 }
472
473 /* Set a value within table in a safe manner */
474 #define ACPI_BUILD_SET_LE(table, size, off, bits, val) \
475 do { \
476 uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \
477 memcpy(acpi_data_get_ptr(table, size, off, \
478 (bits) / BITS_PER_BYTE), \
479 &ACPI_BUILD_SET_LE_val, \
480 (bits) / BITS_PER_BYTE); \
481 } while (0)
482
483 static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
484 unsigned off, unsigned size)
485 {
486 assert(off + size > off);
487 assert(off + size <= table_size);
488 return table_data + off;
489 }
490
491 static inline void acpi_add_table(GArray *table_offsets, GArray *table_data)
492 {
493 uint32_t offset = cpu_to_le32(table_data->len);
494 g_array_append_val(table_offsets, offset);
495 }
496
497 /* FACS */
498 static void
499 build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info)
500 {
501 AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs);
502 memcpy(&facs->signature, "FACS", 4);
503 facs->length = cpu_to_le32(sizeof(*facs));
504 }
505
506 /* Load chipset information in FADT */
507 static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)
508 {
509 fadt->model = 1;
510 fadt->reserved1 = 0;
511 fadt->sci_int = cpu_to_le16(pm->sci_int);
512 fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);
513 fadt->acpi_enable = pm->acpi_enable_cmd;
514 fadt->acpi_disable = pm->acpi_disable_cmd;
515 /* EVT, CNT, TMR offset matches hw/acpi/core.c */
516 fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);
517 fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);
518 fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);
519 fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);
520 /* EVT, CNT, TMR length matches hw/acpi/core.c */
521 fadt->pm1_evt_len = 4;
522 fadt->pm1_cnt_len = 2;
523 fadt->pm_tmr_len = 4;
524 fadt->gpe0_blk_len = pm->gpe0_blk_len;
525 fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */
526 fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */
527 fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |
528 (1 << ACPI_FADT_F_PROC_C1) |
529 (1 << ACPI_FADT_F_SLP_BUTTON) |
530 (1 << ACPI_FADT_F_RTC_S4));
531 fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);
532 }
533
534
535 /* FADT */
536 static void
537 build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm,
538 unsigned facs, unsigned dsdt)
539 {
540 AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt));
541
542 fadt->firmware_ctrl = cpu_to_le32(facs);
543 /* FACS address to be filled by Guest linker */
544 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
545 ACPI_BUILD_TABLE_FILE,
546 table_data, &fadt->firmware_ctrl,
547 sizeof fadt->firmware_ctrl);
548
549 fadt->dsdt = cpu_to_le32(dsdt);
550 /* DSDT address to be filled by Guest linker */
551 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
552 ACPI_BUILD_TABLE_FILE,
553 table_data, &fadt->dsdt,
554 sizeof fadt->dsdt);
555
556 fadt_setup(fadt, pm);
557
558 build_header(linker, table_data,
559 (void *)fadt, "FACP", sizeof(*fadt), 1);
560 }
561
562 static void
563 build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu,
564 PcGuestInfo *guest_info)
565 {
566 int madt_start = table_data->len;
567
568 AcpiMultipleApicTable *madt;
569 AcpiMadtIoApic *io_apic;
570 AcpiMadtIntsrcovr *intsrcovr;
571 AcpiMadtLocalNmi *local_nmi;
572 int i;
573
574 madt = acpi_data_push(table_data, sizeof *madt);
575 madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS);
576 madt->flags = cpu_to_le32(1);
577
578 for (i = 0; i < guest_info->apic_id_limit; i++) {
579 AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic);
580 apic->type = ACPI_APIC_PROCESSOR;
581 apic->length = sizeof(*apic);
582 apic->processor_id = i;
583 apic->local_apic_id = i;
584 if (test_bit(i, cpu->found_cpus)) {
585 apic->flags = cpu_to_le32(1);
586 } else {
587 apic->flags = cpu_to_le32(0);
588 }
589 }
590 io_apic = acpi_data_push(table_data, sizeof *io_apic);
591 io_apic->type = ACPI_APIC_IO;
592 io_apic->length = sizeof(*io_apic);
593 #define ACPI_BUILD_IOAPIC_ID 0x0
594 io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID;
595 io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
596 io_apic->interrupt = cpu_to_le32(0);
597
598 if (guest_info->apic_xrupt_override) {
599 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
600 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
601 intsrcovr->length = sizeof(*intsrcovr);
602 intsrcovr->source = 0;
603 intsrcovr->gsi = cpu_to_le32(2);
604 intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */
605 }
606 for (i = 1; i < 16; i++) {
607 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
608 if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) {
609 /* No need for a INT source override structure. */
610 continue;
611 }
612 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
613 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
614 intsrcovr->length = sizeof(*intsrcovr);
615 intsrcovr->source = i;
616 intsrcovr->gsi = cpu_to_le32(i);
617 intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */
618 }
619
620 local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
621 local_nmi->type = ACPI_APIC_LOCAL_NMI;
622 local_nmi->length = sizeof(*local_nmi);
623 local_nmi->processor_id = 0xff; /* all processors */
624 local_nmi->flags = cpu_to_le16(0);
625 local_nmi->lint = 1; /* ACPI_LINT1 */
626
627 build_header(linker, table_data,
628 (void *)(table_data->data + madt_start), "APIC",
629 table_data->len - madt_start, 1);
630 }
631
632 /* Encode a hex value */
633 static inline char acpi_get_hex(uint32_t val)
634 {
635 val &= 0x0f;
636 return (val <= 9) ? ('0' + val) : ('A' + val - 10);
637 }
638
639 #include "hw/i386/ssdt-proc.hex"
640
641 /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
642 #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
643 #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4)
644 #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start)
645 #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start)
646 #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start)
647
648 /* 0x5B 0x82 DeviceOp PkgLength NameString */
649 #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
650 #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
651 #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
652 #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
653 #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
654 #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
655
656 #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)
657 #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
658 #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
659 #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
660
661 #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)
662 #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)
663 #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)
664 #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)
665
666 #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)
667 #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)
668 #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)
669 #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)
670
671 #include "hw/i386/ssdt-mem.hex"
672
673 /* 0x5B 0x82 DeviceOp PkgLength NameString DimmID */
674 #define ACPI_MEM_OFFSET_HEX (*ssdt_mem_name - *ssdt_mem_start + 2)
675 #define ACPI_MEM_OFFSET_ID (*ssdt_mem_id - *ssdt_mem_start + 7)
676 #define ACPI_MEM_SIZEOF (*ssdt_mem_end - *ssdt_mem_start)
677 #define ACPI_MEM_AML (ssdm_mem_aml + *ssdt_mem_start)
678
679 #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
680 #define ACPI_SSDT_HEADER_LENGTH 36
681
682 #include "hw/i386/ssdt-misc.hex"
683 #include "hw/i386/ssdt-pcihp.hex"
684
685 static void
686 build_append_notify_method(GArray *device, const char *name,
687 const char *format, int count)
688 {
689 int i;
690 GArray *method = build_alloc_method(name, 2);
691
692 for (i = 0; i < count; i++) {
693 GArray *target = build_alloc_array();
694 build_append_nameseg(target, format, i);
695 assert(i < 256); /* Fits in 1 byte */
696 build_append_notify_target_ifequal(method, target, i, 1);
697 build_free_array(target);
698 }
699
700 build_append_and_cleanup_method(device, method);
701 }
702
703 static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
704 {
705 unsigned devfn = PCI_DEVFN(slot, 0);
706
707 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
708 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
709 ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
710 ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
711 }
712
713 static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
714 {
715 unsigned devfn = PCI_DEVFN(slot, 0);
716
717 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
718 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
719 ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
720 }
721
722 static void patch_pcivga(int slot, uint8_t *ssdt_ptr)
723 {
724 unsigned devfn = PCI_DEVFN(slot, 0);
725
726 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
727 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);
728 ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;
729 }
730
731 static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)
732 {
733 unsigned devfn = PCI_DEVFN(slot, 0);
734
735 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
736 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);
737 ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;
738 }
739
740 /* Assign BSEL property to all buses. In the future, this can be changed
741 * to only assign to buses that support hotplug.
742 */
743 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
744 {
745 unsigned *bsel_alloc = opaque;
746 unsigned *bus_bsel;
747
748 if (bus->qbus.allow_hotplug) {
749 bus_bsel = g_malloc(sizeof *bus_bsel);
750
751 *bus_bsel = (*bsel_alloc)++;
752 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
753 bus_bsel, NULL);
754 }
755
756 return bsel_alloc;
757 }
758
759 static void acpi_set_pci_info(void)
760 {
761 PCIBus *bus = find_i440fx(); /* TODO: Q35 support */
762 unsigned bsel_alloc = 0;
763
764 if (bus) {
765 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
766 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
767 }
768 }
769
770 static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state,
771 AcpiBuildPciBusHotplugState *parent)
772 {
773 state->parent = parent;
774 state->device_table = build_alloc_array();
775 state->notify_table = build_alloc_array();
776 }
777
778 static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state)
779 {
780 build_free_array(state->device_table);
781 build_free_array(state->notify_table);
782 }
783
784 static void *build_pci_bus_begin(PCIBus *bus, void *parent_state)
785 {
786 AcpiBuildPciBusHotplugState *parent = parent_state;
787 AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child);
788
789 build_pci_bus_state_init(child, parent);
790
791 return child;
792 }
793
794 static void build_pci_bus_end(PCIBus *bus, void *bus_state)
795 {
796 AcpiBuildPciBusHotplugState *child = bus_state;
797 AcpiBuildPciBusHotplugState *parent = child->parent;
798 GArray *bus_table = build_alloc_array();
799 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
800 DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);
801 DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX);
802 DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX);
803 DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX);
804 uint8_t op;
805 int i;
806 QObject *bsel;
807 GArray *method;
808 bool bus_hotplug_support = false;
809
810 if (bus->parent_dev) {
811 op = 0x82; /* DeviceOp */
812 build_append_nameseg(bus_table, "S%.02X_",
813 bus->parent_dev->devfn);
814 build_append_byte(bus_table, 0x08); /* NameOp */
815 build_append_nameseg(bus_table, "_SUN");
816 build_append_value(bus_table, PCI_SLOT(bus->parent_dev->devfn), 1);
817 build_append_byte(bus_table, 0x08); /* NameOp */
818 build_append_nameseg(bus_table, "_ADR");
819 build_append_value(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) |
820 PCI_FUNC(bus->parent_dev->devfn), 4);
821 } else {
822 op = 0x10; /* ScopeOp */;
823 build_append_nameseg(bus_table, "PCI0");
824 }
825
826 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
827 if (bsel) {
828 build_append_byte(bus_table, 0x08); /* NameOp */
829 build_append_nameseg(bus_table, "BSEL");
830 build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
831 memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
832 } else {
833 /* No bsel - no slots are hot-pluggable */
834 memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable);
835 }
836
837 memset(slot_device_present, 0x00, sizeof slot_device_present);
838 memset(slot_device_system, 0x00, sizeof slot_device_present);
839 memset(slot_device_vga, 0x00, sizeof slot_device_vga);
840 memset(slot_device_qxl, 0x00, sizeof slot_device_qxl);
841
842 for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
843 DeviceClass *dc;
844 PCIDeviceClass *pc;
845 PCIDevice *pdev = bus->devices[i];
846 int slot = PCI_SLOT(i);
847
848 if (!pdev) {
849 continue;
850 }
851
852 set_bit(slot, slot_device_present);
853 pc = PCI_DEVICE_GET_CLASS(pdev);
854 dc = DEVICE_GET_CLASS(pdev);
855
856 if (pc->class_id == PCI_CLASS_BRIDGE_ISA || pc->is_bridge) {
857 set_bit(slot, slot_device_system);
858 }
859
860 if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
861 set_bit(slot, slot_device_vga);
862
863 if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
864 set_bit(slot, slot_device_qxl);
865 }
866 }
867
868 if (!dc->hotpluggable || pc->is_bridge) {
869 clear_bit(slot, slot_hotplug_enable);
870 }
871 }
872
873 /* Append Device object for each slot */
874 for (i = 0; i < PCI_SLOT_MAX; i++) {
875 bool can_eject = test_bit(i, slot_hotplug_enable);
876 bool present = test_bit(i, slot_device_present);
877 bool vga = test_bit(i, slot_device_vga);
878 bool qxl = test_bit(i, slot_device_qxl);
879 bool system = test_bit(i, slot_device_system);
880 if (can_eject) {
881 void *pcihp = acpi_data_push(bus_table,
882 ACPI_PCIHP_SIZEOF);
883 memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
884 patch_pcihp(i, pcihp);
885 bus_hotplug_support = true;
886 } else if (qxl) {
887 void *pcihp = acpi_data_push(bus_table,
888 ACPI_PCIQXL_SIZEOF);
889 memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
890 patch_pciqxl(i, pcihp);
891 } else if (vga) {
892 void *pcihp = acpi_data_push(bus_table,
893 ACPI_PCIVGA_SIZEOF);
894 memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
895 patch_pcivga(i, pcihp);
896 } else if (system) {
897 /* Nothing to do: system devices are in DSDT or in SSDT above. */
898 } else if (present) {
899 void *pcihp = acpi_data_push(bus_table,
900 ACPI_PCINOHP_SIZEOF);
901 memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
902 patch_pcinohp(i, pcihp);
903 }
904 }
905
906 if (bsel) {
907 method = build_alloc_method("DVNT", 2);
908
909 for (i = 0; i < PCI_SLOT_MAX; i++) {
910 GArray *notify;
911 uint8_t op;
912
913 if (!test_bit(i, slot_hotplug_enable)) {
914 continue;
915 }
916
917 notify = build_alloc_array();
918 op = 0xA0; /* IfOp */
919
920 build_append_byte(notify, 0x7B); /* AndOp */
921 build_append_byte(notify, 0x68); /* Arg0Op */
922 build_append_int(notify, 0x1U << i);
923 build_append_byte(notify, 0x00); /* NullName */
924 build_append_byte(notify, 0x86); /* NotifyOp */
925 build_append_nameseg(notify, "S%.02X_", PCI_DEVFN(i, 0));
926 build_append_byte(notify, 0x69); /* Arg1Op */
927
928 /* Pack it up */
929 build_package(notify, op, 0);
930
931 build_append_array(method, notify);
932
933 build_free_array(notify);
934 }
935
936 build_append_and_cleanup_method(bus_table, method);
937 }
938
939 /* Append PCNT method to notify about events on local and child buses.
940 * Add unconditionally for root since DSDT expects it.
941 */
942 if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) {
943 method = build_alloc_method("PCNT", 0);
944
945 /* If bus supports hotplug select it and notify about local events */
946 if (bsel) {
947 build_append_byte(method, 0x70); /* StoreOp */
948 build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
949 build_append_nameseg(method, "BNUM");
950 build_append_nameseg(method, "DVNT");
951 build_append_nameseg(method, "PCIU");
952 build_append_int(method, 1); /* Device Check */
953 build_append_nameseg(method, "DVNT");
954 build_append_nameseg(method, "PCID");
955 build_append_int(method, 3); /* Eject Request */
956 }
957
958 /* Notify about child bus events in any case */
959 build_append_array(method, child->notify_table);
960
961 build_append_and_cleanup_method(bus_table, method);
962
963 /* Append description of child buses */
964 build_append_array(bus_table, child->device_table);
965
966 /* Pack it up */
967 if (bus->parent_dev) {
968 build_extop_package(bus_table, op);
969 } else {
970 build_package(bus_table, op, 0);
971 }
972
973 /* Append our bus description to parent table */
974 build_append_array(parent->device_table, bus_table);
975
976 /* Also tell parent how to notify us, invoking PCNT method.
977 * At the moment this is not needed for root as we have a single root.
978 */
979 if (bus->parent_dev) {
980 build_append_byte(parent->notify_table, '^'); /* ParentPrefixChar */
981 build_append_byte(parent->notify_table, 0x2E); /* DualNamePrefix */
982 build_append_nameseg(parent->notify_table, "S%.02X_",
983 bus->parent_dev->devfn);
984 build_append_nameseg(parent->notify_table, "PCNT");
985 }
986 }
987
988 qobject_decref(bsel);
989 build_free_array(bus_table);
990 build_pci_bus_state_cleanup(child);
991 g_free(child);
992 }
993
994 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
995 {
996 ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin);
997
998 ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1);
999
1000 if (pci->w64.end || pci->w64.begin) {
1001 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1);
1002 ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin);
1003 ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1);
1004 ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin);
1005 } else {
1006 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0);
1007 }
1008 }
1009
1010 static void
1011 build_ssdt(GArray *table_data, GArray *linker,
1012 AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
1013 PcPciInfo *pci, PcGuestInfo *guest_info)
1014 {
1015 MachineState *machine = MACHINE(qdev_get_machine());
1016 uint32_t nr_mem = machine->ram_slots;
1017 unsigned acpi_cpus = guest_info->apic_id_limit;
1018 int ssdt_start = table_data->len;
1019 uint8_t *ssdt_ptr;
1020 int i;
1021
1022 /* The current AML generator can cover the APIC ID range [0..255],
1023 * inclusive, for VCPU hotplug. */
1024 QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
1025 g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT);
1026
1027 /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
1028 ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml));
1029 memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
1030 if (pm->s3_disabled) {
1031 ssdt_ptr[acpi_s3_name[0]] = 'X';
1032 }
1033 if (pm->s4_disabled) {
1034 ssdt_ptr[acpi_s4_name[0]] = 'X';
1035 } else {
1036 ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] =
1037 pm->s4_val;
1038 }
1039
1040 patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
1041
1042 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml),
1043 ssdt_isa_pest[0], 16, misc->pvpanic_port);
1044
1045 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml),
1046 ssdt_mctrl_nr_slots[0], 32, nr_mem);
1047
1048 {
1049 GArray *sb_scope = build_alloc_array();
1050 uint8_t op = 0x10; /* ScopeOp */
1051
1052 build_append_nameseg(sb_scope, "_SB_");
1053
1054 /* build Processor object for each processor */
1055 for (i = 0; i < acpi_cpus; i++) {
1056 uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF);
1057 memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF);
1058 proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4);
1059 proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i);
1060 proc[ACPI_PROC_OFFSET_CPUID1] = i;
1061 proc[ACPI_PROC_OFFSET_CPUID2] = i;
1062 }
1063
1064 /* build this code:
1065 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
1066 */
1067 /* Arg0 = Processor ID = APIC ID */
1068 build_append_notify_method(sb_scope, "NTFY", "CP%0.02X", acpi_cpus);
1069
1070 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */
1071 build_append_byte(sb_scope, 0x08); /* NameOp */
1072 build_append_nameseg(sb_scope, "CPON");
1073
1074 {
1075 GArray *package = build_alloc_array();
1076 uint8_t op;
1077
1078 /*
1079 * Note: The ability to create variable-sized packages was first introduced in ACPI 2.0. ACPI 1.0 only
1080 * allowed fixed-size packages with up to 255 elements.
1081 * Windows guests up to win2k8 fail when VarPackageOp is used.
1082 */
1083 if (acpi_cpus <= 255) {
1084 op = 0x12; /* PackageOp */
1085 build_append_byte(package, acpi_cpus); /* NumElements */
1086 } else {
1087 op = 0x13; /* VarPackageOp */
1088 build_append_int(package, acpi_cpus); /* VarNumElements */
1089 }
1090
1091 for (i = 0; i < acpi_cpus; i++) {
1092 uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00;
1093 build_append_byte(package, b);
1094 }
1095
1096 build_package(package, op, 2);
1097 build_append_array(sb_scope, package);
1098 build_free_array(package);
1099 }
1100
1101 if (nr_mem) {
1102 assert(nr_mem <= ACPI_MAX_RAM_SLOTS);
1103 /* build memory devices */
1104 for (i = 0; i < nr_mem; i++) {
1105 char id[3];
1106 uint8_t *mem = acpi_data_push(sb_scope, ACPI_MEM_SIZEOF);
1107
1108 snprintf(id, sizeof(id), "%02X", i);
1109 memcpy(mem, ACPI_MEM_AML, ACPI_MEM_SIZEOF);
1110 memcpy(mem + ACPI_MEM_OFFSET_HEX, id, 2);
1111 memcpy(mem + ACPI_MEM_OFFSET_ID, id, 2);
1112 }
1113
1114 /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) {
1115 * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ...
1116 */
1117 build_append_notify_method(sb_scope,
1118 stringify(MEMORY_SLOT_NOTIFY_METHOD),
1119 "MP%0.02X", nr_mem);
1120 }
1121
1122 {
1123 AcpiBuildPciBusHotplugState hotplug_state;
1124 Object *pci_host;
1125 PCIBus *bus = NULL;
1126 bool ambiguous;
1127
1128 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1129 if (!ambiguous && pci_host) {
1130 bus = PCI_HOST_BRIDGE(pci_host)->bus;
1131 }
1132
1133 build_pci_bus_state_init(&hotplug_state, NULL);
1134
1135 if (bus) {
1136 /* Scan all PCI buses. Generate tables to support hotplug. */
1137 pci_for_each_bus_depth_first(bus, build_pci_bus_begin,
1138 build_pci_bus_end, &hotplug_state);
1139 }
1140
1141 build_append_array(sb_scope, hotplug_state.device_table);
1142 build_pci_bus_state_cleanup(&hotplug_state);
1143 }
1144
1145 build_package(sb_scope, op, 3);
1146 build_append_array(table_data, sb_scope);
1147 build_free_array(sb_scope);
1148 }
1149
1150 build_header(linker, table_data,
1151 (void *)(table_data->data + ssdt_start),
1152 "SSDT", table_data->len - ssdt_start, 1);
1153 }
1154
1155 static void
1156 build_hpet(GArray *table_data, GArray *linker)
1157 {
1158 Acpi20Hpet *hpet;
1159
1160 hpet = acpi_data_push(table_data, sizeof(*hpet));
1161 /* Note timer_block_id value must be kept in sync with value advertised by
1162 * emulated hpet
1163 */
1164 hpet->timer_block_id = cpu_to_le32(0x8086a201);
1165 hpet->addr.address = cpu_to_le64(HPET_BASE);
1166 build_header(linker, table_data,
1167 (void *)hpet, "HPET", sizeof(*hpet), 1);
1168 }
1169
1170 typedef enum {
1171 MEM_AFFINITY_NOFLAGS = 0,
1172 MEM_AFFINITY_ENABLED = (1 << 0),
1173 MEM_AFFINITY_HOTPLUGGABLE = (1 << 1),
1174 MEM_AFFINITY_NON_VOLATILE = (1 << 2),
1175 } MemoryAffinityFlags;
1176
1177 static void
1178 acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
1179 uint64_t len, int node, MemoryAffinityFlags flags)
1180 {
1181 numamem->type = ACPI_SRAT_MEMORY;
1182 numamem->length = sizeof(*numamem);
1183 memset(numamem->proximity, 0, 4);
1184 numamem->proximity[0] = node;
1185 numamem->flags = cpu_to_le32(flags);
1186 numamem->base_addr = cpu_to_le64(base);
1187 numamem->range_length = cpu_to_le64(len);
1188 }
1189
1190 static void
1191 build_srat(GArray *table_data, GArray *linker,
1192 AcpiCpuInfo *cpu, PcGuestInfo *guest_info)
1193 {
1194 AcpiSystemResourceAffinityTable *srat;
1195 AcpiSratProcessorAffinity *core;
1196 AcpiSratMemoryAffinity *numamem;
1197
1198 int i;
1199 uint64_t curnode;
1200 int srat_start, numa_start, slots;
1201 uint64_t mem_len, mem_base, next_base;
1202
1203 srat_start = table_data->len;
1204
1205 srat = acpi_data_push(table_data, sizeof *srat);
1206 srat->reserved1 = cpu_to_le32(1);
1207 core = (void *)(srat + 1);
1208
1209 for (i = 0; i < guest_info->apic_id_limit; ++i) {
1210 core = acpi_data_push(table_data, sizeof *core);
1211 core->type = ACPI_SRAT_PROCESSOR;
1212 core->length = sizeof(*core);
1213 core->local_apic_id = i;
1214 curnode = guest_info->node_cpu[i];
1215 core->proximity_lo = curnode;
1216 memset(core->proximity_hi, 0, 3);
1217 core->local_sapic_eid = 0;
1218 if (test_bit(i, cpu->found_cpus)) {
1219 core->flags = cpu_to_le32(1);
1220 } else {
1221 core->flags = cpu_to_le32(0);
1222 }
1223 }
1224
1225
1226 /* the memory map is a bit tricky, it contains at least one hole
1227 * from 640k-1M and possibly another one from 3.5G-4G.
1228 */
1229 next_base = 0;
1230 numa_start = table_data->len;
1231
1232 numamem = acpi_data_push(table_data, sizeof *numamem);
1233 acpi_build_srat_memory(numamem, 0, 640*1024, 0, MEM_AFFINITY_ENABLED);
1234 next_base = 1024 * 1024;
1235 for (i = 1; i < guest_info->numa_nodes + 1; ++i) {
1236 mem_base = next_base;
1237 mem_len = guest_info->node_mem[i - 1];
1238 if (i == 1) {
1239 mem_len -= 1024 * 1024;
1240 }
1241 next_base = mem_base + mem_len;
1242
1243 /* Cut out the ACPI_PCI hole */
1244 if (mem_base <= guest_info->ram_size_below_4g &&
1245 next_base > guest_info->ram_size_below_4g) {
1246 mem_len -= next_base - guest_info->ram_size_below_4g;
1247 if (mem_len > 0) {
1248 numamem = acpi_data_push(table_data, sizeof *numamem);
1249 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1,
1250 MEM_AFFINITY_ENABLED);
1251 }
1252 mem_base = 1ULL << 32;
1253 mem_len = next_base - guest_info->ram_size_below_4g;
1254 next_base += (1ULL << 32) - guest_info->ram_size_below_4g;
1255 }
1256 numamem = acpi_data_push(table_data, sizeof *numamem);
1257 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1,
1258 MEM_AFFINITY_ENABLED);
1259 }
1260 slots = (table_data->len - numa_start) / sizeof *numamem;
1261 for (; slots < guest_info->numa_nodes + 2; slots++) {
1262 numamem = acpi_data_push(table_data, sizeof *numamem);
1263 acpi_build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
1264 }
1265
1266 build_header(linker, table_data,
1267 (void *)(table_data->data + srat_start),
1268 "SRAT",
1269 table_data->len - srat_start, 1);
1270 }
1271
1272 static void
1273 build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info)
1274 {
1275 AcpiTableMcfg *mcfg;
1276 const char *sig;
1277 int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]);
1278
1279 mcfg = acpi_data_push(table_data, len);
1280 mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base);
1281 /* Only a single allocation so no need to play with segments */
1282 mcfg->allocation[0].pci_segment = cpu_to_le16(0);
1283 mcfg->allocation[0].start_bus_number = 0;
1284 mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1);
1285
1286 /* MCFG is used for ECAM which can be enabled or disabled by guest.
1287 * To avoid table size changes (which create migration issues),
1288 * always create the table even if there are no allocations,
1289 * but set the signature to a reserved value in this case.
1290 * ACPI spec requires OSPMs to ignore such tables.
1291 */
1292 if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) {
1293 /* Reserved signature: ignored by OSPM */
1294 sig = "QEMU";
1295 } else {
1296 sig = "MCFG";
1297 }
1298 build_header(linker, table_data, (void *)mcfg, sig, len, 1);
1299 }
1300
1301 static void
1302 build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
1303 {
1304 AcpiTableHeader *dsdt;
1305
1306 assert(misc->dsdt_code && misc->dsdt_size);
1307
1308 dsdt = acpi_data_push(table_data, misc->dsdt_size);
1309 memcpy(dsdt, misc->dsdt_code, misc->dsdt_size);
1310
1311 memset(dsdt, 0, sizeof *dsdt);
1312 build_header(linker, table_data, dsdt, "DSDT",
1313 misc->dsdt_size, 1);
1314 }
1315
1316 /* Build final rsdt table */
1317 static void
1318 build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets)
1319 {
1320 AcpiRsdtDescriptorRev1 *rsdt;
1321 size_t rsdt_len;
1322 int i;
1323
1324 rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len;
1325 rsdt = acpi_data_push(table_data, rsdt_len);
1326 memcpy(rsdt->table_offset_entry, table_offsets->data,
1327 sizeof(uint32_t) * table_offsets->len);
1328 for (i = 0; i < table_offsets->len; ++i) {
1329 /* rsdt->table_offset_entry to be filled by Guest linker */
1330 bios_linker_loader_add_pointer(linker,
1331 ACPI_BUILD_TABLE_FILE,
1332 ACPI_BUILD_TABLE_FILE,
1333 table_data, &rsdt->table_offset_entry[i],
1334 sizeof(uint32_t));
1335 }
1336 build_header(linker, table_data,
1337 (void *)rsdt, "RSDT", rsdt_len, 1);
1338 }
1339
1340 static GArray *
1341 build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
1342 {
1343 AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp);
1344
1345 bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 1,
1346 true /* fseg memory */);
1347
1348 memcpy(&rsdp->signature, "RSD PTR ", 8);
1349 memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6);
1350 rsdp->rsdt_physical_address = cpu_to_le32(rsdt);
1351 /* Address to be filled by Guest linker */
1352 bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE,
1353 ACPI_BUILD_TABLE_FILE,
1354 rsdp_table, &rsdp->rsdt_physical_address,
1355 sizeof rsdp->rsdt_physical_address);
1356 rsdp->checksum = 0;
1357 /* Checksum to be filled by Guest linker */
1358 bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE,
1359 rsdp, rsdp, sizeof *rsdp, &rsdp->checksum);
1360
1361 return rsdp_table;
1362 }
1363
1364 typedef
1365 struct AcpiBuildTables {
1366 GArray *table_data;
1367 GArray *rsdp;
1368 GArray *linker;
1369 } AcpiBuildTables;
1370
1371 static inline void acpi_build_tables_init(AcpiBuildTables *tables)
1372 {
1373 tables->rsdp = g_array_new(false, true /* clear */, 1);
1374 tables->table_data = g_array_new(false, true /* clear */, 1);
1375 tables->linker = bios_linker_loader_init();
1376 }
1377
1378 static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre)
1379 {
1380 void *linker_data = bios_linker_loader_cleanup(tables->linker);
1381 if (mfre) {
1382 g_free(linker_data);
1383 }
1384 g_array_free(tables->rsdp, mfre);
1385 g_array_free(tables->table_data, mfre);
1386 }
1387
1388 typedef
1389 struct AcpiBuildState {
1390 /* Copy of table in RAM (for patching). */
1391 uint8_t *table_ram;
1392 uint32_t table_size;
1393 /* Is table patched? */
1394 uint8_t patched;
1395 PcGuestInfo *guest_info;
1396 } AcpiBuildState;
1397
1398 static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
1399 {
1400 Object *pci_host;
1401 QObject *o;
1402 bool ambiguous;
1403
1404 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1405 g_assert(!ambiguous);
1406 g_assert(pci_host);
1407
1408 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL);
1409 if (!o) {
1410 return false;
1411 }
1412 mcfg->mcfg_base = qint_get_int(qobject_to_qint(o));
1413 qobject_decref(o);
1414
1415 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL);
1416 assert(o);
1417 mcfg->mcfg_size = qint_get_int(qobject_to_qint(o));
1418 qobject_decref(o);
1419 return true;
1420 }
1421
1422 static
1423 void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
1424 {
1425 GArray *table_offsets;
1426 unsigned facs, dsdt, rsdt;
1427 AcpiCpuInfo cpu;
1428 AcpiPmInfo pm;
1429 AcpiMiscInfo misc;
1430 AcpiMcfgInfo mcfg;
1431 PcPciInfo pci;
1432 uint8_t *u;
1433
1434 acpi_get_cpu_info(&cpu);
1435 acpi_get_pm_info(&pm);
1436 acpi_get_dsdt(&misc);
1437 acpi_get_misc_info(&misc);
1438 acpi_get_pci_info(&pci);
1439
1440 table_offsets = g_array_new(false, true /* clear */,
1441 sizeof(uint32_t));
1442 ACPI_BUILD_DPRINTF(3, "init ACPI tables\n");
1443
1444 bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE,
1445 64 /* Ensure FACS is aligned */,
1446 false /* high memory */);
1447
1448 /*
1449 * FACS is pointed to by FADT.
1450 * We place it first since it's the only table that has alignment
1451 * requirements.
1452 */
1453 facs = tables->table_data->len;
1454 build_facs(tables->table_data, tables->linker, guest_info);
1455
1456 /* DSDT is pointed to by FADT */
1457 dsdt = tables->table_data->len;
1458 build_dsdt(tables->table_data, tables->linker, &misc);
1459
1460 /* ACPI tables pointed to by RSDT */
1461 acpi_add_table(table_offsets, tables->table_data);
1462 build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt);
1463
1464 acpi_add_table(table_offsets, tables->table_data);
1465 build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci,
1466 guest_info);
1467
1468 acpi_add_table(table_offsets, tables->table_data);
1469 build_madt(tables->table_data, tables->linker, &cpu, guest_info);
1470
1471 if (misc.has_hpet) {
1472 acpi_add_table(table_offsets, tables->table_data);
1473 build_hpet(tables->table_data, tables->linker);
1474 }
1475 if (guest_info->numa_nodes) {
1476 acpi_add_table(table_offsets, tables->table_data);
1477 build_srat(tables->table_data, tables->linker, &cpu, guest_info);
1478 }
1479 if (acpi_get_mcfg(&mcfg)) {
1480 acpi_add_table(table_offsets, tables->table_data);
1481 build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
1482 }
1483
1484 /* Add tables supplied by user (if any) */
1485 for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
1486 unsigned len = acpi_table_len(u);
1487
1488 acpi_add_table(table_offsets, tables->table_data);
1489 g_array_append_vals(tables->table_data, u, len);
1490 }
1491
1492 /* RSDT is pointed to by RSDP */
1493 rsdt = tables->table_data->len;
1494 build_rsdt(tables->table_data, tables->linker, table_offsets);
1495
1496 /* RSDP is in FSEG memory, so allocate it separately */
1497 build_rsdp(tables->rsdp, tables->linker, rsdt);
1498
1499 /* We'll expose it all to Guest so align size to reduce
1500 * chance of size changes.
1501 * RSDP is small so it's easy to keep it immutable, no need to
1502 * bother with alignment.
1503 */
1504 acpi_align_size(tables->table_data, 0x1000);
1505
1506 acpi_align_size(tables->linker, 0x1000);
1507
1508 /* Cleanup memory that's no longer used. */
1509 g_array_free(table_offsets, true);
1510 }
1511
1512 static void acpi_build_update(void *build_opaque, uint32_t offset)
1513 {
1514 AcpiBuildState *build_state = build_opaque;
1515 AcpiBuildTables tables;
1516
1517 /* No state to update or already patched? Nothing to do. */
1518 if (!build_state || build_state->patched) {
1519 return;
1520 }
1521 build_state->patched = 1;
1522
1523 acpi_build_tables_init(&tables);
1524
1525 acpi_build(build_state->guest_info, &tables);
1526
1527 assert(acpi_data_len(tables.table_data) == build_state->table_size);
1528 memcpy(build_state->table_ram, tables.table_data->data,
1529 build_state->table_size);
1530
1531 acpi_build_tables_cleanup(&tables, true);
1532 }
1533
1534 static void acpi_build_reset(void *build_opaque)
1535 {
1536 AcpiBuildState *build_state = build_opaque;
1537 build_state->patched = 0;
1538 }
1539
1540 static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob,
1541 const char *name)
1542 {
1543 return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name,
1544 acpi_build_update, build_state);
1545 }
1546
1547 static const VMStateDescription vmstate_acpi_build = {
1548 .name = "acpi_build",
1549 .version_id = 1,
1550 .minimum_version_id = 1,
1551 .fields = (VMStateField[]) {
1552 VMSTATE_UINT8(patched, AcpiBuildState),
1553 VMSTATE_END_OF_LIST()
1554 },
1555 };
1556
1557 void acpi_setup(PcGuestInfo *guest_info)
1558 {
1559 AcpiBuildTables tables;
1560 AcpiBuildState *build_state;
1561
1562 if (!guest_info->fw_cfg) {
1563 ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n");
1564 return;
1565 }
1566
1567 if (!guest_info->has_acpi_build) {
1568 ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n");
1569 return;
1570 }
1571
1572 if (!acpi_enabled) {
1573 ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n");
1574 return;
1575 }
1576
1577 build_state = g_malloc0(sizeof *build_state);
1578
1579 build_state->guest_info = guest_info;
1580
1581 acpi_set_pci_info();
1582
1583 acpi_build_tables_init(&tables);
1584 acpi_build(build_state->guest_info, &tables);
1585
1586 /* Now expose it all to Guest */
1587 build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data,
1588 ACPI_BUILD_TABLE_FILE);
1589 build_state->table_size = acpi_data_len(tables.table_data);
1590
1591 acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader");
1592
1593 /*
1594 * RSDP is small so it's easy to keep it immutable, no need to
1595 * bother with ROM blobs.
1596 */
1597 fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE,
1598 tables.rsdp->data, acpi_data_len(tables.rsdp));
1599
1600 qemu_register_reset(acpi_build_reset, build_state);
1601 acpi_build_reset(build_state);
1602 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
1603
1604 /* Cleanup tables but don't free the memory: we track it
1605 * in build_state.
1606 */
1607 acpi_build_tables_cleanup(&tables, false);
1608 }
AR7 emulation for QEMU