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target-microblaze: Setup for 64bit addressing
[qemu/ar7.git]
/
linux-user
/
riscv
/
target_cpu.h
blob
c5549b1120c5398d5b455057f19455e53b23ba7a
1
#ifndef TARGET_CPU_H
2
#define TARGET_CPU_H
3
4
static
inline
void
cpu_clone_regs
(
CPURISCVState
*
env
,
target_ulong newsp
)
5
{
6
if
(
newsp
) {
7
env
->
gpr
[
xSP
] =
newsp
;
8
}
9
10
env
->
gpr
[
xA0
] =
0
;
11
}
12
13
static
inline
void
cpu_set_tls
(
CPURISCVState
*
env
,
target_ulong newtls
)
14
{
15
env
->
gpr
[
xTP
] =
newtls
;
16
}
17
18
#endif