hw/intc/nios2_iic.c

   1 /*
   2  * QEMU Altera Internal Interrupt Controller.
   3  *
   4  * Copyright (c) 2012 Chris Wulff <crwulff@gmail.com>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qemu/module.h"
  23 #include "qapi/error.h"
  24
  25 #include "hw/sysbus.h"
  26 #include "cpu.h"
  27
  28 #define TYPE_ALTERA_IIC "altera,iic"
  29 #define ALTERA_IIC(obj) \
  30     OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC)
  31
  32 typedef struct AlteraIIC {
  33     SysBusDevice  parent_obj;
  34     void         *cpu;
  35     qemu_irq      parent_irq;
  36 } AlteraIIC;
  37
  38 static void update_irq(AlteraIIC *pv)
  39 {
  40     CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  41
  42     qemu_set_irq(pv->parent_irq,
  43                  env->regs[CR_IPENDING] & env->regs[CR_IENABLE]);
  44 }
  45
  46 static void irq_handler(void *opaque, int irq, int level)
  47 {
  48     AlteraIIC *pv = opaque;
  49     CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  50
  51     env->regs[CR_IPENDING] &= ~(1 << irq);
  52     env->regs[CR_IPENDING] |= !!level << irq;
  53
  54     update_irq(pv);
  55 }
  56
  57 static void altera_iic_init(Object *obj)
  58 {
  59     AlteraIIC *pv = ALTERA_IIC(obj);
  60
  61     qdev_init_gpio_in(DEVICE(pv), irq_handler, 32);
  62     sysbus_init_irq(SYS_BUS_DEVICE(obj), &pv->parent_irq);
  63 }
  64
  65 static void altera_iic_realize(DeviceState *dev, Error **errp)
  66 {
  67     struct AlteraIIC *pv = ALTERA_IIC(dev);
  68     Error *err = NULL;
  69
  70     pv->cpu = object_property_get_link(OBJECT(dev), "cpu", &err);
  71     if (!pv->cpu) {
  72         error_setg(errp, "altera,iic: CPU link not found: %s",
  73                    error_get_pretty(err));
  74         return;
  75     }
  76 }
  77
  78 static void altera_iic_class_init(ObjectClass *klass, void *data)
  79 {
  80     DeviceClass *dc = DEVICE_CLASS(klass);
  81
  82     /* Reason: needs to be wired up, e.g. by nios2_10m50_ghrd_init() */
  83     dc->user_creatable = false;
  84     dc->realize = altera_iic_realize;
  85 }
  86
  87 static TypeInfo altera_iic_info = {
  88     .name          = "altera,iic",
  89     .parent        = TYPE_SYS_BUS_DEVICE,
  90     .instance_size = sizeof(AlteraIIC),
  91     .instance_init = altera_iic_init,
  92     .class_init    = altera_iic_class_init,
  93 };
  94
  95 static void altera_iic_register(void)
  96 {
  97     type_register_static(&altera_iic_info);
  98 }
  99
 100 type_init(altera_iic_register)