2 * Helpers for HPPA instructions.
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "exec/cpu_ldst.h"
25 #include "qemu/timer.h"
26 #include "sysemu/runstate.h"
27 #include "fpu/softfloat.h"
30 void QEMU_NORETURN
HELPER(excp
)(CPUHPPAState
*env
, int excp
)
32 CPUState
*cs
= env_cpu(env
);
34 cs
->exception_index
= excp
;
38 void QEMU_NORETURN
hppa_dynamic_excp(CPUHPPAState
*env
, int excp
, uintptr_t ra
)
40 CPUState
*cs
= env_cpu(env
);
42 cs
->exception_index
= excp
;
43 cpu_loop_exit_restore(cs
, ra
);
46 void HELPER(tsv
)(CPUHPPAState
*env
, target_ureg cond
)
48 if (unlikely((target_sreg
)cond
< 0)) {
49 hppa_dynamic_excp(env
, EXCP_OVERFLOW
, GETPC());
53 void HELPER(tcond
)(CPUHPPAState
*env
, target_ureg cond
)
56 hppa_dynamic_excp(env
, EXCP_COND
, GETPC());
60 static void atomic_store_3(CPUHPPAState
*env
, target_ulong addr
, uint32_t val
,
61 uint32_t mask
, uintptr_t ra
)
63 #ifdef CONFIG_USER_ONLY
64 uint32_t old
, new, cmp
;
66 uint32_t *haddr
= g2h(addr
- 1);
69 new = (old
& ~mask
) | (val
& mask
);
70 cmp
= atomic_cmpxchg(haddr
, old
, new);
77 /* FIXME -- we can do better. */
78 cpu_loop_exit_atomic(env_cpu(env
), ra
);
82 static void do_stby_b(CPUHPPAState
*env
, target_ulong addr
, target_ureg val
,
83 bool parallel
, uintptr_t ra
)
87 cpu_stb_data_ra(env
, addr
, val
, ra
);
90 cpu_stw_data_ra(env
, addr
, val
, ra
);
93 /* The 3 byte store must appear atomic. */
95 atomic_store_3(env
, addr
, val
, 0x00ffffffu
, ra
);
97 cpu_stb_data_ra(env
, addr
, val
>> 16, ra
);
98 cpu_stw_data_ra(env
, addr
+ 1, val
, ra
);
102 cpu_stl_data_ra(env
, addr
, val
, ra
);
107 void HELPER(stby_b
)(CPUHPPAState
*env
, target_ulong addr
, target_ureg val
)
109 do_stby_b(env
, addr
, val
, false, GETPC());
112 void HELPER(stby_b_parallel
)(CPUHPPAState
*env
, target_ulong addr
,
115 do_stby_b(env
, addr
, val
, true, GETPC());
118 static void do_stby_e(CPUHPPAState
*env
, target_ulong addr
, target_ureg val
,
119 bool parallel
, uintptr_t ra
)
123 /* The 3 byte store must appear atomic. */
125 atomic_store_3(env
, addr
- 3, val
, 0xffffff00u
, ra
);
127 cpu_stw_data_ra(env
, addr
- 3, val
>> 16, ra
);
128 cpu_stb_data_ra(env
, addr
- 1, val
>> 8, ra
);
132 cpu_stw_data_ra(env
, addr
- 2, val
>> 16, ra
);
135 cpu_stb_data_ra(env
, addr
- 1, val
>> 24, ra
);
138 /* Nothing is stored, but protection is checked and the
139 cacheline is marked dirty. */
140 probe_write(env
, addr
, 0, cpu_mmu_index(env
, 0), ra
);
145 void HELPER(stby_e
)(CPUHPPAState
*env
, target_ulong addr
, target_ureg val
)
147 do_stby_e(env
, addr
, val
, false, GETPC());
150 void HELPER(stby_e_parallel
)(CPUHPPAState
*env
, target_ulong addr
,
153 do_stby_e(env
, addr
, val
, true, GETPC());
156 target_ureg
HELPER(probe
)(CPUHPPAState
*env
, target_ulong addr
,
157 uint32_t level
, uint32_t want
)
159 #ifdef CONFIG_USER_ONLY
160 return page_check_range(addr
, 1, want
);
165 trace_hppa_tlb_probe(addr
, level
, want
);
166 /* Fail if the requested privilege level is higher than current. */
167 if (level
< (env
->iaoq_f
& 3)) {
171 excp
= hppa_get_physical_address(env
, addr
, level
, 0, &phys
, &prot
);
173 if (env
->psw
& PSW_Q
) {
174 /* ??? Needs tweaking for hppa64. */
175 env
->cr
[CR_IOR
] = addr
;
176 env
->cr
[CR_ISR
] = addr
>> 32;
178 if (excp
== EXCP_DTLB_MISS
) {
179 excp
= EXCP_NA_DTLB_MISS
;
181 hppa_dynamic_excp(env
, excp
, GETPC());
183 return (want
& prot
) != 0;
187 void HELPER(loaded_fr0
)(CPUHPPAState
*env
)
189 uint32_t shadow
= env
->fr
[0] >> 32;
192 env
->fr0_shadow
= shadow
;
194 switch (extract32(shadow
, 9, 2)) {
196 rm
= float_round_nearest_even
;
199 rm
= float_round_to_zero
;
205 rm
= float_round_down
;
208 set_float_rounding_mode(rm
, &env
->fp_status
);
210 d
= extract32(shadow
, 5, 1);
211 set_flush_to_zero(d
, &env
->fp_status
);
212 set_flush_inputs_to_zero(d
, &env
->fp_status
);
215 void cpu_hppa_loaded_fr0(CPUHPPAState
*env
)
217 helper_loaded_fr0(env
);
220 #define CONVERT_BIT(X, SRC, DST) \
222 ? (X) / ((SRC) / (DST)) & (DST) \
223 : ((X) & (SRC)) * ((DST) / (SRC)))
225 static void update_fr0_op(CPUHPPAState
*env
, uintptr_t ra
)
227 uint32_t soft_exp
= get_float_exception_flags(&env
->fp_status
);
228 uint32_t hard_exp
= 0;
229 uint32_t shadow
= env
->fr0_shadow
;
231 if (likely(soft_exp
== 0)) {
232 env
->fr
[0] = (uint64_t)shadow
<< 32;
235 set_float_exception_flags(0, &env
->fp_status
);
237 hard_exp
|= CONVERT_BIT(soft_exp
, float_flag_inexact
, 1u << 0);
238 hard_exp
|= CONVERT_BIT(soft_exp
, float_flag_underflow
, 1u << 1);
239 hard_exp
|= CONVERT_BIT(soft_exp
, float_flag_overflow
, 1u << 2);
240 hard_exp
|= CONVERT_BIT(soft_exp
, float_flag_divbyzero
, 1u << 3);
241 hard_exp
|= CONVERT_BIT(soft_exp
, float_flag_invalid
, 1u << 4);
242 shadow
|= hard_exp
<< (32 - 5);
243 env
->fr0_shadow
= shadow
;
244 env
->fr
[0] = (uint64_t)shadow
<< 32;
246 if (hard_exp
& shadow
) {
247 hppa_dynamic_excp(env
, EXCP_ASSIST
, ra
);
251 float32
HELPER(fsqrt_s
)(CPUHPPAState
*env
, float32 arg
)
253 float32 ret
= float32_sqrt(arg
, &env
->fp_status
);
254 update_fr0_op(env
, GETPC());
258 float32
HELPER(frnd_s
)(CPUHPPAState
*env
, float32 arg
)
260 float32 ret
= float32_round_to_int(arg
, &env
->fp_status
);
261 update_fr0_op(env
, GETPC());
265 float32
HELPER(fadd_s
)(CPUHPPAState
*env
, float32 a
, float32 b
)
267 float32 ret
= float32_add(a
, b
, &env
->fp_status
);
268 update_fr0_op(env
, GETPC());
272 float32
HELPER(fsub_s
)(CPUHPPAState
*env
, float32 a
, float32 b
)
274 float32 ret
= float32_sub(a
, b
, &env
->fp_status
);
275 update_fr0_op(env
, GETPC());
279 float32
HELPER(fmpy_s
)(CPUHPPAState
*env
, float32 a
, float32 b
)
281 float32 ret
= float32_mul(a
, b
, &env
->fp_status
);
282 update_fr0_op(env
, GETPC());
286 float32
HELPER(fdiv_s
)(CPUHPPAState
*env
, float32 a
, float32 b
)
288 float32 ret
= float32_div(a
, b
, &env
->fp_status
);
289 update_fr0_op(env
, GETPC());
293 float64
HELPER(fsqrt_d
)(CPUHPPAState
*env
, float64 arg
)
295 float64 ret
= float64_sqrt(arg
, &env
->fp_status
);
296 update_fr0_op(env
, GETPC());
300 float64
HELPER(frnd_d
)(CPUHPPAState
*env
, float64 arg
)
302 float64 ret
= float64_round_to_int(arg
, &env
->fp_status
);
303 update_fr0_op(env
, GETPC());
307 float64
HELPER(fadd_d
)(CPUHPPAState
*env
, float64 a
, float64 b
)
309 float64 ret
= float64_add(a
, b
, &env
->fp_status
);
310 update_fr0_op(env
, GETPC());
314 float64
HELPER(fsub_d
)(CPUHPPAState
*env
, float64 a
, float64 b
)
316 float64 ret
= float64_sub(a
, b
, &env
->fp_status
);
317 update_fr0_op(env
, GETPC());
321 float64
HELPER(fmpy_d
)(CPUHPPAState
*env
, float64 a
, float64 b
)
323 float64 ret
= float64_mul(a
, b
, &env
->fp_status
);
324 update_fr0_op(env
, GETPC());
328 float64
HELPER(fdiv_d
)(CPUHPPAState
*env
, float64 a
, float64 b
)
330 float64 ret
= float64_div(a
, b
, &env
->fp_status
);
331 update_fr0_op(env
, GETPC());
335 float64
HELPER(fcnv_s_d
)(CPUHPPAState
*env
, float32 arg
)
337 float64 ret
= float32_to_float64(arg
, &env
->fp_status
);
338 update_fr0_op(env
, GETPC());
342 float32
HELPER(fcnv_d_s
)(CPUHPPAState
*env
, float64 arg
)
344 float32 ret
= float64_to_float32(arg
, &env
->fp_status
);
345 update_fr0_op(env
, GETPC());
349 float32
HELPER(fcnv_w_s
)(CPUHPPAState
*env
, int32_t arg
)
351 float32 ret
= int32_to_float32(arg
, &env
->fp_status
);
352 update_fr0_op(env
, GETPC());
356 float32
HELPER(fcnv_dw_s
)(CPUHPPAState
*env
, int64_t arg
)
358 float32 ret
= int64_to_float32(arg
, &env
->fp_status
);
359 update_fr0_op(env
, GETPC());
363 float64
HELPER(fcnv_w_d
)(CPUHPPAState
*env
, int32_t arg
)
365 float64 ret
= int32_to_float64(arg
, &env
->fp_status
);
366 update_fr0_op(env
, GETPC());
370 float64
HELPER(fcnv_dw_d
)(CPUHPPAState
*env
, int64_t arg
)
372 float64 ret
= int64_to_float64(arg
, &env
->fp_status
);
373 update_fr0_op(env
, GETPC());
377 int32_t HELPER(fcnv_s_w
)(CPUHPPAState
*env
, float32 arg
)
379 int32_t ret
= float32_to_int32(arg
, &env
->fp_status
);
380 update_fr0_op(env
, GETPC());
384 int32_t HELPER(fcnv_d_w
)(CPUHPPAState
*env
, float64 arg
)
386 int32_t ret
= float64_to_int32(arg
, &env
->fp_status
);
387 update_fr0_op(env
, GETPC());
391 int64_t HELPER(fcnv_s_dw
)(CPUHPPAState
*env
, float32 arg
)
393 int64_t ret
= float32_to_int64(arg
, &env
->fp_status
);
394 update_fr0_op(env
, GETPC());
398 int64_t HELPER(fcnv_d_dw
)(CPUHPPAState
*env
, float64 arg
)
400 int64_t ret
= float64_to_int64(arg
, &env
->fp_status
);
401 update_fr0_op(env
, GETPC());
405 int32_t HELPER(fcnv_t_s_w
)(CPUHPPAState
*env
, float32 arg
)
407 int32_t ret
= float32_to_int32_round_to_zero(arg
, &env
->fp_status
);
408 update_fr0_op(env
, GETPC());
412 int32_t HELPER(fcnv_t_d_w
)(CPUHPPAState
*env
, float64 arg
)
414 int32_t ret
= float64_to_int32_round_to_zero(arg
, &env
->fp_status
);
415 update_fr0_op(env
, GETPC());
419 int64_t HELPER(fcnv_t_s_dw
)(CPUHPPAState
*env
, float32 arg
)
421 int64_t ret
= float32_to_int64_round_to_zero(arg
, &env
->fp_status
);
422 update_fr0_op(env
, GETPC());
426 int64_t HELPER(fcnv_t_d_dw
)(CPUHPPAState
*env
, float64 arg
)
428 int64_t ret
= float64_to_int64_round_to_zero(arg
, &env
->fp_status
);
429 update_fr0_op(env
, GETPC());
433 float32
HELPER(fcnv_uw_s
)(CPUHPPAState
*env
, uint32_t arg
)
435 float32 ret
= uint32_to_float32(arg
, &env
->fp_status
);
436 update_fr0_op(env
, GETPC());
440 float32
HELPER(fcnv_udw_s
)(CPUHPPAState
*env
, uint64_t arg
)
442 float32 ret
= uint64_to_float32(arg
, &env
->fp_status
);
443 update_fr0_op(env
, GETPC());
447 float64
HELPER(fcnv_uw_d
)(CPUHPPAState
*env
, uint32_t arg
)
449 float64 ret
= uint32_to_float64(arg
, &env
->fp_status
);
450 update_fr0_op(env
, GETPC());
454 float64
HELPER(fcnv_udw_d
)(CPUHPPAState
*env
, uint64_t arg
)
456 float64 ret
= uint64_to_float64(arg
, &env
->fp_status
);
457 update_fr0_op(env
, GETPC());
461 uint32_t HELPER(fcnv_s_uw
)(CPUHPPAState
*env
, float32 arg
)
463 uint32_t ret
= float32_to_uint32(arg
, &env
->fp_status
);
464 update_fr0_op(env
, GETPC());
468 uint32_t HELPER(fcnv_d_uw
)(CPUHPPAState
*env
, float64 arg
)
470 uint32_t ret
= float64_to_uint32(arg
, &env
->fp_status
);
471 update_fr0_op(env
, GETPC());
475 uint64_t HELPER(fcnv_s_udw
)(CPUHPPAState
*env
, float32 arg
)
477 uint64_t ret
= float32_to_uint64(arg
, &env
->fp_status
);
478 update_fr0_op(env
, GETPC());
482 uint64_t HELPER(fcnv_d_udw
)(CPUHPPAState
*env
, float64 arg
)
484 uint64_t ret
= float64_to_uint64(arg
, &env
->fp_status
);
485 update_fr0_op(env
, GETPC());
489 uint32_t HELPER(fcnv_t_s_uw
)(CPUHPPAState
*env
, float32 arg
)
491 uint32_t ret
= float32_to_uint32_round_to_zero(arg
, &env
->fp_status
);
492 update_fr0_op(env
, GETPC());
496 uint32_t HELPER(fcnv_t_d_uw
)(CPUHPPAState
*env
, float64 arg
)
498 uint32_t ret
= float64_to_uint32_round_to_zero(arg
, &env
->fp_status
);
499 update_fr0_op(env
, GETPC());
503 uint64_t HELPER(fcnv_t_s_udw
)(CPUHPPAState
*env
, float32 arg
)
505 uint64_t ret
= float32_to_uint64_round_to_zero(arg
, &env
->fp_status
);
506 update_fr0_op(env
, GETPC());
510 uint64_t HELPER(fcnv_t_d_udw
)(CPUHPPAState
*env
, float64 arg
)
512 uint64_t ret
= float64_to_uint64_round_to_zero(arg
, &env
->fp_status
);
513 update_fr0_op(env
, GETPC());
517 static void update_fr0_cmp(CPUHPPAState
*env
, uint32_t y
, uint32_t c
, int r
)
519 uint32_t shadow
= env
->fr0_shadow
;
522 case float_relation_greater
:
523 c
= extract32(c
, 4, 1);
525 case float_relation_less
:
526 c
= extract32(c
, 3, 1);
528 case float_relation_equal
:
529 c
= extract32(c
, 2, 1);
531 case float_relation_unordered
:
532 c
= extract32(c
, 1, 1);
535 g_assert_not_reached();
539 /* targeted comparison */
540 /* set fpsr[ca[y - 1]] to current compare */
541 shadow
= deposit32(shadow
, 21 - (y
- 1), 1, c
);
543 /* queued comparison */
544 /* shift cq right by one place */
545 shadow
= deposit32(shadow
, 11, 10, extract32(shadow
, 12, 10));
546 /* move fpsr[c] to fpsr[cq[0]] */
547 shadow
= deposit32(shadow
, 21, 1, extract32(shadow
, 26, 1));
548 /* set fpsr[c] to current compare */
549 shadow
= deposit32(shadow
, 26, 1, c
);
552 env
->fr0_shadow
= shadow
;
553 env
->fr
[0] = (uint64_t)shadow
<< 32;
556 void HELPER(fcmp_s
)(CPUHPPAState
*env
, float32 a
, float32 b
,
557 uint32_t y
, uint32_t c
)
561 r
= float32_compare(a
, b
, &env
->fp_status
);
563 r
= float32_compare_quiet(a
, b
, &env
->fp_status
);
565 update_fr0_op(env
, GETPC());
566 update_fr0_cmp(env
, y
, c
, r
);
569 void HELPER(fcmp_d
)(CPUHPPAState
*env
, float64 a
, float64 b
,
570 uint32_t y
, uint32_t c
)
574 r
= float64_compare(a
, b
, &env
->fp_status
);
576 r
= float64_compare_quiet(a
, b
, &env
->fp_status
);
578 update_fr0_op(env
, GETPC());
579 update_fr0_cmp(env
, y
, c
, r
);
582 float32
HELPER(fmpyfadd_s
)(CPUHPPAState
*env
, float32 a
, float32 b
, float32 c
)
584 float32 ret
= float32_muladd(a
, b
, c
, 0, &env
->fp_status
);
585 update_fr0_op(env
, GETPC());
589 float32
HELPER(fmpynfadd_s
)(CPUHPPAState
*env
, float32 a
, float32 b
, float32 c
)
591 float32 ret
= float32_muladd(a
, b
, c
, float_muladd_negate_product
,
593 update_fr0_op(env
, GETPC());
597 float64
HELPER(fmpyfadd_d
)(CPUHPPAState
*env
, float64 a
, float64 b
, float64 c
)
599 float64 ret
= float64_muladd(a
, b
, c
, 0, &env
->fp_status
);
600 update_fr0_op(env
, GETPC());
604 float64
HELPER(fmpynfadd_d
)(CPUHPPAState
*env
, float64 a
, float64 b
, float64 c
)
606 float64 ret
= float64_muladd(a
, b
, c
, float_muladd_negate_product
,
608 update_fr0_op(env
, GETPC());
612 target_ureg
HELPER(read_interval_timer
)(void)
614 #ifdef CONFIG_USER_ONLY
615 /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
616 Just pass through the host cpu clock ticks. */
617 return cpu_get_host_ticks();
619 /* In system mode we have access to a decent high-resolution clock.
620 In order to make OS-level time accounting work with the cr16,
621 present it with a well-timed clock fixed at 250MHz. */
622 return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) >> 2;
626 #ifndef CONFIG_USER_ONLY
627 void HELPER(write_interval_timer
)(CPUHPPAState
*env
, target_ureg val
)
629 HPPACPU
*cpu
= env_archcpu(env
);
630 uint64_t current
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
);
633 /* Even in 64-bit mode, the comparator is always 32-bit. But the
634 value we expose to the guest is 1/4 of the speed of the clock,
635 so moosh in 34 bits. */
636 timeout
= deposit64(current
, 0, 34, (uint64_t)val
<< 2);
638 /* If the mooshing puts the clock in the past, advance to next round. */
639 if (timeout
< current
+ 1000) {
640 timeout
+= 1ULL << 34;
643 cpu
->env
.cr
[CR_IT
] = timeout
;
644 timer_mod(cpu
->alarm_timer
, timeout
);
647 void HELPER(halt
)(CPUHPPAState
*env
)
649 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN
);
650 helper_excp(env
, EXCP_HLT
);
653 void HELPER(reset
)(CPUHPPAState
*env
)
655 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
656 helper_excp(env
, EXCP_HLT
);
659 target_ureg
HELPER(swap_system_mask
)(CPUHPPAState
*env
, target_ureg nsm
)
661 target_ulong psw
= env
->psw
;
663 * Setting the PSW Q bit to 1, if it was not already 1, is an
664 * undefined operation.
666 * However, HP-UX 10.20 does this with the SSM instruction.
667 * Tested this on HP9000/712 and HP9000/785/C3750 and both
668 * machines set the Q bit from 0 to 1 without an exception,
669 * so let this go without comment.
671 env
->psw
= (psw
& ~PSW_SM
) | (nsm
& PSW_SM
);
675 void HELPER(rfi
)(CPUHPPAState
*env
)
677 env
->iasq_f
= (uint64_t)env
->cr
[CR_IIASQ
] << 32;
678 env
->iasq_b
= (uint64_t)env
->cr_back
[0] << 32;
679 env
->iaoq_f
= env
->cr
[CR_IIAOQ
];
680 env
->iaoq_b
= env
->cr_back
[1];
681 cpu_hppa_put_psw(env
, env
->cr
[CR_IPSW
]);
684 void HELPER(rfi_r
)(CPUHPPAState
*env
)
686 env
->gr
[1] = env
->shadow
[0];
687 env
->gr
[8] = env
->shadow
[1];
688 env
->gr
[9] = env
->shadow
[2];
689 env
->gr
[16] = env
->shadow
[3];
690 env
->gr
[17] = env
->shadow
[4];
691 env
->gr
[24] = env
->shadow
[5];
692 env
->gr
[25] = env
->shadow
[6];