hw/arm/mcimx7d-sabre.c

   1 /*
   2  * Copyright (c) 2018, Impinj, Inc.
   3  *
   4  * MCIMX7D_SABRE Board System emulation.
   5  *
   6  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
   7  *
   8  * This code is licensed under the GPL, version 2 or later.
   9  * See the file `COPYING' in the top level directory.
  10  *
  11  * It (partially) emulates a mcimx7d_sabre board, with a Freescale
  12  * i.MX7 SoC
  13  */
  14
  15 #include "qemu/osdep.h"
  16 #include "qapi/error.h"
  17 #include "hw/arm/fsl-imx7.h"
  18 #include "hw/boards.h"
  19 #include "hw/qdev-properties.h"
  20 #include "sysemu/sysemu.h"
  21 #include "qemu/error-report.h"
  22 #include "sysemu/qtest.h"
  23
  24 typedef struct {
  25     FslIMX7State soc;
  26     MemoryRegion ram;
  27 } MCIMX7Sabre;
  28
  29 static void mcimx7d_sabre_init(MachineState *machine)
  30 {
  31     static struct arm_boot_info boot_info;
  32     MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1);
  33     int i;
  34
  35     if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
  36         error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
  37                      machine->ram_size, FSL_IMX7_MMDC_SIZE);
  38         exit(1);
  39     }
  40
  41     boot_info = (struct arm_boot_info) {
  42         .loader_start = FSL_IMX7_MMDC_ADDR,
  43         .board_id = -1,
  44         .ram_size = machine->ram_size,
  45         .nb_cpus = machine->smp.cpus,
  46     };
  47
  48     object_initialize_child(OBJECT(machine), "soc",
  49                             &s->soc, sizeof(s->soc),
  50                             TYPE_FSL_IMX7, &error_fatal, NULL);
  51     object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
  52
  53     memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram",
  54                                          machine->ram_size);
  55     memory_region_add_subregion(get_system_memory(),
  56                                 FSL_IMX7_MMDC_ADDR, &s->ram);
  57
  58     for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
  59         BusState *bus;
  60         DeviceState *carddev;
  61         DriveInfo *di;
  62         BlockBackend *blk;
  63
  64         di = drive_get_next(IF_SD);
  65         blk = di ? blk_by_legacy_dinfo(di) : NULL;
  66         bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus");
  67         carddev = qdev_create(bus, TYPE_SD_CARD);
  68         qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
  69         object_property_set_bool(OBJECT(carddev), true,
  70                                  "realized", &error_fatal);
  71     }
  72
  73     if (!qtest_enabled()) {
  74         arm_load_kernel(&s->soc.cpu[0], machine, &boot_info);
  75     }
  76 }
  77
  78 static void mcimx7d_sabre_machine_init(MachineClass *mc)
  79 {
  80     mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)";
  81     mc->init = mcimx7d_sabre_init;
  82     mc->max_cpus = FSL_IMX7_NUM_CPUS;
  83 }
  84 DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)