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target/i386: Split out do_fninit
[qemu/ar7.git] / softmmu / memory.c
blobbfedaf9c4dfcd14afd0e9429b825ecc586c1bd77
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36
37 //#define DEBUG_UNASSIGNED
38
39 static unsigned memory_region_transaction_depth;
40 static bool memory_region_update_pending;
41 static bool ioeventfd_update_pending;
42 bool global_dirty_log;
43
44 static QTAILQ_HEAD(, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 static GHashTable *flat_views;
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note that signed integers are needed for negative offsetting in aliases
56 * (large MemoryRegion::alias_offset).
57 */
58 struct AddrRange {
59 Int128 start;
60 Int128 size;
61 };
62
63 static AddrRange addrrange_make(Int128 start, Int128 size)
64 {
65 return (AddrRange) { start, size };
66 }
67
68 static bool addrrange_equal(AddrRange r1, AddrRange r2)
69 {
70 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
71 }
72
73 static Int128 addrrange_end(AddrRange r)
74 {
75 return int128_add(r.start, r.size);
76 }
77
78 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
79 {
80 int128_addto(&range.start, delta);
81 return range;
82 }
83
84 static bool addrrange_contains(AddrRange range, Int128 addr)
85 {
86 return int128_ge(addr, range.start)
87 && int128_lt(addr, addrrange_end(range));
88 }
89
90 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
91 {
92 return addrrange_contains(r1, r2.start)
93 || addrrange_contains(r2, r1.start);
94 }
95
96 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
97 {
98 Int128 start = int128_max(r1.start, r2.start);
99 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
100 return addrrange_make(start, int128_sub(end, start));
101 }
102
103 enum ListenerDirection { Forward, Reverse };
104
105 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
106 do { \
107 MemoryListener *_listener; \
108 \
109 switch (_direction) { \
110 case Forward: \
111 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
112 if (_listener->_callback) { \
113 _listener->_callback(_listener, ##_args); \
114 } \
115 } \
116 break; \
117 case Reverse: \
118 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
119 if (_listener->_callback) { \
120 _listener->_callback(_listener, ##_args); \
121 } \
122 } \
123 break; \
124 default: \
125 abort(); \
126 } \
127 } while (0)
128
129 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
130 do { \
131 MemoryListener *_listener; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
136 if (_listener->_callback) { \
137 _listener->_callback(_listener, _section, ##_args); \
138 } \
139 } \
140 break; \
141 case Reverse: \
142 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
143 if (_listener->_callback) { \
144 _listener->_callback(_listener, _section, ##_args); \
145 } \
146 } \
147 break; \
148 default: \
149 abort(); \
150 } \
151 } while (0)
152
153 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
154 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
155 do { \
156 MemoryRegionSection mrs = section_from_flat_range(fr, \
157 address_space_to_flatview(as)); \
158 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
159 } while(0)
160
161 struct CoalescedMemoryRange {
162 AddrRange addr;
163 QTAILQ_ENTRY(CoalescedMemoryRange) link;
164 };
165
166 struct MemoryRegionIoeventfd {
167 AddrRange addr;
168 bool match_data;
169 uint64_t data;
170 EventNotifier *e;
171 };
172
173 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
174 MemoryRegionIoeventfd *b)
175 {
176 if (int128_lt(a->addr.start, b->addr.start)) {
177 return true;
178 } else if (int128_gt(a->addr.start, b->addr.start)) {
179 return false;
180 } else if (int128_lt(a->addr.size, b->addr.size)) {
181 return true;
182 } else if (int128_gt(a->addr.size, b->addr.size)) {
183 return false;
184 } else if (a->match_data < b->match_data) {
185 return true;
186 } else if (a->match_data > b->match_data) {
187 return false;
188 } else if (a->match_data) {
189 if (a->data < b->data) {
190 return true;
191 } else if (a->data > b->data) {
192 return false;
193 }
194 }
195 if (a->e < b->e) {
196 return true;
197 } else if (a->e > b->e) {
198 return false;
199 }
200 return false;
201 }
202
203 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
204 MemoryRegionIoeventfd *b)
205 {
206 if (int128_eq(a->addr.start, b->addr.start) &&
207 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
208 (int128_eq(a->addr.size, b->addr.size) &&
209 (a->match_data == b->match_data) &&
210 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
211 (a->e == b->e))))
212 return true;
213
214 return false;
215 }
216
217 /* Range of memory in the global map. Addresses are absolute. */
218 struct FlatRange {
219 MemoryRegion *mr;
220 hwaddr offset_in_region;
221 AddrRange addr;
222 uint8_t dirty_log_mask;
223 bool romd_mode;
224 bool readonly;
225 bool nonvolatile;
226 };
227
228 #define FOR_EACH_FLAT_RANGE(var, view) \
229 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
230
231 static inline MemoryRegionSection
232 section_from_flat_range(FlatRange *fr, FlatView *fv)
233 {
234 return (MemoryRegionSection) {
235 .mr = fr->mr,
236 .fv = fv,
237 .offset_within_region = fr->offset_in_region,
238 .size = fr->addr.size,
239 .offset_within_address_space = int128_get64(fr->addr.start),
240 .readonly = fr->readonly,
241 .nonvolatile = fr->nonvolatile,
242 };
243 }
244
245 static bool flatrange_equal(FlatRange *a, FlatRange *b)
246 {
247 return a->mr == b->mr
248 && addrrange_equal(a->addr, b->addr)
249 && a->offset_in_region == b->offset_in_region
250 && a->romd_mode == b->romd_mode
251 && a->readonly == b->readonly
252 && a->nonvolatile == b->nonvolatile;
253 }
254
255 static FlatView *flatview_new(MemoryRegion *mr_root)
256 {
257 FlatView *view;
258
259 view = g_new0(FlatView, 1);
260 view->ref = 1;
261 view->root = mr_root;
262 memory_region_ref(mr_root);
263 trace_flatview_new(view, mr_root);
264
265 return view;
266 }
267
268 /* Insert a range into a given position. Caller is responsible for maintaining
269 * sorting order.
270 */
271 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
272 {
273 if (view->nr == view->nr_allocated) {
274 view->nr_allocated = MAX(2 * view->nr, 10);
275 view->ranges = g_realloc(view->ranges,
276 view->nr_allocated * sizeof(*view->ranges));
277 }
278 memmove(view->ranges + pos + 1, view->ranges + pos,
279 (view->nr - pos) * sizeof(FlatRange));
280 view->ranges[pos] = *range;
281 memory_region_ref(range->mr);
282 ++view->nr;
283 }
284
285 static void flatview_destroy(FlatView *view)
286 {
287 int i;
288
289 trace_flatview_destroy(view, view->root);
290 if (view->dispatch) {
291 address_space_dispatch_free(view->dispatch);
292 }
293 for (i = 0; i < view->nr; i++) {
294 memory_region_unref(view->ranges[i].mr);
295 }
296 g_free(view->ranges);
297 memory_region_unref(view->root);
298 g_free(view);
299 }
300
301 static bool flatview_ref(FlatView *view)
302 {
303 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
304 }
305
306 void flatview_unref(FlatView *view)
307 {
308 if (qatomic_fetch_dec(&view->ref) == 1) {
309 trace_flatview_destroy_rcu(view, view->root);
310 assert(view->root);
311 call_rcu(view, flatview_destroy, rcu);
312 }
313 }
314
315 static bool can_merge(FlatRange *r1, FlatRange *r2)
316 {
317 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
318 && r1->mr == r2->mr
319 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
320 r1->addr.size),
321 int128_make64(r2->offset_in_region))
322 && r1->dirty_log_mask == r2->dirty_log_mask
323 && r1->romd_mode == r2->romd_mode
324 && r1->readonly == r2->readonly
325 && r1->nonvolatile == r2->nonvolatile;
326 }
327
328 /* Attempt to simplify a view by merging adjacent ranges */
329 static void flatview_simplify(FlatView *view)
330 {
331 unsigned i, j, k;
332
333 i = 0;
334 while (i < view->nr) {
335 j = i + 1;
336 while (j < view->nr
337 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
338 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
339 ++j;
340 }
341 ++i;
342 for (k = i; k < j; k++) {
343 memory_region_unref(view->ranges[k].mr);
344 }
345 memmove(&view->ranges[i], &view->ranges[j],
346 (view->nr - j) * sizeof(view->ranges[j]));
347 view->nr -= j - i;
348 }
349 }
350
351 static bool memory_region_big_endian(MemoryRegion *mr)
352 {
353 #ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
355 #else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357 #endif
358 }
359
360 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
361 {
362 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
363 switch (op & MO_SIZE) {
364 case MO_8:
365 break;
366 case MO_16:
367 *data = bswap16(*data);
368 break;
369 case MO_32:
370 *data = bswap32(*data);
371 break;
372 case MO_64:
373 *data = bswap64(*data);
374 break;
375 default:
376 g_assert_not_reached();
377 }
378 }
379 }
380
381 static inline void memory_region_shift_read_access(uint64_t *value,
382 signed shift,
383 uint64_t mask,
384 uint64_t tmp)
385 {
386 if (shift >= 0) {
387 *value |= (tmp & mask) << shift;
388 } else {
389 *value |= (tmp & mask) >> -shift;
390 }
391 }
392
393 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
394 signed shift,
395 uint64_t mask)
396 {
397 uint64_t tmp;
398
399 if (shift >= 0) {
400 tmp = (*value >> shift) & mask;
401 } else {
402 tmp = (*value << -shift) & mask;
403 }
404
405 return tmp;
406 }
407
408 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
409 {
410 MemoryRegion *root;
411 hwaddr abs_addr = offset;
412
413 abs_addr += mr->addr;
414 for (root = mr; root->container; ) {
415 root = root->container;
416 abs_addr += root->addr;
417 }
418
419 return abs_addr;
420 }
421
422 static int get_cpu_index(void)
423 {
424 if (current_cpu) {
425 return current_cpu->cpu_index;
426 }
427 return -1;
428 }
429
430 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
431 hwaddr addr,
432 uint64_t *value,
433 unsigned size,
434 signed shift,
435 uint64_t mask,
436 MemTxAttrs attrs)
437 {
438 uint64_t tmp;
439
440 tmp = mr->ops->read(mr->opaque, addr, size);
441 if (mr->subpage) {
442 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
443 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
446 memory_region_name(mr));
447 }
448 memory_region_shift_read_access(value, shift, mask, tmp);
449 return MEMTX_OK;
450 }
451
452 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 signed shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
459 {
460 uint64_t tmp = 0;
461 MemTxResult r;
462
463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
467 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
468 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
469 memory_region_name(mr));
470 }
471 memory_region_shift_read_access(value, shift, mask, tmp);
472 return r;
473 }
474
475 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
476 hwaddr addr,
477 uint64_t *value,
478 unsigned size,
479 signed shift,
480 uint64_t mask,
481 MemTxAttrs attrs)
482 {
483 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
484
485 if (mr->subpage) {
486 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
487 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
488 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
489 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
490 memory_region_name(mr));
491 }
492 mr->ops->write(mr->opaque, addr, tmp, size);
493 return MEMTX_OK;
494 }
495
496 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
497 hwaddr addr,
498 uint64_t *value,
499 unsigned size,
500 signed shift,
501 uint64_t mask,
502 MemTxAttrs attrs)
503 {
504 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
505
506 if (mr->subpage) {
507 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
508 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
509 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
510 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
511 memory_region_name(mr));
512 }
513 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
514 }
515
516 static MemTxResult access_with_adjusted_size(hwaddr addr,
517 uint64_t *value,
518 unsigned size,
519 unsigned access_size_min,
520 unsigned access_size_max,
521 MemTxResult (*access_fn)
522 (MemoryRegion *mr,
523 hwaddr addr,
524 uint64_t *value,
525 unsigned size,
526 signed shift,
527 uint64_t mask,
528 MemTxAttrs attrs),
529 MemoryRegion *mr,
530 MemTxAttrs attrs)
531 {
532 uint64_t access_mask;
533 unsigned access_size;
534 unsigned i;
535 MemTxResult r = MEMTX_OK;
536
537 if (!access_size_min) {
538 access_size_min = 1;
539 }
540 if (!access_size_max) {
541 access_size_max = 4;
542 }
543
544 /* FIXME: support unaligned access? */
545 access_size = MAX(MIN(size, access_size_max), access_size_min);
546 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
547 if (memory_region_big_endian(mr)) {
548 for (i = 0; i < size; i += access_size) {
549 r |= access_fn(mr, addr + i, value, access_size,
550 (size - access_size - i) * 8, access_mask, attrs);
551 }
552 } else {
553 for (i = 0; i < size; i += access_size) {
554 r |= access_fn(mr, addr + i, value, access_size, i * 8,
555 access_mask, attrs);
556 }
557 }
558 return r;
559 }
560
561 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
562 {
563 AddressSpace *as;
564
565 while (mr->container) {
566 mr = mr->container;
567 }
568 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
569 if (mr == as->root) {
570 return as;
571 }
572 }
573 return NULL;
574 }
575
576 /* Render a memory region into the global view. Ranges in @view obscure
577 * ranges in @mr.
578 */
579 static void render_memory_region(FlatView *view,
580 MemoryRegion *mr,
581 Int128 base,
582 AddrRange clip,
583 bool readonly,
584 bool nonvolatile)
585 {
586 MemoryRegion *subregion;
587 unsigned i;
588 hwaddr offset_in_region;
589 Int128 remain;
590 Int128 now;
591 FlatRange fr;
592 AddrRange tmp;
593
594 if (!mr->enabled) {
595 return;
596 }
597
598 int128_addto(&base, int128_make64(mr->addr));
599 readonly |= mr->readonly;
600 nonvolatile |= mr->nonvolatile;
601
602 tmp = addrrange_make(base, mr->size);
603
604 if (!addrrange_intersects(tmp, clip)) {
605 return;
606 }
607
608 clip = addrrange_intersection(tmp, clip);
609
610 if (mr->alias) {
611 int128_subfrom(&base, int128_make64(mr->alias->addr));
612 int128_subfrom(&base, int128_make64(mr->alias_offset));
613 render_memory_region(view, mr->alias, base, clip,
614 readonly, nonvolatile);
615 return;
616 }
617
618 /* Render subregions in priority order. */
619 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
620 render_memory_region(view, subregion, base, clip,
621 readonly, nonvolatile);
622 }
623
624 if (!mr->terminates) {
625 return;
626 }
627
628 offset_in_region = int128_get64(int128_sub(clip.start, base));
629 base = clip.start;
630 remain = clip.size;
631
632 fr.mr = mr;
633 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
634 fr.romd_mode = mr->romd_mode;
635 fr.readonly = readonly;
636 fr.nonvolatile = nonvolatile;
637
638 /* Render the region itself into any gaps left by the current view. */
639 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
640 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
641 continue;
642 }
643 if (int128_lt(base, view->ranges[i].addr.start)) {
644 now = int128_min(remain,
645 int128_sub(view->ranges[i].addr.start, base));
646 fr.offset_in_region = offset_in_region;
647 fr.addr = addrrange_make(base, now);
648 flatview_insert(view, i, &fr);
649 ++i;
650 int128_addto(&base, now);
651 offset_in_region += int128_get64(now);
652 int128_subfrom(&remain, now);
653 }
654 now = int128_sub(int128_min(int128_add(base, remain),
655 addrrange_end(view->ranges[i].addr)),
656 base);
657 int128_addto(&base, now);
658 offset_in_region += int128_get64(now);
659 int128_subfrom(&remain, now);
660 }
661 if (int128_nz(remain)) {
662 fr.offset_in_region = offset_in_region;
663 fr.addr = addrrange_make(base, remain);
664 flatview_insert(view, i, &fr);
665 }
666 }
667
668 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
669 {
670 FlatRange *fr;
671
672 assert(fv);
673 assert(cb);
674
675 FOR_EACH_FLAT_RANGE(fr, fv) {
676 if (cb(fr->addr.start, fr->addr.size, fr->mr,
677 fr->offset_in_region, opaque)) {
678 break;
679 }
680 }
681 }
682
683 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
684 {
685 while (mr->enabled) {
686 if (mr->alias) {
687 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
688 /* The alias is included in its entirety. Use it as
689 * the "real" root, so that we can share more FlatViews.
690 */
691 mr = mr->alias;
692 continue;
693 }
694 } else if (!mr->terminates) {
695 unsigned int found = 0;
696 MemoryRegion *child, *next = NULL;
697 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
698 if (child->enabled) {
699 if (++found > 1) {
700 next = NULL;
701 break;
702 }
703 if (!child->addr && int128_ge(mr->size, child->size)) {
704 /* A child is included in its entirety. If it's the only
705 * enabled one, use it in the hope of finding an alias down the
706 * way. This will also let us share FlatViews.
707 */
708 next = child;
709 }
710 }
711 }
712 if (found == 0) {
713 return NULL;
714 }
715 if (next) {
716 mr = next;
717 continue;
718 }
719 }
720
721 return mr;
722 }
723
724 return NULL;
725 }
726
727 /* Render a memory topology into a list of disjoint absolute ranges. */
728 static FlatView *generate_memory_topology(MemoryRegion *mr)
729 {
730 int i;
731 FlatView *view;
732
733 view = flatview_new(mr);
734
735 if (mr) {
736 render_memory_region(view, mr, int128_zero(),
737 addrrange_make(int128_zero(), int128_2_64()),
738 false, false);
739 }
740 flatview_simplify(view);
741
742 view->dispatch = address_space_dispatch_new(view);
743 for (i = 0; i < view->nr; i++) {
744 MemoryRegionSection mrs =
745 section_from_flat_range(&view->ranges[i], view);
746 flatview_add_to_dispatch(view, &mrs);
747 }
748 address_space_dispatch_compact(view->dispatch);
749 g_hash_table_replace(flat_views, mr, view);
750
751 return view;
752 }
753
754 static void address_space_add_del_ioeventfds(AddressSpace *as,
755 MemoryRegionIoeventfd *fds_new,
756 unsigned fds_new_nb,
757 MemoryRegionIoeventfd *fds_old,
758 unsigned fds_old_nb)
759 {
760 unsigned iold, inew;
761 MemoryRegionIoeventfd *fd;
762 MemoryRegionSection section;
763
764 /* Generate a symmetric difference of the old and new fd sets, adding
765 * and deleting as necessary.
766 */
767
768 iold = inew = 0;
769 while (iold < fds_old_nb || inew < fds_new_nb) {
770 if (iold < fds_old_nb
771 && (inew == fds_new_nb
772 || memory_region_ioeventfd_before(&fds_old[iold],
773 &fds_new[inew]))) {
774 fd = &fds_old[iold];
775 section = (MemoryRegionSection) {
776 .fv = address_space_to_flatview(as),
777 .offset_within_address_space = int128_get64(fd->addr.start),
778 .size = fd->addr.size,
779 };
780 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
781 fd->match_data, fd->data, fd->e);
782 ++iold;
783 } else if (inew < fds_new_nb
784 && (iold == fds_old_nb
785 || memory_region_ioeventfd_before(&fds_new[inew],
786 &fds_old[iold]))) {
787 fd = &fds_new[inew];
788 section = (MemoryRegionSection) {
789 .fv = address_space_to_flatview(as),
790 .offset_within_address_space = int128_get64(fd->addr.start),
791 .size = fd->addr.size,
792 };
793 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
794 fd->match_data, fd->data, fd->e);
795 ++inew;
796 } else {
797 ++iold;
798 ++inew;
799 }
800 }
801 }
802
803 FlatView *address_space_get_flatview(AddressSpace *as)
804 {
805 FlatView *view;
806
807 RCU_READ_LOCK_GUARD();
808 do {
809 view = address_space_to_flatview(as);
810 /* If somebody has replaced as->current_map concurrently,
811 * flatview_ref returns false.
812 */
813 } while (!flatview_ref(view));
814 return view;
815 }
816
817 static void address_space_update_ioeventfds(AddressSpace *as)
818 {
819 FlatView *view;
820 FlatRange *fr;
821 unsigned ioeventfd_nb = 0;
822 unsigned ioeventfd_max;
823 MemoryRegionIoeventfd *ioeventfds;
824 AddrRange tmp;
825 unsigned i;
826
827 /*
828 * It is likely that the number of ioeventfds hasn't changed much, so use
829 * the previous size as the starting value, with some headroom to avoid
830 * gratuitous reallocations.
831 */
832 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
833 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
834
835 view = address_space_get_flatview(as);
836 FOR_EACH_FLAT_RANGE(fr, view) {
837 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
838 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
839 int128_sub(fr->addr.start,
840 int128_make64(fr->offset_in_region)));
841 if (addrrange_intersects(fr->addr, tmp)) {
842 ++ioeventfd_nb;
843 if (ioeventfd_nb > ioeventfd_max) {
844 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
845 ioeventfds = g_realloc(ioeventfds,
846 ioeventfd_max * sizeof(*ioeventfds));
847 }
848 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
849 ioeventfds[ioeventfd_nb-1].addr = tmp;
850 }
851 }
852 }
853
854 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
855 as->ioeventfds, as->ioeventfd_nb);
856
857 g_free(as->ioeventfds);
858 as->ioeventfds = ioeventfds;
859 as->ioeventfd_nb = ioeventfd_nb;
860 flatview_unref(view);
861 }
862
863 /*
864 * Notify the memory listeners about the coalesced IO change events of
865 * range `cmr'. Only the part that has intersection of the specified
866 * FlatRange will be sent.
867 */
868 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
869 CoalescedMemoryRange *cmr, bool add)
870 {
871 AddrRange tmp;
872
873 tmp = addrrange_shift(cmr->addr,
874 int128_sub(fr->addr.start,
875 int128_make64(fr->offset_in_region)));
876 if (!addrrange_intersects(tmp, fr->addr)) {
877 return;
878 }
879 tmp = addrrange_intersection(tmp, fr->addr);
880
881 if (add) {
882 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
883 int128_get64(tmp.start),
884 int128_get64(tmp.size));
885 } else {
886 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
887 int128_get64(tmp.start),
888 int128_get64(tmp.size));
889 }
890 }
891
892 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
893 {
894 CoalescedMemoryRange *cmr;
895
896 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
897 flat_range_coalesced_io_notify(fr, as, cmr, false);
898 }
899 }
900
901 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
902 {
903 MemoryRegion *mr = fr->mr;
904 CoalescedMemoryRange *cmr;
905
906 if (QTAILQ_EMPTY(&mr->coalesced)) {
907 return;
908 }
909
910 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
911 flat_range_coalesced_io_notify(fr, as, cmr, true);
912 }
913 }
914
915 static void address_space_update_topology_pass(AddressSpace *as,
916 const FlatView *old_view,
917 const FlatView *new_view,
918 bool adding)
919 {
920 unsigned iold, inew;
921 FlatRange *frold, *frnew;
922
923 /* Generate a symmetric difference of the old and new memory maps.
924 * Kill ranges in the old map, and instantiate ranges in the new map.
925 */
926 iold = inew = 0;
927 while (iold < old_view->nr || inew < new_view->nr) {
928 if (iold < old_view->nr) {
929 frold = &old_view->ranges[iold];
930 } else {
931 frold = NULL;
932 }
933 if (inew < new_view->nr) {
934 frnew = &new_view->ranges[inew];
935 } else {
936 frnew = NULL;
937 }
938
939 if (frold
940 && (!frnew
941 || int128_lt(frold->addr.start, frnew->addr.start)
942 || (int128_eq(frold->addr.start, frnew->addr.start)
943 && !flatrange_equal(frold, frnew)))) {
944 /* In old but not in new, or in both but attributes changed. */
945
946 if (!adding) {
947 flat_range_coalesced_io_del(frold, as);
948 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
949 }
950
951 ++iold;
952 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
953 /* In both and unchanged (except logging may have changed) */
954
955 if (adding) {
956 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
957 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
958 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
959 frold->dirty_log_mask,
960 frnew->dirty_log_mask);
961 }
962 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
963 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
964 frold->dirty_log_mask,
965 frnew->dirty_log_mask);
966 }
967 }
968
969 ++iold;
970 ++inew;
971 } else {
972 /* In new */
973
974 if (adding) {
975 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
976 flat_range_coalesced_io_add(frnew, as);
977 }
978
979 ++inew;
980 }
981 }
982 }
983
984 static void flatviews_init(void)
985 {
986 static FlatView *empty_view;
987
988 if (flat_views) {
989 return;
990 }
991
992 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
993 (GDestroyNotify) flatview_unref);
994 if (!empty_view) {
995 empty_view = generate_memory_topology(NULL);
996 /* We keep it alive forever in the global variable. */
997 flatview_ref(empty_view);
998 } else {
999 g_hash_table_replace(flat_views, NULL, empty_view);
1000 flatview_ref(empty_view);
1001 }
1002 }
1003
1004 static void flatviews_reset(void)
1005 {
1006 AddressSpace *as;
1007
1008 if (flat_views) {
1009 g_hash_table_unref(flat_views);
1010 flat_views = NULL;
1011 }
1012 flatviews_init();
1013
1014 /* Render unique FVs */
1015 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1016 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1017
1018 if (g_hash_table_lookup(flat_views, physmr)) {
1019 continue;
1020 }
1021
1022 generate_memory_topology(physmr);
1023 }
1024 }
1025
1026 static void address_space_set_flatview(AddressSpace *as)
1027 {
1028 FlatView *old_view = address_space_to_flatview(as);
1029 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1030 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1031
1032 assert(new_view);
1033
1034 if (old_view == new_view) {
1035 return;
1036 }
1037
1038 if (old_view) {
1039 flatview_ref(old_view);
1040 }
1041
1042 flatview_ref(new_view);
1043
1044 if (!QTAILQ_EMPTY(&as->listeners)) {
1045 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1046
1047 if (!old_view2) {
1048 old_view2 = &tmpview;
1049 }
1050 address_space_update_topology_pass(as, old_view2, new_view, false);
1051 address_space_update_topology_pass(as, old_view2, new_view, true);
1052 }
1053
1054 /* Writes are protected by the BQL. */
1055 qatomic_rcu_set(&as->current_map, new_view);
1056 if (old_view) {
1057 flatview_unref(old_view);
1058 }
1059
1060 /* Note that all the old MemoryRegions are still alive up to this
1061 * point. This relieves most MemoryListeners from the need to
1062 * ref/unref the MemoryRegions they get---unless they use them
1063 * outside the iothread mutex, in which case precise reference
1064 * counting is necessary.
1065 */
1066 if (old_view) {
1067 flatview_unref(old_view);
1068 }
1069 }
1070
1071 static void address_space_update_topology(AddressSpace *as)
1072 {
1073 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1074
1075 flatviews_init();
1076 if (!g_hash_table_lookup(flat_views, physmr)) {
1077 generate_memory_topology(physmr);
1078 }
1079 address_space_set_flatview(as);
1080 }
1081
1082 void memory_region_transaction_begin(void)
1083 {
1084 qemu_flush_coalesced_mmio_buffer();
1085 ++memory_region_transaction_depth;
1086 }
1087
1088 void memory_region_transaction_commit(void)
1089 {
1090 AddressSpace *as;
1091
1092 assert(memory_region_transaction_depth);
1093 assert(qemu_mutex_iothread_locked());
1094
1095 --memory_region_transaction_depth;
1096 if (!memory_region_transaction_depth) {
1097 if (memory_region_update_pending) {
1098 flatviews_reset();
1099
1100 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1101
1102 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1103 address_space_set_flatview(as);
1104 address_space_update_ioeventfds(as);
1105 }
1106 memory_region_update_pending = false;
1107 ioeventfd_update_pending = false;
1108 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1109 } else if (ioeventfd_update_pending) {
1110 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1111 address_space_update_ioeventfds(as);
1112 }
1113 ioeventfd_update_pending = false;
1114 }
1115 }
1116 }
1117
1118 static void memory_region_destructor_none(MemoryRegion *mr)
1119 {
1120 }
1121
1122 static void memory_region_destructor_ram(MemoryRegion *mr)
1123 {
1124 qemu_ram_free(mr->ram_block);
1125 }
1126
1127 static bool memory_region_need_escape(char c)
1128 {
1129 return c == '/' || c == '[' || c == '\\' || c == ']';
1130 }
1131
1132 static char *memory_region_escape_name(const char *name)
1133 {
1134 const char *p;
1135 char *escaped, *q;
1136 uint8_t c;
1137 size_t bytes = 0;
1138
1139 for (p = name; *p; p++) {
1140 bytes += memory_region_need_escape(*p) ? 4 : 1;
1141 }
1142 if (bytes == p - name) {
1143 return g_memdup(name, bytes + 1);
1144 }
1145
1146 escaped = g_malloc(bytes + 1);
1147 for (p = name, q = escaped; *p; p++) {
1148 c = *p;
1149 if (unlikely(memory_region_need_escape(c))) {
1150 *q++ = '\\';
1151 *q++ = 'x';
1152 *q++ = "0123456789abcdef"[c >> 4];
1153 c = "0123456789abcdef"[c & 15];
1154 }
1155 *q++ = c;
1156 }
1157 *q = 0;
1158 return escaped;
1159 }
1160
1161 static void memory_region_do_init(MemoryRegion *mr,
1162 Object *owner,
1163 const char *name,
1164 uint64_t size)
1165 {
1166 mr->size = int128_make64(size);
1167 if (size == UINT64_MAX) {
1168 mr->size = int128_2_64();
1169 }
1170 mr->name = g_strdup(name);
1171 mr->owner = owner;
1172 mr->ram_block = NULL;
1173
1174 if (name) {
1175 char *escaped_name = memory_region_escape_name(name);
1176 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1177
1178 if (!owner) {
1179 owner = container_get(qdev_get_machine(), "/unattached");
1180 }
1181
1182 object_property_add_child(owner, name_array, OBJECT(mr));
1183 object_unref(OBJECT(mr));
1184 g_free(name_array);
1185 g_free(escaped_name);
1186 }
1187 }
1188
1189 void memory_region_init(MemoryRegion *mr,
1190 Object *owner,
1191 const char *name,
1192 uint64_t size)
1193 {
1194 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1195 memory_region_do_init(mr, owner, name, size);
1196 }
1197
1198 static void memory_region_get_container(Object *obj, Visitor *v,
1199 const char *name, void *opaque,
1200 Error **errp)
1201 {
1202 MemoryRegion *mr = MEMORY_REGION(obj);
1203 char *path = (char *)"";
1204
1205 if (mr->container) {
1206 path = object_get_canonical_path(OBJECT(mr->container));
1207 }
1208 visit_type_str(v, name, &path, errp);
1209 if (mr->container) {
1210 g_free(path);
1211 }
1212 }
1213
1214 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1215 const char *part)
1216 {
1217 MemoryRegion *mr = MEMORY_REGION(obj);
1218
1219 return OBJECT(mr->container);
1220 }
1221
1222 static void memory_region_get_priority(Object *obj, Visitor *v,
1223 const char *name, void *opaque,
1224 Error **errp)
1225 {
1226 MemoryRegion *mr = MEMORY_REGION(obj);
1227 int32_t value = mr->priority;
1228
1229 visit_type_int32(v, name, &value, errp);
1230 }
1231
1232 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1233 void *opaque, Error **errp)
1234 {
1235 MemoryRegion *mr = MEMORY_REGION(obj);
1236 uint64_t value = memory_region_size(mr);
1237
1238 visit_type_uint64(v, name, &value, errp);
1239 }
1240
1241 static void memory_region_initfn(Object *obj)
1242 {
1243 MemoryRegion *mr = MEMORY_REGION(obj);
1244 ObjectProperty *op;
1245
1246 mr->ops = &unassigned_mem_ops;
1247 mr->enabled = true;
1248 mr->romd_mode = true;
1249 mr->destructor = memory_region_destructor_none;
1250 QTAILQ_INIT(&mr->subregions);
1251 QTAILQ_INIT(&mr->coalesced);
1252
1253 op = object_property_add(OBJECT(mr), "container",
1254 "link<" TYPE_MEMORY_REGION ">",
1255 memory_region_get_container,
1256 NULL, /* memory_region_set_container */
1257 NULL, NULL);
1258 op->resolve = memory_region_resolve_container;
1259
1260 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1261 &mr->addr, OBJ_PROP_FLAG_READ);
1262 object_property_add(OBJECT(mr), "priority", "uint32",
1263 memory_region_get_priority,
1264 NULL, /* memory_region_set_priority */
1265 NULL, NULL);
1266 object_property_add(OBJECT(mr), "size", "uint64",
1267 memory_region_get_size,
1268 NULL, /* memory_region_set_size, */
1269 NULL, NULL);
1270 }
1271
1272 static void iommu_memory_region_initfn(Object *obj)
1273 {
1274 MemoryRegion *mr = MEMORY_REGION(obj);
1275
1276 mr->is_iommu = true;
1277 }
1278
1279 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1280 unsigned size)
1281 {
1282 #ifdef DEBUG_UNASSIGNED
1283 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1284 #endif
1285 return 0;
1286 }
1287
1288 static void unassigned_mem_write(void *opaque, hwaddr addr,
1289 uint64_t val, unsigned size)
1290 {
1291 #ifdef DEBUG_UNASSIGNED
1292 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1293 #endif
1294 }
1295
1296 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1297 unsigned size, bool is_write,
1298 MemTxAttrs attrs)
1299 {
1300 return false;
1301 }
1302
1303 const MemoryRegionOps unassigned_mem_ops = {
1304 .valid.accepts = unassigned_mem_accepts,
1305 .endianness = DEVICE_NATIVE_ENDIAN,
1306 };
1307
1308 static uint64_t memory_region_ram_device_read(void *opaque,
1309 hwaddr addr, unsigned size)
1310 {
1311 MemoryRegion *mr = opaque;
1312 uint64_t data = (uint64_t)~0;
1313
1314 switch (size) {
1315 case 1:
1316 data = *(uint8_t *)(mr->ram_block->host + addr);
1317 break;
1318 case 2:
1319 data = *(uint16_t *)(mr->ram_block->host + addr);
1320 break;
1321 case 4:
1322 data = *(uint32_t *)(mr->ram_block->host + addr);
1323 break;
1324 case 8:
1325 data = *(uint64_t *)(mr->ram_block->host + addr);
1326 break;
1327 }
1328
1329 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1330
1331 return data;
1332 }
1333
1334 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1335 uint64_t data, unsigned size)
1336 {
1337 MemoryRegion *mr = opaque;
1338
1339 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1340
1341 switch (size) {
1342 case 1:
1343 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1344 break;
1345 case 2:
1346 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1347 break;
1348 case 4:
1349 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1350 break;
1351 case 8:
1352 *(uint64_t *)(mr->ram_block->host + addr) = data;
1353 break;
1354 }
1355 }
1356
1357 static const MemoryRegionOps ram_device_mem_ops = {
1358 .read = memory_region_ram_device_read,
1359 .write = memory_region_ram_device_write,
1360 .endianness = DEVICE_HOST_ENDIAN,
1361 .valid = {
1362 .min_access_size = 1,
1363 .max_access_size = 8,
1364 .unaligned = true,
1365 },
1366 .impl = {
1367 .min_access_size = 1,
1368 .max_access_size = 8,
1369 .unaligned = true,
1370 },
1371 };
1372
1373 bool memory_region_access_valid(MemoryRegion *mr,
1374 hwaddr addr,
1375 unsigned size,
1376 bool is_write,
1377 MemTxAttrs attrs)
1378 {
1379 if (mr->ops->valid.accepts
1380 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1381 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1382 "0x%" HWADDR_PRIX ", size %u, "
1383 "region '%s', reason: rejected\n",
1384 addr, size, memory_region_name(mr));
1385 return false;
1386 }
1387
1388 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1389 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1390 "0x%" HWADDR_PRIX ", size %u, "
1391 "region '%s', reason: unaligned\n",
1392 addr, size, memory_region_name(mr));
1393 return false;
1394 }
1395
1396 /* Treat zero as compatibility all valid */
1397 if (!mr->ops->valid.max_access_size) {
1398 return true;
1399 }
1400
1401 if (size > mr->ops->valid.max_access_size
1402 || size < mr->ops->valid.min_access_size) {
1403 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1404 "0x%" HWADDR_PRIX ", size %u, "
1405 "region '%s', reason: invalid size "
1406 "(min:%u max:%u)\n",
1407 addr, size, memory_region_name(mr),
1408 mr->ops->valid.min_access_size,
1409 mr->ops->valid.max_access_size);
1410 return false;
1411 }
1412 return true;
1413 }
1414
1415 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1416 hwaddr addr,
1417 uint64_t *pval,
1418 unsigned size,
1419 MemTxAttrs attrs)
1420 {
1421 *pval = 0;
1422
1423 if (mr->ops->read) {
1424 return access_with_adjusted_size(addr, pval, size,
1425 mr->ops->impl.min_access_size,
1426 mr->ops->impl.max_access_size,
1427 memory_region_read_accessor,
1428 mr, attrs);
1429 } else {
1430 return access_with_adjusted_size(addr, pval, size,
1431 mr->ops->impl.min_access_size,
1432 mr->ops->impl.max_access_size,
1433 memory_region_read_with_attrs_accessor,
1434 mr, attrs);
1435 }
1436 }
1437
1438 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1439 hwaddr addr,
1440 uint64_t *pval,
1441 MemOp op,
1442 MemTxAttrs attrs)
1443 {
1444 unsigned size = memop_size(op);
1445 MemTxResult r;
1446
1447 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1448 *pval = unassigned_mem_read(mr, addr, size);
1449 return MEMTX_DECODE_ERROR;
1450 }
1451
1452 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1453 adjust_endianness(mr, pval, op);
1454 return r;
1455 }
1456
1457 /* Return true if an eventfd was signalled */
1458 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1459 hwaddr addr,
1460 uint64_t data,
1461 unsigned size,
1462 MemTxAttrs attrs)
1463 {
1464 MemoryRegionIoeventfd ioeventfd = {
1465 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1466 .data = data,
1467 };
1468 unsigned i;
1469
1470 for (i = 0; i < mr->ioeventfd_nb; i++) {
1471 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1472 ioeventfd.e = mr->ioeventfds[i].e;
1473
1474 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1475 event_notifier_set(ioeventfd.e);
1476 return true;
1477 }
1478 }
1479
1480 return false;
1481 }
1482
1483 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1484 hwaddr addr,
1485 uint64_t data,
1486 MemOp op,
1487 MemTxAttrs attrs)
1488 {
1489 unsigned size = memop_size(op);
1490
1491 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1492 unassigned_mem_write(mr, addr, data, size);
1493 return MEMTX_DECODE_ERROR;
1494 }
1495
1496 adjust_endianness(mr, &data, op);
1497
1498 if ((!kvm_eventfds_enabled()) &&
1499 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1500 return MEMTX_OK;
1501 }
1502
1503 if (mr->ops->write) {
1504 return access_with_adjusted_size(addr, &data, size,
1505 mr->ops->impl.min_access_size,
1506 mr->ops->impl.max_access_size,
1507 memory_region_write_accessor, mr,
1508 attrs);
1509 } else {
1510 return
1511 access_with_adjusted_size(addr, &data, size,
1512 mr->ops->impl.min_access_size,
1513 mr->ops->impl.max_access_size,
1514 memory_region_write_with_attrs_accessor,
1515 mr, attrs);
1516 }
1517 }
1518
1519 void memory_region_init_io(MemoryRegion *mr,
1520 Object *owner,
1521 const MemoryRegionOps *ops,
1522 void *opaque,
1523 const char *name,
1524 uint64_t size)
1525 {
1526 memory_region_init(mr, owner, name, size);
1527 mr->ops = ops ? ops : &unassigned_mem_ops;
1528 mr->opaque = opaque;
1529 mr->terminates = true;
1530 }
1531
1532 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1533 Object *owner,
1534 const char *name,
1535 uint64_t size,
1536 Error **errp)
1537 {
1538 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1539 }
1540
1541 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1542 Object *owner,
1543 const char *name,
1544 uint64_t size,
1545 uint32_t ram_flags,
1546 Error **errp)
1547 {
1548 Error *err = NULL;
1549 memory_region_init(mr, owner, name, size);
1550 mr->ram = true;
1551 mr->terminates = true;
1552 mr->destructor = memory_region_destructor_ram;
1553 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1554 if (err) {
1555 mr->size = int128_zero();
1556 object_unparent(OBJECT(mr));
1557 error_propagate(errp, err);
1558 }
1559 }
1560
1561 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1562 Object *owner,
1563 const char *name,
1564 uint64_t size,
1565 uint64_t max_size,
1566 void (*resized)(const char*,
1567 uint64_t length,
1568 void *host),
1569 Error **errp)
1570 {
1571 Error *err = NULL;
1572 memory_region_init(mr, owner, name, size);
1573 mr->ram = true;
1574 mr->terminates = true;
1575 mr->destructor = memory_region_destructor_ram;
1576 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1577 mr, &err);
1578 if (err) {
1579 mr->size = int128_zero();
1580 object_unparent(OBJECT(mr));
1581 error_propagate(errp, err);
1582 }
1583 }
1584
1585 #ifdef CONFIG_POSIX
1586 void memory_region_init_ram_from_file(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 uint64_t align,
1591 uint32_t ram_flags,
1592 const char *path,
1593 bool readonly,
1594 Error **errp)
1595 {
1596 Error *err = NULL;
1597 memory_region_init(mr, owner, name, size);
1598 mr->ram = true;
1599 mr->readonly = readonly;
1600 mr->terminates = true;
1601 mr->destructor = memory_region_destructor_ram;
1602 mr->align = align;
1603 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1604 readonly, &err);
1605 if (err) {
1606 mr->size = int128_zero();
1607 object_unparent(OBJECT(mr));
1608 error_propagate(errp, err);
1609 }
1610 }
1611
1612 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1613 Object *owner,
1614 const char *name,
1615 uint64_t size,
1616 uint32_t ram_flags,
1617 int fd,
1618 ram_addr_t offset,
1619 Error **errp)
1620 {
1621 Error *err = NULL;
1622 memory_region_init(mr, owner, name, size);
1623 mr->ram = true;
1624 mr->terminates = true;
1625 mr->destructor = memory_region_destructor_ram;
1626 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1627 false, &err);
1628 if (err) {
1629 mr->size = int128_zero();
1630 object_unparent(OBJECT(mr));
1631 error_propagate(errp, err);
1632 }
1633 }
1634 #endif
1635
1636 void memory_region_init_ram_ptr(MemoryRegion *mr,
1637 Object *owner,
1638 const char *name,
1639 uint64_t size,
1640 void *ptr)
1641 {
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
1644 mr->terminates = true;
1645 mr->destructor = memory_region_destructor_ram;
1646
1647 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1648 assert(ptr != NULL);
1649 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1650 }
1651
1652 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1653 Object *owner,
1654 const char *name,
1655 uint64_t size,
1656 void *ptr)
1657 {
1658 memory_region_init(mr, owner, name, size);
1659 mr->ram = true;
1660 mr->terminates = true;
1661 mr->ram_device = true;
1662 mr->ops = &ram_device_mem_ops;
1663 mr->opaque = mr;
1664 mr->destructor = memory_region_destructor_ram;
1665
1666 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1667 assert(ptr != NULL);
1668 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1669 }
1670
1671 void memory_region_init_alias(MemoryRegion *mr,
1672 Object *owner,
1673 const char *name,
1674 MemoryRegion *orig,
1675 hwaddr offset,
1676 uint64_t size)
1677 {
1678 memory_region_init(mr, owner, name, size);
1679 mr->alias = orig;
1680 mr->alias_offset = offset;
1681 }
1682
1683 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1684 Object *owner,
1685 const char *name,
1686 uint64_t size,
1687 Error **errp)
1688 {
1689 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1690 mr->readonly = true;
1691 }
1692
1693 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1694 Object *owner,
1695 const MemoryRegionOps *ops,
1696 void *opaque,
1697 const char *name,
1698 uint64_t size,
1699 Error **errp)
1700 {
1701 Error *err = NULL;
1702 assert(ops);
1703 memory_region_init(mr, owner, name, size);
1704 mr->ops = ops;
1705 mr->opaque = opaque;
1706 mr->terminates = true;
1707 mr->rom_device = true;
1708 mr->destructor = memory_region_destructor_ram;
1709 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1710 if (err) {
1711 mr->size = int128_zero();
1712 object_unparent(OBJECT(mr));
1713 error_propagate(errp, err);
1714 }
1715 }
1716
1717 void memory_region_init_iommu(void *_iommu_mr,
1718 size_t instance_size,
1719 const char *mrtypename,
1720 Object *owner,
1721 const char *name,
1722 uint64_t size)
1723 {
1724 struct IOMMUMemoryRegion *iommu_mr;
1725 struct MemoryRegion *mr;
1726
1727 object_initialize(_iommu_mr, instance_size, mrtypename);
1728 mr = MEMORY_REGION(_iommu_mr);
1729 memory_region_do_init(mr, owner, name, size);
1730 iommu_mr = IOMMU_MEMORY_REGION(mr);
1731 mr->terminates = true; /* then re-forwards */
1732 QLIST_INIT(&iommu_mr->iommu_notify);
1733 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1734 }
1735
1736 static void memory_region_finalize(Object *obj)
1737 {
1738 MemoryRegion *mr = MEMORY_REGION(obj);
1739
1740 assert(!mr->container);
1741
1742 /* We know the region is not visible in any address space (it
1743 * does not have a container and cannot be a root either because
1744 * it has no references, so we can blindly clear mr->enabled.
1745 * memory_region_set_enabled instead could trigger a transaction
1746 * and cause an infinite loop.
1747 */
1748 mr->enabled = false;
1749 memory_region_transaction_begin();
1750 while (!QTAILQ_EMPTY(&mr->subregions)) {
1751 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1752 memory_region_del_subregion(mr, subregion);
1753 }
1754 memory_region_transaction_commit();
1755
1756 mr->destructor(mr);
1757 memory_region_clear_coalescing(mr);
1758 g_free((char *)mr->name);
1759 g_free(mr->ioeventfds);
1760 }
1761
1762 Object *memory_region_owner(MemoryRegion *mr)
1763 {
1764 Object *obj = OBJECT(mr);
1765 return obj->parent;
1766 }
1767
1768 void memory_region_ref(MemoryRegion *mr)
1769 {
1770 /* MMIO callbacks most likely will access data that belongs
1771 * to the owner, hence the need to ref/unref the owner whenever
1772 * the memory region is in use.
1773 *
1774 * The memory region is a child of its owner. As long as the
1775 * owner doesn't call unparent itself on the memory region,
1776 * ref-ing the owner will also keep the memory region alive.
1777 * Memory regions without an owner are supposed to never go away;
1778 * we do not ref/unref them because it slows down DMA sensibly.
1779 */
1780 if (mr && mr->owner) {
1781 object_ref(mr->owner);
1782 }
1783 }
1784
1785 void memory_region_unref(MemoryRegion *mr)
1786 {
1787 if (mr && mr->owner) {
1788 object_unref(mr->owner);
1789 }
1790 }
1791
1792 uint64_t memory_region_size(MemoryRegion *mr)
1793 {
1794 if (int128_eq(mr->size, int128_2_64())) {
1795 return UINT64_MAX;
1796 }
1797 return int128_get64(mr->size);
1798 }
1799
1800 const char *memory_region_name(const MemoryRegion *mr)
1801 {
1802 if (!mr->name) {
1803 ((MemoryRegion *)mr)->name =
1804 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1805 }
1806 return mr->name;
1807 }
1808
1809 bool memory_region_is_ram_device(MemoryRegion *mr)
1810 {
1811 return mr->ram_device;
1812 }
1813
1814 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1815 {
1816 uint8_t mask = mr->dirty_log_mask;
1817 RAMBlock *rb = mr->ram_block;
1818
1819 if (global_dirty_log && ((rb && qemu_ram_is_migratable(rb)) ||
1820 memory_region_is_iommu(mr))) {
1821 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1822 }
1823
1824 if (tcg_enabled() && rb) {
1825 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1826 mask |= (1 << DIRTY_MEMORY_CODE);
1827 }
1828 return mask;
1829 }
1830
1831 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1832 {
1833 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1834 }
1835
1836 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1837 Error **errp)
1838 {
1839 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1840 IOMMUNotifier *iommu_notifier;
1841 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1842 int ret = 0;
1843
1844 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1845 flags |= iommu_notifier->notifier_flags;
1846 }
1847
1848 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1849 ret = imrc->notify_flag_changed(iommu_mr,
1850 iommu_mr->iommu_notify_flags,
1851 flags, errp);
1852 }
1853
1854 if (!ret) {
1855 iommu_mr->iommu_notify_flags = flags;
1856 }
1857 return ret;
1858 }
1859
1860 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1861 uint64_t page_size_mask,
1862 Error **errp)
1863 {
1864 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1865 int ret = 0;
1866
1867 if (imrc->iommu_set_page_size_mask) {
1868 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1869 }
1870 return ret;
1871 }
1872
1873 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1874 IOMMUNotifier *n, Error **errp)
1875 {
1876 IOMMUMemoryRegion *iommu_mr;
1877 int ret;
1878
1879 if (mr->alias) {
1880 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1881 }
1882
1883 /* We need to register for at least one bitfield */
1884 iommu_mr = IOMMU_MEMORY_REGION(mr);
1885 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1886 assert(n->start <= n->end);
1887 assert(n->iommu_idx >= 0 &&
1888 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1889
1890 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1891 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1892 if (ret) {
1893 QLIST_REMOVE(n, node);
1894 }
1895 return ret;
1896 }
1897
1898 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1899 {
1900 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1901
1902 if (imrc->get_min_page_size) {
1903 return imrc->get_min_page_size(iommu_mr);
1904 }
1905 return TARGET_PAGE_SIZE;
1906 }
1907
1908 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1909 {
1910 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1911 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1912 hwaddr addr, granularity;
1913 IOMMUTLBEntry iotlb;
1914
1915 /* If the IOMMU has its own replay callback, override */
1916 if (imrc->replay) {
1917 imrc->replay(iommu_mr, n);
1918 return;
1919 }
1920
1921 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1922
1923 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1924 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1925 if (iotlb.perm != IOMMU_NONE) {
1926 n->notify(n, &iotlb);
1927 }
1928
1929 /* if (2^64 - MR size) < granularity, it's possible to get an
1930 * infinite loop here. This should catch such a wraparound */
1931 if ((addr + granularity) < addr) {
1932 break;
1933 }
1934 }
1935 }
1936
1937 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1938 IOMMUNotifier *n)
1939 {
1940 IOMMUMemoryRegion *iommu_mr;
1941
1942 if (mr->alias) {
1943 memory_region_unregister_iommu_notifier(mr->alias, n);
1944 return;
1945 }
1946 QLIST_REMOVE(n, node);
1947 iommu_mr = IOMMU_MEMORY_REGION(mr);
1948 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1949 }
1950
1951 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
1952 IOMMUTLBEvent *event)
1953 {
1954 IOMMUTLBEntry *entry = &event->entry;
1955 hwaddr entry_end = entry->iova + entry->addr_mask;
1956 IOMMUTLBEntry tmp = *entry;
1957
1958 if (event->type == IOMMU_NOTIFIER_UNMAP) {
1959 assert(entry->perm == IOMMU_NONE);
1960 }
1961
1962 /*
1963 * Skip the notification if the notification does not overlap
1964 * with registered range.
1965 */
1966 if (notifier->start > entry_end || notifier->end < entry->iova) {
1967 return;
1968 }
1969
1970 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
1971 /* Crop (iova, addr_mask) to range */
1972 tmp.iova = MAX(tmp.iova, notifier->start);
1973 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
1974 } else {
1975 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1976 }
1977
1978 if (event->type & notifier->notifier_flags) {
1979 notifier->notify(notifier, &tmp);
1980 }
1981 }
1982
1983 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1984 int iommu_idx,
1985 IOMMUTLBEvent event)
1986 {
1987 IOMMUNotifier *iommu_notifier;
1988
1989 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1990
1991 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1992 if (iommu_notifier->iommu_idx == iommu_idx) {
1993 memory_region_notify_iommu_one(iommu_notifier, &event);
1994 }
1995 }
1996 }
1997
1998 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1999 enum IOMMUMemoryRegionAttr attr,
2000 void *data)
2001 {
2002 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2003
2004 if (!imrc->get_attr) {
2005 return -EINVAL;
2006 }
2007
2008 return imrc->get_attr(iommu_mr, attr, data);
2009 }
2010
2011 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2012 MemTxAttrs attrs)
2013 {
2014 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2015
2016 if (!imrc->attrs_to_index) {
2017 return 0;
2018 }
2019
2020 return imrc->attrs_to_index(iommu_mr, attrs);
2021 }
2022
2023 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2024 {
2025 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2026
2027 if (!imrc->num_indexes) {
2028 return 1;
2029 }
2030
2031 return imrc->num_indexes(iommu_mr);
2032 }
2033
2034 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2035 {
2036 if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2037 return NULL;
2038 }
2039 return mr->rdm;
2040 }
2041
2042 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2043 RamDiscardManager *rdm)
2044 {
2045 g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2046 g_assert(!rdm || !mr->rdm);
2047 mr->rdm = rdm;
2048 }
2049
2050 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2051 const MemoryRegion *mr)
2052 {
2053 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2054
2055 g_assert(rdmc->get_min_granularity);
2056 return rdmc->get_min_granularity(rdm, mr);
2057 }
2058
2059 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2060 const MemoryRegionSection *section)
2061 {
2062 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2063
2064 g_assert(rdmc->is_populated);
2065 return rdmc->is_populated(rdm, section);
2066 }
2067
2068 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2069 MemoryRegionSection *section,
2070 ReplayRamPopulate replay_fn,
2071 void *opaque)
2072 {
2073 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2074
2075 g_assert(rdmc->replay_populated);
2076 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2077 }
2078
2079 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2080 RamDiscardListener *rdl,
2081 MemoryRegionSection *section)
2082 {
2083 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2084
2085 g_assert(rdmc->register_listener);
2086 rdmc->register_listener(rdm, rdl, section);
2087 }
2088
2089 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2090 RamDiscardListener *rdl)
2091 {
2092 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2093
2094 g_assert(rdmc->unregister_listener);
2095 rdmc->unregister_listener(rdm, rdl);
2096 }
2097
2098 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2099 {
2100 uint8_t mask = 1 << client;
2101 uint8_t old_logging;
2102
2103 assert(client == DIRTY_MEMORY_VGA);
2104 old_logging = mr->vga_logging_count;
2105 mr->vga_logging_count += log ? 1 : -1;
2106 if (!!old_logging == !!mr->vga_logging_count) {
2107 return;
2108 }
2109
2110 memory_region_transaction_begin();
2111 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2112 memory_region_update_pending |= mr->enabled;
2113 memory_region_transaction_commit();
2114 }
2115
2116 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2117 hwaddr size)
2118 {
2119 assert(mr->ram_block);
2120 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2121 size,
2122 memory_region_get_dirty_log_mask(mr));
2123 }
2124
2125 /*
2126 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2127 * dirty bitmap for the specified memory region.
2128 */
2129 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2130 {
2131 MemoryListener *listener;
2132 AddressSpace *as;
2133 FlatView *view;
2134 FlatRange *fr;
2135
2136 /* If the same address space has multiple log_sync listeners, we
2137 * visit that address space's FlatView multiple times. But because
2138 * log_sync listeners are rare, it's still cheaper than walking each
2139 * address space once.
2140 */
2141 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2142 if (listener->log_sync) {
2143 as = listener->address_space;
2144 view = address_space_get_flatview(as);
2145 FOR_EACH_FLAT_RANGE(fr, view) {
2146 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2147 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2148 listener->log_sync(listener, &mrs);
2149 }
2150 }
2151 flatview_unref(view);
2152 } else if (listener->log_sync_global) {
2153 /*
2154 * No matter whether MR is specified, what we can do here
2155 * is to do a global sync, because we are not capable to
2156 * sync in a finer granularity.
2157 */
2158 listener->log_sync_global(listener);
2159 }
2160 }
2161 }
2162
2163 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2164 hwaddr len)
2165 {
2166 MemoryRegionSection mrs;
2167 MemoryListener *listener;
2168 AddressSpace *as;
2169 FlatView *view;
2170 FlatRange *fr;
2171 hwaddr sec_start, sec_end, sec_size;
2172
2173 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2174 if (!listener->log_clear) {
2175 continue;
2176 }
2177 as = listener->address_space;
2178 view = address_space_get_flatview(as);
2179 FOR_EACH_FLAT_RANGE(fr, view) {
2180 if (!fr->dirty_log_mask || fr->mr != mr) {
2181 /*
2182 * Clear dirty bitmap operation only applies to those
2183 * regions whose dirty logging is at least enabled
2184 */
2185 continue;
2186 }
2187
2188 mrs = section_from_flat_range(fr, view);
2189
2190 sec_start = MAX(mrs.offset_within_region, start);
2191 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2192 sec_end = MIN(sec_end, start + len);
2193
2194 if (sec_start >= sec_end) {
2195 /*
2196 * If this memory region section has no intersection
2197 * with the requested range, skip.
2198 */
2199 continue;
2200 }
2201
2202 /* Valid case; shrink the section if needed */
2203 mrs.offset_within_address_space +=
2204 sec_start - mrs.offset_within_region;
2205 mrs.offset_within_region = sec_start;
2206 sec_size = sec_end - sec_start;
2207 mrs.size = int128_make64(sec_size);
2208 listener->log_clear(listener, &mrs);
2209 }
2210 flatview_unref(view);
2211 }
2212 }
2213
2214 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2215 hwaddr addr,
2216 hwaddr size,
2217 unsigned client)
2218 {
2219 DirtyBitmapSnapshot *snapshot;
2220 assert(mr->ram_block);
2221 memory_region_sync_dirty_bitmap(mr);
2222 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2223 memory_global_after_dirty_log_sync();
2224 return snapshot;
2225 }
2226
2227 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2228 hwaddr addr, hwaddr size)
2229 {
2230 assert(mr->ram_block);
2231 return cpu_physical_memory_snapshot_get_dirty(snap,
2232 memory_region_get_ram_addr(mr) + addr, size);
2233 }
2234
2235 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2236 {
2237 if (mr->readonly != readonly) {
2238 memory_region_transaction_begin();
2239 mr->readonly = readonly;
2240 memory_region_update_pending |= mr->enabled;
2241 memory_region_transaction_commit();
2242 }
2243 }
2244
2245 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2246 {
2247 if (mr->nonvolatile != nonvolatile) {
2248 memory_region_transaction_begin();
2249 mr->nonvolatile = nonvolatile;
2250 memory_region_update_pending |= mr->enabled;
2251 memory_region_transaction_commit();
2252 }
2253 }
2254
2255 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2256 {
2257 if (mr->romd_mode != romd_mode) {
2258 memory_region_transaction_begin();
2259 mr->romd_mode = romd_mode;
2260 memory_region_update_pending |= mr->enabled;
2261 memory_region_transaction_commit();
2262 }
2263 }
2264
2265 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2266 hwaddr size, unsigned client)
2267 {
2268 assert(mr->ram_block);
2269 cpu_physical_memory_test_and_clear_dirty(
2270 memory_region_get_ram_addr(mr) + addr, size, client);
2271 }
2272
2273 int memory_region_get_fd(MemoryRegion *mr)
2274 {
2275 int fd;
2276
2277 RCU_READ_LOCK_GUARD();
2278 while (mr->alias) {
2279 mr = mr->alias;
2280 }
2281 fd = mr->ram_block->fd;
2282
2283 return fd;
2284 }
2285
2286 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2287 {
2288 void *ptr;
2289 uint64_t offset = 0;
2290
2291 RCU_READ_LOCK_GUARD();
2292 while (mr->alias) {
2293 offset += mr->alias_offset;
2294 mr = mr->alias;
2295 }
2296 assert(mr->ram_block);
2297 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2298
2299 return ptr;
2300 }
2301
2302 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2303 {
2304 RAMBlock *block;
2305
2306 block = qemu_ram_block_from_host(ptr, false, offset);
2307 if (!block) {
2308 return NULL;
2309 }
2310
2311 return block->mr;
2312 }
2313
2314 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2315 {
2316 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2317 }
2318
2319 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2320 {
2321 assert(mr->ram_block);
2322
2323 qemu_ram_resize(mr->ram_block, newsize, errp);
2324 }
2325
2326 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2327 {
2328 if (mr->ram_block) {
2329 qemu_ram_msync(mr->ram_block, addr, size);
2330 }
2331 }
2332
2333 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2334 {
2335 /*
2336 * Might be extended case needed to cover
2337 * different types of memory regions
2338 */
2339 if (mr->dirty_log_mask) {
2340 memory_region_msync(mr, addr, size);
2341 }
2342 }
2343
2344 /*
2345 * Call proper memory listeners about the change on the newly
2346 * added/removed CoalescedMemoryRange.
2347 */
2348 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2349 CoalescedMemoryRange *cmr,
2350 bool add)
2351 {
2352 AddressSpace *as;
2353 FlatView *view;
2354 FlatRange *fr;
2355
2356 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2357 view = address_space_get_flatview(as);
2358 FOR_EACH_FLAT_RANGE(fr, view) {
2359 if (fr->mr == mr) {
2360 flat_range_coalesced_io_notify(fr, as, cmr, add);
2361 }
2362 }
2363 flatview_unref(view);
2364 }
2365 }
2366
2367 void memory_region_set_coalescing(MemoryRegion *mr)
2368 {
2369 memory_region_clear_coalescing(mr);
2370 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2371 }
2372
2373 void memory_region_add_coalescing(MemoryRegion *mr,
2374 hwaddr offset,
2375 uint64_t size)
2376 {
2377 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2378
2379 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2380 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2381 memory_region_update_coalesced_range(mr, cmr, true);
2382 memory_region_set_flush_coalesced(mr);
2383 }
2384
2385 void memory_region_clear_coalescing(MemoryRegion *mr)
2386 {
2387 CoalescedMemoryRange *cmr;
2388
2389 if (QTAILQ_EMPTY(&mr->coalesced)) {
2390 return;
2391 }
2392
2393 qemu_flush_coalesced_mmio_buffer();
2394 mr->flush_coalesced_mmio = false;
2395
2396 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2397 cmr = QTAILQ_FIRST(&mr->coalesced);
2398 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2399 memory_region_update_coalesced_range(mr, cmr, false);
2400 g_free(cmr);
2401 }
2402 }
2403
2404 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2405 {
2406 mr->flush_coalesced_mmio = true;
2407 }
2408
2409 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2410 {
2411 qemu_flush_coalesced_mmio_buffer();
2412 if (QTAILQ_EMPTY(&mr->coalesced)) {
2413 mr->flush_coalesced_mmio = false;
2414 }
2415 }
2416
2417 static bool userspace_eventfd_warning;
2418
2419 void memory_region_add_eventfd(MemoryRegion *mr,
2420 hwaddr addr,
2421 unsigned size,
2422 bool match_data,
2423 uint64_t data,
2424 EventNotifier *e)
2425 {
2426 MemoryRegionIoeventfd mrfd = {
2427 .addr.start = int128_make64(addr),
2428 .addr.size = int128_make64(size),
2429 .match_data = match_data,
2430 .data = data,
2431 .e = e,
2432 };
2433 unsigned i;
2434
2435 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2436 userspace_eventfd_warning))) {
2437 userspace_eventfd_warning = true;
2438 error_report("Using eventfd without MMIO binding in KVM. "
2439 "Suboptimal performance expected");
2440 }
2441
2442 if (size) {
2443 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2444 }
2445 memory_region_transaction_begin();
2446 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2447 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2448 break;
2449 }
2450 }
2451 ++mr->ioeventfd_nb;
2452 mr->ioeventfds = g_realloc(mr->ioeventfds,
2453 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2454 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2455 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2456 mr->ioeventfds[i] = mrfd;
2457 ioeventfd_update_pending |= mr->enabled;
2458 memory_region_transaction_commit();
2459 }
2460
2461 void memory_region_del_eventfd(MemoryRegion *mr,
2462 hwaddr addr,
2463 unsigned size,
2464 bool match_data,
2465 uint64_t data,
2466 EventNotifier *e)
2467 {
2468 MemoryRegionIoeventfd mrfd = {
2469 .addr.start = int128_make64(addr),
2470 .addr.size = int128_make64(size),
2471 .match_data = match_data,
2472 .data = data,
2473 .e = e,
2474 };
2475 unsigned i;
2476
2477 if (size) {
2478 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2479 }
2480 memory_region_transaction_begin();
2481 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2482 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2483 break;
2484 }
2485 }
2486 assert(i != mr->ioeventfd_nb);
2487 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2488 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2489 --mr->ioeventfd_nb;
2490 mr->ioeventfds = g_realloc(mr->ioeventfds,
2491 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2492 ioeventfd_update_pending |= mr->enabled;
2493 memory_region_transaction_commit();
2494 }
2495
2496 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2497 {
2498 MemoryRegion *mr = subregion->container;
2499 MemoryRegion *other;
2500
2501 memory_region_transaction_begin();
2502
2503 memory_region_ref(subregion);
2504 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2505 if (subregion->priority >= other->priority) {
2506 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2507 goto done;
2508 }
2509 }
2510 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2511 done:
2512 memory_region_update_pending |= mr->enabled && subregion->enabled;
2513 memory_region_transaction_commit();
2514 }
2515
2516 static void memory_region_add_subregion_common(MemoryRegion *mr,
2517 hwaddr offset,
2518 MemoryRegion *subregion)
2519 {
2520 assert(!subregion->container);
2521 subregion->container = mr;
2522 subregion->addr = offset;
2523 memory_region_update_container_subregions(subregion);
2524 }
2525
2526 void memory_region_add_subregion(MemoryRegion *mr,
2527 hwaddr offset,
2528 MemoryRegion *subregion)
2529 {
2530 subregion->priority = 0;
2531 memory_region_add_subregion_common(mr, offset, subregion);
2532 }
2533
2534 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2535 hwaddr offset,
2536 MemoryRegion *subregion,
2537 int priority)
2538 {
2539 subregion->priority = priority;
2540 memory_region_add_subregion_common(mr, offset, subregion);
2541 }
2542
2543 void memory_region_del_subregion(MemoryRegion *mr,
2544 MemoryRegion *subregion)
2545 {
2546 memory_region_transaction_begin();
2547 assert(subregion->container == mr);
2548 subregion->container = NULL;
2549 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2550 memory_region_unref(subregion);
2551 memory_region_update_pending |= mr->enabled && subregion->enabled;
2552 memory_region_transaction_commit();
2553 }
2554
2555 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2556 {
2557 if (enabled == mr->enabled) {
2558 return;
2559 }
2560 memory_region_transaction_begin();
2561 mr->enabled = enabled;
2562 memory_region_update_pending = true;
2563 memory_region_transaction_commit();
2564 }
2565
2566 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2567 {
2568 Int128 s = int128_make64(size);
2569
2570 if (size == UINT64_MAX) {
2571 s = int128_2_64();
2572 }
2573 if (int128_eq(s, mr->size)) {
2574 return;
2575 }
2576 memory_region_transaction_begin();
2577 mr->size = s;
2578 memory_region_update_pending = true;
2579 memory_region_transaction_commit();
2580 }
2581
2582 static void memory_region_readd_subregion(MemoryRegion *mr)
2583 {
2584 MemoryRegion *container = mr->container;
2585
2586 if (container) {
2587 memory_region_transaction_begin();
2588 memory_region_ref(mr);
2589 memory_region_del_subregion(container, mr);
2590 mr->container = container;
2591 memory_region_update_container_subregions(mr);
2592 memory_region_unref(mr);
2593 memory_region_transaction_commit();
2594 }
2595 }
2596
2597 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2598 {
2599 if (addr != mr->addr) {
2600 mr->addr = addr;
2601 memory_region_readd_subregion(mr);
2602 }
2603 }
2604
2605 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2606 {
2607 assert(mr->alias);
2608
2609 if (offset == mr->alias_offset) {
2610 return;
2611 }
2612
2613 memory_region_transaction_begin();
2614 mr->alias_offset = offset;
2615 memory_region_update_pending |= mr->enabled;
2616 memory_region_transaction_commit();
2617 }
2618
2619 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2620 {
2621 return mr->align;
2622 }
2623
2624 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2625 {
2626 const AddrRange *addr = addr_;
2627 const FlatRange *fr = fr_;
2628
2629 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2630 return -1;
2631 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2632 return 1;
2633 }
2634 return 0;
2635 }
2636
2637 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2638 {
2639 return bsearch(&addr, view->ranges, view->nr,
2640 sizeof(FlatRange), cmp_flatrange_addr);
2641 }
2642
2643 bool memory_region_is_mapped(MemoryRegion *mr)
2644 {
2645 return mr->container ? true : false;
2646 }
2647
2648 /* Same as memory_region_find, but it does not add a reference to the
2649 * returned region. It must be called from an RCU critical section.
2650 */
2651 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2652 hwaddr addr, uint64_t size)
2653 {
2654 MemoryRegionSection ret = { .mr = NULL };
2655 MemoryRegion *root;
2656 AddressSpace *as;
2657 AddrRange range;
2658 FlatView *view;
2659 FlatRange *fr;
2660
2661 addr += mr->addr;
2662 for (root = mr; root->container; ) {
2663 root = root->container;
2664 addr += root->addr;
2665 }
2666
2667 as = memory_region_to_address_space(root);
2668 if (!as) {
2669 return ret;
2670 }
2671 range = addrrange_make(int128_make64(addr), int128_make64(size));
2672
2673 view = address_space_to_flatview(as);
2674 fr = flatview_lookup(view, range);
2675 if (!fr) {
2676 return ret;
2677 }
2678
2679 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2680 --fr;
2681 }
2682
2683 ret.mr = fr->mr;
2684 ret.fv = view;
2685 range = addrrange_intersection(range, fr->addr);
2686 ret.offset_within_region = fr->offset_in_region;
2687 ret.offset_within_region += int128_get64(int128_sub(range.start,
2688 fr->addr.start));
2689 ret.size = range.size;
2690 ret.offset_within_address_space = int128_get64(range.start);
2691 ret.readonly = fr->readonly;
2692 ret.nonvolatile = fr->nonvolatile;
2693 return ret;
2694 }
2695
2696 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2697 hwaddr addr, uint64_t size)
2698 {
2699 MemoryRegionSection ret;
2700 RCU_READ_LOCK_GUARD();
2701 ret = memory_region_find_rcu(mr, addr, size);
2702 if (ret.mr) {
2703 memory_region_ref(ret.mr);
2704 }
2705 return ret;
2706 }
2707
2708 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2709 {
2710 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2711
2712 *tmp = *s;
2713 if (tmp->mr) {
2714 memory_region_ref(tmp->mr);
2715 }
2716 if (tmp->fv) {
2717 bool ret = flatview_ref(tmp->fv);
2718
2719 g_assert(ret);
2720 }
2721 return tmp;
2722 }
2723
2724 void memory_region_section_free_copy(MemoryRegionSection *s)
2725 {
2726 if (s->fv) {
2727 flatview_unref(s->fv);
2728 }
2729 if (s->mr) {
2730 memory_region_unref(s->mr);
2731 }
2732 g_free(s);
2733 }
2734
2735 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2736 {
2737 MemoryRegion *mr;
2738
2739 RCU_READ_LOCK_GUARD();
2740 mr = memory_region_find_rcu(container, addr, 1).mr;
2741 return mr && mr != container;
2742 }
2743
2744 void memory_global_dirty_log_sync(void)
2745 {
2746 memory_region_sync_dirty_bitmap(NULL);
2747 }
2748
2749 void memory_global_after_dirty_log_sync(void)
2750 {
2751 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2752 }
2753
2754 static VMChangeStateEntry *vmstate_change;
2755
2756 void memory_global_dirty_log_start(void)
2757 {
2758 if (vmstate_change) {
2759 qemu_del_vm_change_state_handler(vmstate_change);
2760 vmstate_change = NULL;
2761 }
2762
2763 global_dirty_log = true;
2764
2765 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2766
2767 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2768 memory_region_transaction_begin();
2769 memory_region_update_pending = true;
2770 memory_region_transaction_commit();
2771 }
2772
2773 static void memory_global_dirty_log_do_stop(void)
2774 {
2775 global_dirty_log = false;
2776
2777 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2778 memory_region_transaction_begin();
2779 memory_region_update_pending = true;
2780 memory_region_transaction_commit();
2781
2782 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2783 }
2784
2785 static void memory_vm_change_state_handler(void *opaque, bool running,
2786 RunState state)
2787 {
2788 if (running) {
2789 memory_global_dirty_log_do_stop();
2790
2791 if (vmstate_change) {
2792 qemu_del_vm_change_state_handler(vmstate_change);
2793 vmstate_change = NULL;
2794 }
2795 }
2796 }
2797
2798 void memory_global_dirty_log_stop(void)
2799 {
2800 if (!runstate_is_running()) {
2801 if (vmstate_change) {
2802 return;
2803 }
2804 vmstate_change = qemu_add_vm_change_state_handler(
2805 memory_vm_change_state_handler, NULL);
2806 return;
2807 }
2808
2809 memory_global_dirty_log_do_stop();
2810 }
2811
2812 static void listener_add_address_space(MemoryListener *listener,
2813 AddressSpace *as)
2814 {
2815 FlatView *view;
2816 FlatRange *fr;
2817
2818 if (listener->begin) {
2819 listener->begin(listener);
2820 }
2821 if (global_dirty_log) {
2822 if (listener->log_global_start) {
2823 listener->log_global_start(listener);
2824 }
2825 }
2826
2827 view = address_space_get_flatview(as);
2828 FOR_EACH_FLAT_RANGE(fr, view) {
2829 MemoryRegionSection section = section_from_flat_range(fr, view);
2830
2831 if (listener->region_add) {
2832 listener->region_add(listener, &section);
2833 }
2834 if (fr->dirty_log_mask && listener->log_start) {
2835 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2836 }
2837 }
2838 if (listener->commit) {
2839 listener->commit(listener);
2840 }
2841 flatview_unref(view);
2842 }
2843
2844 static void listener_del_address_space(MemoryListener *listener,
2845 AddressSpace *as)
2846 {
2847 FlatView *view;
2848 FlatRange *fr;
2849
2850 if (listener->begin) {
2851 listener->begin(listener);
2852 }
2853 view = address_space_get_flatview(as);
2854 FOR_EACH_FLAT_RANGE(fr, view) {
2855 MemoryRegionSection section = section_from_flat_range(fr, view);
2856
2857 if (fr->dirty_log_mask && listener->log_stop) {
2858 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2859 }
2860 if (listener->region_del) {
2861 listener->region_del(listener, &section);
2862 }
2863 }
2864 if (listener->commit) {
2865 listener->commit(listener);
2866 }
2867 flatview_unref(view);
2868 }
2869
2870 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2871 {
2872 MemoryListener *other = NULL;
2873
2874 /* Only one of them can be defined for a listener */
2875 assert(!(listener->log_sync && listener->log_sync_global));
2876
2877 listener->address_space = as;
2878 if (QTAILQ_EMPTY(&memory_listeners)
2879 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2880 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2881 } else {
2882 QTAILQ_FOREACH(other, &memory_listeners, link) {
2883 if (listener->priority < other->priority) {
2884 break;
2885 }
2886 }
2887 QTAILQ_INSERT_BEFORE(other, listener, link);
2888 }
2889
2890 if (QTAILQ_EMPTY(&as->listeners)
2891 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2892 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2893 } else {
2894 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2895 if (listener->priority < other->priority) {
2896 break;
2897 }
2898 }
2899 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2900 }
2901
2902 listener_add_address_space(listener, as);
2903 }
2904
2905 void memory_listener_unregister(MemoryListener *listener)
2906 {
2907 if (!listener->address_space) {
2908 return;
2909 }
2910
2911 listener_del_address_space(listener, listener->address_space);
2912 QTAILQ_REMOVE(&memory_listeners, listener, link);
2913 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2914 listener->address_space = NULL;
2915 }
2916
2917 void address_space_remove_listeners(AddressSpace *as)
2918 {
2919 while (!QTAILQ_EMPTY(&as->listeners)) {
2920 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2921 }
2922 }
2923
2924 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2925 {
2926 memory_region_ref(root);
2927 as->root = root;
2928 as->current_map = NULL;
2929 as->ioeventfd_nb = 0;
2930 as->ioeventfds = NULL;
2931 QTAILQ_INIT(&as->listeners);
2932 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2933 as->name = g_strdup(name ? name : "anonymous");
2934 address_space_update_topology(as);
2935 address_space_update_ioeventfds(as);
2936 }
2937
2938 static void do_address_space_destroy(AddressSpace *as)
2939 {
2940 assert(QTAILQ_EMPTY(&as->listeners));
2941
2942 flatview_unref(as->current_map);
2943 g_free(as->name);
2944 g_free(as->ioeventfds);
2945 memory_region_unref(as->root);
2946 }
2947
2948 void address_space_destroy(AddressSpace *as)
2949 {
2950 MemoryRegion *root = as->root;
2951
2952 /* Flush out anything from MemoryListeners listening in on this */
2953 memory_region_transaction_begin();
2954 as->root = NULL;
2955 memory_region_transaction_commit();
2956 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2957
2958 /* At this point, as->dispatch and as->current_map are dummy
2959 * entries that the guest should never use. Wait for the old
2960 * values to expire before freeing the data.
2961 */
2962 as->root = root;
2963 call_rcu(as, do_address_space_destroy, rcu);
2964 }
2965
2966 static const char *memory_region_type(MemoryRegion *mr)
2967 {
2968 if (mr->alias) {
2969 return memory_region_type(mr->alias);
2970 }
2971 if (memory_region_is_ram_device(mr)) {
2972 return "ramd";
2973 } else if (memory_region_is_romd(mr)) {
2974 return "romd";
2975 } else if (memory_region_is_rom(mr)) {
2976 return "rom";
2977 } else if (memory_region_is_ram(mr)) {
2978 return "ram";
2979 } else {
2980 return "i/o";
2981 }
2982 }
2983
2984 typedef struct MemoryRegionList MemoryRegionList;
2985
2986 struct MemoryRegionList {
2987 const MemoryRegion *mr;
2988 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2989 };
2990
2991 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2992
2993 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2994 int128_sub((size), int128_one())) : 0)
2995 #define MTREE_INDENT " "
2996
2997 static void mtree_expand_owner(const char *label, Object *obj)
2998 {
2999 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3000
3001 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3002 if (dev && dev->id) {
3003 qemu_printf(" id=%s", dev->id);
3004 } else {
3005 char *canonical_path = object_get_canonical_path(obj);
3006 if (canonical_path) {
3007 qemu_printf(" path=%s", canonical_path);
3008 g_free(canonical_path);
3009 } else {
3010 qemu_printf(" type=%s", object_get_typename(obj));
3011 }
3012 }
3013 qemu_printf("}");
3014 }
3015
3016 static void mtree_print_mr_owner(const MemoryRegion *mr)
3017 {
3018 Object *owner = mr->owner;
3019 Object *parent = memory_region_owner((MemoryRegion *)mr);
3020
3021 if (!owner && !parent) {
3022 qemu_printf(" orphan");
3023 return;
3024 }
3025 if (owner) {
3026 mtree_expand_owner("owner", owner);
3027 }
3028 if (parent && parent != owner) {
3029 mtree_expand_owner("parent", parent);
3030 }
3031 }
3032
3033 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3034 hwaddr base,
3035 MemoryRegionListHead *alias_print_queue,
3036 bool owner, bool display_disabled)
3037 {
3038 MemoryRegionList *new_ml, *ml, *next_ml;
3039 MemoryRegionListHead submr_print_queue;
3040 const MemoryRegion *submr;
3041 unsigned int i;
3042 hwaddr cur_start, cur_end;
3043
3044 if (!mr) {
3045 return;
3046 }
3047
3048 cur_start = base + mr->addr;
3049 cur_end = cur_start + MR_SIZE(mr->size);
3050
3051 /*
3052 * Try to detect overflow of memory region. This should never
3053 * happen normally. When it happens, we dump something to warn the
3054 * user who is observing this.
3055 */
3056 if (cur_start < base || cur_end < cur_start) {
3057 qemu_printf("[DETECTED OVERFLOW!] ");
3058 }
3059
3060 if (mr->alias) {
3061 MemoryRegionList *ml;
3062 bool found = false;
3063
3064 /* check if the alias is already in the queue */
3065 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3066 if (ml->mr == mr->alias) {
3067 found = true;
3068 }
3069 }
3070
3071 if (!found) {
3072 ml = g_new(MemoryRegionList, 1);
3073 ml->mr = mr->alias;
3074 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3075 }
3076 if (mr->enabled || display_disabled) {
3077 for (i = 0; i < level; i++) {
3078 qemu_printf(MTREE_INDENT);
3079 }
3080 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3081 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
3082 "-" TARGET_FMT_plx "%s",
3083 cur_start, cur_end,
3084 mr->priority,
3085 mr->nonvolatile ? "nv-" : "",
3086 memory_region_type((MemoryRegion *)mr),
3087 memory_region_name(mr),
3088 memory_region_name(mr->alias),
3089 mr->alias_offset,
3090 mr->alias_offset + MR_SIZE(mr->size),
3091 mr->enabled ? "" : " [disabled]");
3092 if (owner) {
3093 mtree_print_mr_owner(mr);
3094 }
3095 qemu_printf("\n");
3096 }
3097 } else {
3098 if (mr->enabled || display_disabled) {
3099 for (i = 0; i < level; i++) {
3100 qemu_printf(MTREE_INDENT);
3101 }
3102 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3103 " (prio %d, %s%s): %s%s",
3104 cur_start, cur_end,
3105 mr->priority,
3106 mr->nonvolatile ? "nv-" : "",
3107 memory_region_type((MemoryRegion *)mr),
3108 memory_region_name(mr),
3109 mr->enabled ? "" : " [disabled]");
3110 if (owner) {
3111 mtree_print_mr_owner(mr);
3112 }
3113 qemu_printf("\n");
3114 }
3115 }
3116
3117 QTAILQ_INIT(&submr_print_queue);
3118
3119 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3120 new_ml = g_new(MemoryRegionList, 1);
3121 new_ml->mr = submr;
3122 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3123 if (new_ml->mr->addr < ml->mr->addr ||
3124 (new_ml->mr->addr == ml->mr->addr &&
3125 new_ml->mr->priority > ml->mr->priority)) {
3126 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3127 new_ml = NULL;
3128 break;
3129 }
3130 }
3131 if (new_ml) {
3132 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3133 }
3134 }
3135
3136 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3137 mtree_print_mr(ml->mr, level + 1, cur_start,
3138 alias_print_queue, owner, display_disabled);
3139 }
3140
3141 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3142 g_free(ml);
3143 }
3144 }
3145
3146 struct FlatViewInfo {
3147 int counter;
3148 bool dispatch_tree;
3149 bool owner;
3150 AccelClass *ac;
3151 };
3152
3153 static void mtree_print_flatview(gpointer key, gpointer value,
3154 gpointer user_data)
3155 {
3156 FlatView *view = key;
3157 GArray *fv_address_spaces = value;
3158 struct FlatViewInfo *fvi = user_data;
3159 FlatRange *range = &view->ranges[0];
3160 MemoryRegion *mr;
3161 int n = view->nr;
3162 int i;
3163 AddressSpace *as;
3164
3165 qemu_printf("FlatView #%d\n", fvi->counter);
3166 ++fvi->counter;
3167
3168 for (i = 0; i < fv_address_spaces->len; ++i) {
3169 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3170 qemu_printf(" AS \"%s\", root: %s",
3171 as->name, memory_region_name(as->root));
3172 if (as->root->alias) {
3173 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3174 }
3175 qemu_printf("\n");
3176 }
3177
3178 qemu_printf(" Root memory region: %s\n",
3179 view->root ? memory_region_name(view->root) : "(none)");
3180
3181 if (n <= 0) {
3182 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3183 return;
3184 }
3185
3186 while (n--) {
3187 mr = range->mr;
3188 if (range->offset_in_region) {
3189 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3190 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3191 int128_get64(range->addr.start),
3192 int128_get64(range->addr.start)
3193 + MR_SIZE(range->addr.size),
3194 mr->priority,
3195 range->nonvolatile ? "nv-" : "",
3196 range->readonly ? "rom" : memory_region_type(mr),
3197 memory_region_name(mr),
3198 range->offset_in_region);
3199 } else {
3200 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3201 " (prio %d, %s%s): %s",
3202 int128_get64(range->addr.start),
3203 int128_get64(range->addr.start)
3204 + MR_SIZE(range->addr.size),
3205 mr->priority,
3206 range->nonvolatile ? "nv-" : "",
3207 range->readonly ? "rom" : memory_region_type(mr),
3208 memory_region_name(mr));
3209 }
3210 if (fvi->owner) {
3211 mtree_print_mr_owner(mr);
3212 }
3213
3214 if (fvi->ac) {
3215 for (i = 0; i < fv_address_spaces->len; ++i) {
3216 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3217 if (fvi->ac->has_memory(current_machine, as,
3218 int128_get64(range->addr.start),
3219 MR_SIZE(range->addr.size) + 1)) {
3220 qemu_printf(" %s", fvi->ac->name);
3221 }
3222 }
3223 }
3224 qemu_printf("\n");
3225 range++;
3226 }
3227
3228 #if !defined(CONFIG_USER_ONLY)
3229 if (fvi->dispatch_tree && view->root) {
3230 mtree_print_dispatch(view->dispatch, view->root);
3231 }
3232 #endif
3233
3234 qemu_printf("\n");
3235 }
3236
3237 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3238 gpointer user_data)
3239 {
3240 FlatView *view = key;
3241 GArray *fv_address_spaces = value;
3242
3243 g_array_unref(fv_address_spaces);
3244 flatview_unref(view);
3245
3246 return true;
3247 }
3248
3249 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3250 {
3251 MemoryRegionListHead ml_head;
3252 MemoryRegionList *ml, *ml2;
3253 AddressSpace *as;
3254
3255 if (flatview) {
3256 FlatView *view;
3257 struct FlatViewInfo fvi = {
3258 .counter = 0,
3259 .dispatch_tree = dispatch_tree,
3260 .owner = owner,
3261 };
3262 GArray *fv_address_spaces;
3263 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3264 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3265
3266 if (ac->has_memory) {
3267 fvi.ac = ac;
3268 }
3269
3270 /* Gather all FVs in one table */
3271 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3272 view = address_space_get_flatview(as);
3273
3274 fv_address_spaces = g_hash_table_lookup(views, view);
3275 if (!fv_address_spaces) {
3276 fv_address_spaces = g_array_new(false, false, sizeof(as));
3277 g_hash_table_insert(views, view, fv_address_spaces);
3278 }
3279
3280 g_array_append_val(fv_address_spaces, as);
3281 }
3282
3283 /* Print */
3284 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3285
3286 /* Free */
3287 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3288 g_hash_table_unref(views);
3289
3290 return;
3291 }
3292
3293 QTAILQ_INIT(&ml_head);
3294
3295 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3296 qemu_printf("address-space: %s\n", as->name);
3297 mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3298 qemu_printf("\n");
3299 }
3300
3301 /* print aliased regions */
3302 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3303 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3304 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3305 qemu_printf("\n");
3306 }
3307
3308 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3309 g_free(ml);
3310 }
3311 }
3312
3313 void memory_region_init_ram(MemoryRegion *mr,
3314 Object *owner,
3315 const char *name,
3316 uint64_t size,
3317 Error **errp)
3318 {
3319 DeviceState *owner_dev;
3320 Error *err = NULL;
3321
3322 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3323 if (err) {
3324 error_propagate(errp, err);
3325 return;
3326 }
3327 /* This will assert if owner is neither NULL nor a DeviceState.
3328 * We only want the owner here for the purposes of defining a
3329 * unique name for migration. TODO: Ideally we should implement
3330 * a naming scheme for Objects which are not DeviceStates, in
3331 * which case we can relax this restriction.
3332 */
3333 owner_dev = DEVICE(owner);
3334 vmstate_register_ram(mr, owner_dev);
3335 }
3336
3337 void memory_region_init_rom(MemoryRegion *mr,
3338 Object *owner,
3339 const char *name,
3340 uint64_t size,
3341 Error **errp)
3342 {
3343 DeviceState *owner_dev;
3344 Error *err = NULL;
3345
3346 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3347 if (err) {
3348 error_propagate(errp, err);
3349 return;
3350 }
3351 /* This will assert if owner is neither NULL nor a DeviceState.
3352 * We only want the owner here for the purposes of defining a
3353 * unique name for migration. TODO: Ideally we should implement
3354 * a naming scheme for Objects which are not DeviceStates, in
3355 * which case we can relax this restriction.
3356 */
3357 owner_dev = DEVICE(owner);
3358 vmstate_register_ram(mr, owner_dev);
3359 }
3360
3361 void memory_region_init_rom_device(MemoryRegion *mr,
3362 Object *owner,
3363 const MemoryRegionOps *ops,
3364 void *opaque,
3365 const char *name,
3366 uint64_t size,
3367 Error **errp)
3368 {
3369 DeviceState *owner_dev;
3370 Error *err = NULL;
3371
3372 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3373 name, size, &err);
3374 if (err) {
3375 error_propagate(errp, err);
3376 return;
3377 }
3378 /* This will assert if owner is neither NULL nor a DeviceState.
3379 * We only want the owner here for the purposes of defining a
3380 * unique name for migration. TODO: Ideally we should implement
3381 * a naming scheme for Objects which are not DeviceStates, in
3382 * which case we can relax this restriction.
3383 */
3384 owner_dev = DEVICE(owner);
3385 vmstate_register_ram(mr, owner_dev);
3386 }
3387
3388 /*
3389 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3390 * the fuzz_dma_read_cb callback
3391 */
3392 #ifdef CONFIG_FUZZ
3393 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3394 size_t len,
3395 MemoryRegion *mr)
3396 {
3397 }
3398 #endif
3399
3400 static const TypeInfo memory_region_info = {
3401 .parent = TYPE_OBJECT,
3402 .name = TYPE_MEMORY_REGION,
3403 .class_size = sizeof(MemoryRegionClass),
3404 .instance_size = sizeof(MemoryRegion),
3405 .instance_init = memory_region_initfn,
3406 .instance_finalize = memory_region_finalize,
3407 };
3408
3409 static const TypeInfo iommu_memory_region_info = {
3410 .parent = TYPE_MEMORY_REGION,
3411 .name = TYPE_IOMMU_MEMORY_REGION,
3412 .class_size = sizeof(IOMMUMemoryRegionClass),
3413 .instance_size = sizeof(IOMMUMemoryRegion),
3414 .instance_init = iommu_memory_region_initfn,
3415 .abstract = true,
3416 };
3417
3418 static const TypeInfo ram_discard_manager_info = {
3419 .parent = TYPE_INTERFACE,
3420 .name = TYPE_RAM_DISCARD_MANAGER,
3421 .class_size = sizeof(RamDiscardManagerClass),
3422 };
3423
3424 static void memory_register_types(void)
3425 {
3426 type_register_static(&memory_region_info);
3427 type_register_static(&iommu_memory_region_info);
3428 type_register_static(&ram_discard_manager_info);
3429 }
3430
3431 type_init(memory_register_types)
AR7 emulation for QEMU