hw/i386/pc_q35.c

   1 /*
   2  * Q35 chipset based pc system emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  * Copyright (c) 2009, 2010
   6  *               Isaku Yamahata <yamahata at valinux co jp>
   7  *               VA Linux Systems Japan K.K.
   8  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   9  *
  10  * This is based on pc.c, but heavily modified.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a copy
  13  * of this software and associated documentation files (the "Software"), to deal
  14  * in the Software without restriction, including without limitation the rights
  15  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  16  * copies of the Software, and to permit persons to whom the Software is
  17  * furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice shall be included in
  20  * all copies or substantial portions of the Software.
  21  *
  22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  27  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  28  * THE SOFTWARE.
  29  */
  30 #include "qemu/osdep.h"
  31 #include "hw/hw.h"
  32 #include "hw/loader.h"
  33 #include "sysemu/arch_init.h"
  34 #include "hw/i2c/smbus.h"
  35 #include "hw/boards.h"
  36 #include "hw/timer/mc146818rtc.h"
  37 #include "hw/xen/xen.h"
  38 #include "sysemu/kvm.h"
  39 #include "hw/kvm/clock.h"
  40 #include "hw/pci-host/q35.h"
  41 #include "exec/address-spaces.h"
  42 #include "hw/i386/ich9.h"
  43 #include "hw/smbios/smbios.h"
  44 #include "hw/ide/pci.h"
  45 #include "hw/ide/ahci.h"
  46 #include "hw/usb.h"
  47 #include "qemu/error-report.h"
  48 #include "migration/migration.h"
  49
  50 /* ICH9 AHCI has 6 ports */
  51 #define MAX_SATA_PORTS     6
  52
  53 /* PC hardware initialisation */
  54 static void pc_q35_init(MachineState *machine)
  55 {
  56     PCMachineState *pcms = PC_MACHINE(machine);
  57     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
  58     Q35PCIHost *q35_host;
  59     PCIHostState *phb;
  60     PCIBus *host_bus;
  61     PCIDevice *lpc;
  62     BusState *idebus[MAX_SATA_PORTS];
  63     ISADevice *rtc_state;
  64     MemoryRegion *pci_memory;
  65     MemoryRegion *rom_memory;
  66     MemoryRegion *ram_memory;
  67     GSIState *gsi_state;
  68     ISABus *isa_bus;
  69     qemu_irq *gsi;
  70     qemu_irq *i8259;
  71     int i;
  72     ICH9LPCState *ich9_lpc;
  73     PCIDevice *ahci;
  74     PcGuestInfo *guest_info;
  75     ram_addr_t lowmem;
  76     DriveInfo *hd[MAX_SATA_PORTS];
  77     MachineClass *mc = MACHINE_GET_CLASS(machine);
  78
  79     /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
  80      * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
  81      * also known as MMCFG).
  82      * If it doesn't, we need to split it in chunks below and above 4G.
  83      * In any case, try to make sure that guest addresses aligned at
  84      * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
  85      * For old machine types, use whatever split we used historically to avoid
  86      * breaking migration.
  87      */
  88     if (machine->ram_size >= 0xb0000000) {
  89         lowmem = pcmc->gigabyte_align ? 0x80000000 : 0xb0000000;
  90     } else {
  91         lowmem = 0xb0000000;
  92     }
  93
  94     /* Handle the machine opt max-ram-below-4g.  It is basically doing
  95      * min(qemu limit, user limit).
  96      */
  97     if (lowmem > pcms->max_ram_below_4g) {
  98         lowmem = pcms->max_ram_below_4g;
  99         if (machine->ram_size - lowmem > lowmem &&
 100             lowmem & ((1ULL << 30) - 1)) {
 101             error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
 102                          ") not a multiple of 1G; possible bad performance.",
 103                          pcms->max_ram_below_4g);
 104         }
 105     }
 106
 107     if (machine->ram_size >= lowmem) {
 108         pcms->above_4g_mem_size = machine->ram_size - lowmem;
 109         pcms->below_4g_mem_size = lowmem;
 110     } else {
 111         pcms->above_4g_mem_size = 0;
 112         pcms->below_4g_mem_size = machine->ram_size;
 113     }
 114
 115     if (xen_enabled()) {
 116         xen_hvm_init(pcms, &ram_memory);
 117     }
 118
 119     pc_cpus_init(pcms);
 120     if (!pcmc->has_acpi_build) {
 121         /* only machine types 1.7 & older need this */
 122         pc_acpi_init("q35-acpi-dsdt.aml");
 123     }
 124
 125     kvmclock_create();
 126
 127     /* pci enabled */
 128     if (pcmc->pci_enabled) {
 129         pci_memory = g_new(MemoryRegion, 1);
 130         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
 131         rom_memory = pci_memory;
 132     } else {
 133         pci_memory = NULL;
 134         rom_memory = get_system_memory();
 135     }
 136
 137     guest_info = pc_guest_info_init(pcms);
 138     guest_info->isapc_ram_fw = false;
 139
 140     if (pcmc->smbios_defaults) {
 141         /* These values are guest ABI, do not change */
 142         smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
 143                             mc->name, pcmc->smbios_legacy_mode,
 144                             pcmc->smbios_uuid_encoded,
 145                             SMBIOS_ENTRY_POINT_21);
 146     }
 147
 148     /* allocate ram and load rom/bios */
 149     if (!xen_enabled()) {
 150         pc_memory_init(pcms, get_system_memory(),
 151                        rom_memory, &ram_memory);
 152     }
 153
 154     /* irq lines */
 155     gsi_state = g_malloc0(sizeof(*gsi_state));
 156     if (kvm_irqchip_in_kernel()) {
 157         kvm_pc_setup_irq_routing(pcmc->pci_enabled);
 158         gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
 159                                  GSI_NUM_PINS);
 160     } else {
 161         gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
 162     }
 163
 164     /* create pci host bus */
 165     q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
 166
 167     object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
 168     q35_host->mch.ram_memory = ram_memory;
 169     q35_host->mch.pci_address_space = pci_memory;
 170     q35_host->mch.system_memory = get_system_memory();
 171     q35_host->mch.address_space_io = get_system_io();
 172     q35_host->mch.below_4g_mem_size = pcms->below_4g_mem_size;
 173     q35_host->mch.above_4g_mem_size = pcms->above_4g_mem_size;
 174     /* pci */
 175     qdev_init_nofail(DEVICE(q35_host));
 176     phb = PCI_HOST_BRIDGE(q35_host);
 177     host_bus = phb->bus;
 178     pcms->bus = phb->bus;
 179     /* create ISA bus */
 180     lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
 181                                           ICH9_LPC_FUNC), true,
 182                                           TYPE_ICH9_LPC_DEVICE);
 183
 184     object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
 185                              TYPE_HOTPLUG_HANDLER,
 186                              (Object **)&pcms->acpi_dev,
 187                              object_property_allow_set_link,
 188                              OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
 189     object_property_set_link(OBJECT(machine), OBJECT(lpc),
 190                              PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
 191
 192     ich9_lpc = ICH9_LPC_DEVICE(lpc);
 193     ich9_lpc->pic = gsi;
 194     ich9_lpc->ioapic = gsi_state->ioapic_irq;
 195     pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
 196                  ICH9_LPC_NB_PIRQS);
 197     pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
 198     isa_bus = ich9_lpc->isa_bus;
 199
 200     /*end early*/
 201     isa_bus_irqs(isa_bus, gsi);
 202
 203     if (kvm_irqchip_in_kernel()) {
 204         i8259 = kvm_i8259_init(isa_bus);
 205     } else if (xen_enabled()) {
 206         i8259 = xen_interrupt_controller_init();
 207     } else {
 208         i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
 209     }
 210
 211     for (i = 0; i < ISA_NUM_IRQS; i++) {
 212         gsi_state->i8259_irq[i] = i8259[i];
 213     }
 214     if (pcmc->pci_enabled) {
 215         ioapic_init_gsi(gsi_state, "q35");
 216     }
 217
 218     pc_register_ferr_irq(gsi[13]);
 219
 220     assert(pcms->vmport != ON_OFF_AUTO__MAX);
 221     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
 222         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
 223     }
 224
 225     /* init basic PC hardware */
 226     pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy,
 227                          (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104);
 228
 229     /* connect pm stuff to lpc */
 230     ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), !mc->no_tco);
 231
 232     /* ahci and SATA device, for q35 1 ahci controller is built-in */
 233     ahci = pci_create_simple_multifunction(host_bus,
 234                                            PCI_DEVFN(ICH9_SATA1_DEV,
 235                                                      ICH9_SATA1_FUNC),
 236                                            true, "ich9-ahci");
 237     idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
 238     idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
 239     g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
 240     ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
 241     ahci_ide_create_devs(ahci, hd);
 242
 243     if (usb_enabled()) {
 244         /* Should we create 6 UHCI according to ich9 spec? */
 245         ehci_create_ich9_with_companions(host_bus, 0x1d);
 246     }
 247
 248     /* TODO: Populate SPD eeprom data.  */
 249     smbus_eeprom_init(ich9_smb_init(host_bus,
 250                                     PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
 251                                     0xb100),
 252                       8, NULL, 0);
 253
 254     pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
 255
 256     /* the rest devices to which pci devfn is automatically assigned */
 257     pc_vga_init(isa_bus, host_bus);
 258     pc_nic_init(isa_bus, host_bus);
 259     if (pcmc->pci_enabled) {
 260         pc_pci_device_init(host_bus);
 261     }
 262 }
 263
 264 /* Looking for a pc_compat_2_4() function? It doesn't exist.
 265  * pc_compat_*() functions that run on machine-init time and
 266  * change global QEMU state are deprecated. Please don't create
 267  * one, and implement any pc-*-2.4 (and newer) compat code in
 268  * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
 269  */
 270
 271 static void pc_compat_2_3(MachineState *machine)
 272 {
 273     PCMachineState *pcms = PC_MACHINE(machine);
 274     savevm_skip_section_footers();
 275     if (kvm_enabled()) {
 276         pcms->smm = ON_OFF_AUTO_OFF;
 277     }
 278     global_state_set_optional();
 279     savevm_skip_configuration();
 280 }
 281
 282 static void pc_compat_2_2(MachineState *machine)
 283 {
 284     pc_compat_2_3(machine);
 285     machine->suppress_vmdesc = true;
 286 }
 287
 288 static void pc_compat_2_1(MachineState *machine)
 289 {
 290     pc_compat_2_2(machine);
 291     x86_cpu_change_kvm_default("svm", NULL);
 292 }
 293
 294 static void pc_compat_2_0(MachineState *machine)
 295 {
 296     pc_compat_2_1(machine);
 297 }
 298
 299 static void pc_compat_1_7(MachineState *machine)
 300 {
 301     pc_compat_2_0(machine);
 302     x86_cpu_change_kvm_default("x2apic", NULL);
 303 }
 304
 305 static void pc_compat_1_6(MachineState *machine)
 306 {
 307     pc_compat_1_7(machine);
 308 }
 309
 310 static void pc_compat_1_5(MachineState *machine)
 311 {
 312     pc_compat_1_6(machine);
 313 }
 314
 315 static void pc_compat_1_4(MachineState *machine)
 316 {
 317     pc_compat_1_5(machine);
 318 }
 319
 320 #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
 321     static void pc_init_##suffix(MachineState *machine) \
 322     { \
 323         void (*compat)(MachineState *m) = (compatfn); \
 324         if (compat) { \
 325             compat(machine); \
 326         } \
 327         pc_q35_init(machine); \
 328     } \
 329     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
 330
 331
 332 static void pc_q35_machine_options(MachineClass *m)
 333 {
 334     m->family = "pc_q35";
 335     m->desc = "Standard PC (Q35 + ICH9, 2009)";
 336     m->hot_add_cpu = pc_hot_add_cpu;
 337     m->units_per_default_bus = 1;
 338     m->default_machine_opts = "firmware=bios-256k.bin";
 339     m->default_display = "std";
 340     m->no_floppy = 1;
 341     m->no_tco = 0;
 342 }
 343
 344 static void pc_q35_2_6_machine_options(MachineClass *m)
 345 {
 346     pc_q35_machine_options(m);
 347     m->alias = "q35";
 348 }
 349
 350 DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
 351                    pc_q35_2_6_machine_options);
 352
 353 static void pc_q35_2_5_machine_options(MachineClass *m)
 354 {
 355     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 356     pc_q35_2_6_machine_options(m);
 357     m->alias = NULL;
 358     pcmc->save_tsc_khz = false;
 359     SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
 360 }
 361
 362 DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
 363                    pc_q35_2_5_machine_options);
 364
 365 static void pc_q35_2_4_machine_options(MachineClass *m)
 366 {
 367     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 368     pc_q35_2_5_machine_options(m);
 369     m->hw_version = "2.4.0";
 370     pcmc->broken_reserved_end = true;
 371     SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
 372 }
 373
 374 DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
 375                    pc_q35_2_4_machine_options);
 376
 377
 378 static void pc_q35_2_3_machine_options(MachineClass *m)
 379 {
 380     pc_q35_2_4_machine_options(m);
 381     m->hw_version = "2.3.0";
 382     m->no_floppy = 0;
 383     m->no_tco = 1;
 384     SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
 385 }
 386
 387 DEFINE_Q35_MACHINE(v2_3, "pc-q35-2.3", pc_compat_2_3,
 388                    pc_q35_2_3_machine_options);
 389
 390
 391 static void pc_q35_2_2_machine_options(MachineClass *m)
 392 {
 393     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 394     pc_q35_2_3_machine_options(m);
 395     m->hw_version = "2.2.0";
 396     SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
 397     pcmc->rsdp_in_ram = false;
 398 }
 399
 400 DEFINE_Q35_MACHINE(v2_2, "pc-q35-2.2", pc_compat_2_2,
 401                    pc_q35_2_2_machine_options);
 402
 403
 404 static void pc_q35_2_1_machine_options(MachineClass *m)
 405 {
 406     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 407     pc_q35_2_2_machine_options(m);
 408     m->hw_version = "2.1.0";
 409     m->default_display = NULL;
 410     SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
 411     pcmc->smbios_uuid_encoded = false;
 412     pcmc->enforce_aligned_dimm = false;
 413 }
 414
 415 DEFINE_Q35_MACHINE(v2_1, "pc-q35-2.1", pc_compat_2_1,
 416                    pc_q35_2_1_machine_options);
 417
 418
 419 static void pc_q35_2_0_machine_options(MachineClass *m)
 420 {
 421     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 422     pc_q35_2_1_machine_options(m);
 423     m->hw_version = "2.0.0";
 424     SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
 425     pcmc->has_reserved_memory = false;
 426     pcmc->smbios_legacy_mode = true;
 427     pcmc->acpi_data_size = 0x10000;
 428 }
 429
 430 DEFINE_Q35_MACHINE(v2_0, "pc-q35-2.0", pc_compat_2_0,
 431                    pc_q35_2_0_machine_options);
 432
 433
 434 static void pc_q35_1_7_machine_options(MachineClass *m)
 435 {
 436     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 437     pc_q35_2_0_machine_options(m);
 438     m->hw_version = "1.7.0";
 439     m->default_machine_opts = NULL;
 440     m->option_rom_has_mr = true;
 441     SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
 442     pcmc->smbios_defaults = false;
 443     pcmc->gigabyte_align = false;
 444 }
 445
 446 DEFINE_Q35_MACHINE(v1_7, "pc-q35-1.7", pc_compat_1_7,
 447                    pc_q35_1_7_machine_options);
 448
 449
 450 static void pc_q35_1_6_machine_options(MachineClass *m)
 451 {
 452     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 453     pc_q35_machine_options(m);
 454     m->hw_version = "1.6.0";
 455     m->rom_file_has_mr = false;
 456     SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
 457     pcmc->has_acpi_build = false;
 458 }
 459
 460 DEFINE_Q35_MACHINE(v1_6, "pc-q35-1.6", pc_compat_1_6,
 461                    pc_q35_1_6_machine_options);
 462
 463
 464 static void pc_q35_1_5_machine_options(MachineClass *m)
 465 {
 466     pc_q35_1_6_machine_options(m);
 467     m->hw_version = "1.5.0";
 468     SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
 469 }
 470
 471 DEFINE_Q35_MACHINE(v1_5, "pc-q35-1.5", pc_compat_1_5,
 472                    pc_q35_1_5_machine_options);
 473
 474
 475 static void pc_q35_1_4_machine_options(MachineClass *m)
 476 {
 477     pc_q35_1_5_machine_options(m);
 478     m->hw_version = "1.4.0";
 479     m->hot_add_cpu = NULL;
 480     SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
 481 }
 482
 483 DEFINE_Q35_MACHINE(v1_4, "pc-q35-1.4", pc_compat_1_4,
 484                    pc_q35_1_4_machine_options);