2 * QEMU 16550A UART emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "chardev/char-fe.h"
30 #include "exec/memory.h"
31 #include "qemu/fifo8.h"
32 #include "chardev/char.h"
33 #include "hw/sysbus.h"
34 #include "qom/object.h"
36 #define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */
42 uint8_t rbr
; /* receive register */
43 uint8_t thr
; /* transmit holding register */
44 uint8_t tsr
; /* transmit shift register */
46 uint8_t iir
; /* read only */
49 uint8_t lsr
; /* read only */
50 uint8_t msr
; /* read only */
53 uint8_t fcr_vmstate
; /* we can't write directly this value
54 it has side effects */
55 /* NOTE: this hidden state is necessary for tx irq generation as
56 it can be reset while reading iir */
60 int last_break_enable
;
66 /* Time when the last byte was successfully sent out of the tsr */
67 uint64_t last_xmit_ts
;
70 /* Interrupt trigger level for recv_fifo */
71 uint8_t recv_fifo_itl
;
73 QEMUTimer
*fifo_timeout_timer
;
74 int timeout_ipending
; /* timeout interrupt pending state */
76 uint64_t char_transmit_time
; /* time to transmit a char in ticks */
79 QEMUTimer
*modem_status_poll
;
82 typedef struct SerialState SerialState
;
93 extern const VMStateDescription vmstate_serial
;
94 extern const MemoryRegionOps serial_io_ops
;
96 void serial_set_frequency(SerialState
*s
, uint32_t frequency
);
98 #define TYPE_SERIAL "serial"
99 OBJECT_DECLARE_SIMPLE_TYPE(SerialState
, SERIAL
)
101 #define TYPE_SERIAL_MM "serial-mm"
102 OBJECT_DECLARE_SIMPLE_TYPE(SerialMM
, SERIAL_MM
)
104 SerialMM
*serial_mm_init(MemoryRegion
*address_space
,
105 hwaddr base
, int regshift
,
106 qemu_irq irq
, int baudbase
,
107 Chardev
*chr
, enum device_endian end
);
111 #define MAX_ISA_SERIAL_PORTS 4
113 #define TYPE_ISA_SERIAL "isa-serial"
114 void serial_hds_isa_init(ISABus
*bus
, int from
, int to
);