target/mips/tcg/tcg-internal.h

   1 /*
   2  * MIPS internal definitions and helpers (TCG accelerator)
   3  *
   4  * SPDX-License-Identifier: GPL-2.0-or-later
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef MIPS_TCG_INTERNAL_H
  11 #define MIPS_TCG_INTERNAL_H
  12
  13 #include "tcg/tcg.h"
  14 #include "exec/memattrs.h"
  15 #include "hw/core/cpu.h"
  16 #include "cpu.h"
  17
  18 void mips_tcg_init(void);
  19
  20 void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
  21 G_NORETURN void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
  22                                              MMUAccessType access_type, int mmu_idx,
  23                                              uintptr_t retaddr);
  24 void mips_restore_state_to_opc(CPUState *cs,
  25                                const TranslationBlock *tb,
  26                                const uint64_t *data);
  27
  28 const char *mips_exception_name(int32_t exception);
  29
  30 G_NORETURN void do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
  31                                        int error_code, uintptr_t pc);
  32
  33 static inline G_NORETURN
  34 void do_raise_exception(CPUMIPSState *env,
  35                         uint32_t exception,
  36                         uintptr_t pc)
  37 {
  38     do_raise_exception_err(env, exception, 0, pc);
  39 }
  40
  41 #if !defined(CONFIG_USER_ONLY)
  42
  43 void mips_cpu_do_interrupt(CPUState *cpu);
  44 bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
  45
  46 void mmu_init(CPUMIPSState *env, const mips_def_t *def);
  47
  48 void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
  49
  50 void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
  51 uint32_t cpu_mips_get_random(CPUMIPSState *env);
  52
  53 bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb);
  54
  55 hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
  56                                   MMUAccessType access_type, uintptr_t retaddr);
  57 void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
  58                                     vaddr addr, unsigned size,
  59                                     MMUAccessType access_type,
  60                                     int mmu_idx, MemTxAttrs attrs,
  61                                     MemTxResult response, uintptr_t retaddr);
  62 void cpu_mips_tlb_flush(CPUMIPSState *env);
  63
  64 bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
  65                        MMUAccessType access_type, int mmu_idx,
  66                        bool probe, uintptr_t retaddr);
  67
  68 void mips_semihosting(CPUMIPSState *env);
  69
  70 #endif /* !CONFIG_USER_ONLY */
  71
  72 #endif