Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
[qemu/ar7.git] / cpu-exec.c
blob75694f3bb39b35213c9d26fe50683bd6140037e5
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "config.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "tcg.h"
24 #include "qemu/atomic.h"
25 #include "sysemu/qtest.h"
26 #include "qemu/timer.h"
27 #include "exec/address-spaces.h"
28 #include "exec/memory-internal.h"
29 #include "qemu/rcu.h"
30 #include "exec/tb-hash.h"
32 /* -icount align implementation. */
34 typedef struct SyncClocks {
35 int64_t diff_clk;
36 int64_t last_cpu_icount;
37 int64_t realtime_clock;
38 } SyncClocks;
40 #if !defined(CONFIG_USER_ONLY)
41 /* Allow the guest to have a max 3ms advance.
42 * The difference between the 2 clocks could therefore
43 * oscillate around 0.
45 #define VM_CLOCK_ADVANCE 3000000
46 #define THRESHOLD_REDUCE 1.5
47 #define MAX_DELAY_PRINT_RATE 2000000000LL
48 #define MAX_NB_PRINTS 100
50 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
52 int64_t cpu_icount;
54 if (!icount_align_option) {
55 return;
58 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
59 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
60 sc->last_cpu_icount = cpu_icount;
62 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
63 #ifndef _WIN32
64 struct timespec sleep_delay, rem_delay;
65 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
66 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
67 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
68 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
69 } else {
70 sc->diff_clk = 0;
72 #else
73 Sleep(sc->diff_clk / SCALE_MS);
74 sc->diff_clk = 0;
75 #endif
79 static void print_delay(const SyncClocks *sc)
81 static float threshold_delay;
82 static int64_t last_realtime_clock;
83 static int nb_prints;
85 if (icount_align_option &&
86 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
87 nb_prints < MAX_NB_PRINTS) {
88 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
89 (-sc->diff_clk / (float)1000000000LL <
90 (threshold_delay - THRESHOLD_REDUCE))) {
91 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
92 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
93 threshold_delay - 1,
94 threshold_delay);
95 nb_prints++;
96 last_realtime_clock = sc->realtime_clock;
101 static void init_delay_params(SyncClocks *sc,
102 const CPUState *cpu)
104 if (!icount_align_option) {
105 return;
107 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
108 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
109 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
110 if (sc->diff_clk < max_delay) {
111 max_delay = sc->diff_clk;
113 if (sc->diff_clk > max_advance) {
114 max_advance = sc->diff_clk;
117 /* Print every 2s max if the guest is late. We limit the number
118 of printed messages to NB_PRINT_MAX(currently 100) */
119 print_delay(sc);
121 #else
122 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
126 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
129 #endif /* CONFIG USER ONLY */
131 void cpu_loop_exit(CPUState *cpu)
133 cpu->current_tb = NULL;
134 siglongjmp(cpu->jmp_env, 1);
137 /* exit the current TB from a signal handler. The host registers are
138 restored in a state compatible with the CPU emulator
140 #if defined(CONFIG_SOFTMMU)
141 void cpu_resume_from_signal(CPUState *cpu, void *puc)
143 /* XXX: restore cpu registers saved in host registers */
145 cpu->exception_index = -1;
146 siglongjmp(cpu->jmp_env, 1);
149 void cpu_reload_memory_map(CPUState *cpu)
151 AddressSpaceDispatch *d;
153 if (qemu_in_vcpu_thread()) {
154 /* Do not let the guest prolong the critical section as much as it
155 * as it desires.
157 * Currently, this is prevented by the I/O thread's periodinc kicking
158 * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
159 * but this will go away once TCG's execution moves out of the global
160 * mutex.
162 * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
163 * only protects cpu->as->dispatch. Since we reload it below, we can
164 * split the critical section.
166 rcu_read_unlock();
167 rcu_read_lock();
170 /* The CPU and TLB are protected by the iothread lock. */
171 d = atomic_rcu_read(&cpu->as->dispatch);
172 cpu->memory_dispatch = d;
173 tlb_flush(cpu, 1);
175 #endif
177 /* Execute a TB, and fix up the CPU state afterwards if necessary */
178 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
180 CPUArchState *env = cpu->env_ptr;
181 uintptr_t next_tb;
183 #if defined(DEBUG_DISAS)
184 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
185 #if defined(TARGET_I386)
186 log_cpu_state(cpu, CPU_DUMP_CCOP);
187 #elif defined(TARGET_M68K)
188 /* ??? Should not modify env state for dumping. */
189 cpu_m68k_flush_flags(env, env->cc_op);
190 env->cc_op = CC_OP_FLAGS;
191 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
192 log_cpu_state(cpu, 0);
193 #else
194 log_cpu_state(cpu, 0);
195 #endif
197 #endif /* DEBUG_DISAS */
199 cpu->can_do_io = 0;
200 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
201 cpu->can_do_io = 1;
202 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
203 next_tb & TB_EXIT_MASK);
205 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
206 /* We didn't start executing this TB (eg because the instruction
207 * counter hit zero); we must restore the guest PC to the address
208 * of the start of the TB.
210 CPUClass *cc = CPU_GET_CLASS(cpu);
211 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
212 if (cc->synchronize_from_tb) {
213 cc->synchronize_from_tb(cpu, tb);
214 } else {
215 assert(cc->set_pc);
216 cc->set_pc(cpu, tb->pc);
219 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
220 /* We were asked to stop executing TBs (probably a pending
221 * interrupt. We've now stopped, so clear the flag.
223 cpu->tcg_exit_req = 0;
225 return next_tb;
228 /* Execute the code without caching the generated code. An interpreter
229 could be used if available. */
230 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
231 TranslationBlock *orig_tb)
233 TranslationBlock *tb;
234 target_ulong pc = orig_tb->pc;
235 target_ulong cs_base = orig_tb->cs_base;
236 uint64_t flags = orig_tb->flags;
238 /* Should never happen.
239 We only end up here when an existing TB is too long. */
240 if (max_cycles > CF_COUNT_MASK)
241 max_cycles = CF_COUNT_MASK;
243 /* tb_gen_code can flush our orig_tb, invalidate it now */
244 tb_phys_invalidate(orig_tb, -1);
245 tb = tb_gen_code(cpu, pc, cs_base, flags,
246 max_cycles | CF_NOCACHE);
247 cpu->current_tb = tb;
248 /* execute the generated code */
249 trace_exec_tb_nocache(tb, tb->pc);
250 cpu_tb_exec(cpu, tb->tc_ptr);
251 cpu->current_tb = NULL;
252 tb_phys_invalidate(tb, -1);
253 tb_free(tb);
256 static TranslationBlock *tb_find_slow(CPUState *cpu,
257 target_ulong pc,
258 target_ulong cs_base,
259 uint64_t flags)
261 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
262 TranslationBlock *tb, **ptb1;
263 unsigned int h;
264 tb_page_addr_t phys_pc, phys_page1;
265 target_ulong virt_page2;
267 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
269 /* find translated block using physical mappings */
270 phys_pc = get_page_addr_code(env, pc);
271 phys_page1 = phys_pc & TARGET_PAGE_MASK;
272 h = tb_phys_hash_func(phys_pc);
273 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
274 for(;;) {
275 tb = *ptb1;
276 if (!tb)
277 goto not_found;
278 if (tb->pc == pc &&
279 tb->page_addr[0] == phys_page1 &&
280 tb->cs_base == cs_base &&
281 tb->flags == flags) {
282 /* check next page if needed */
283 if (tb->page_addr[1] != -1) {
284 tb_page_addr_t phys_page2;
286 virt_page2 = (pc & TARGET_PAGE_MASK) +
287 TARGET_PAGE_SIZE;
288 phys_page2 = get_page_addr_code(env, virt_page2);
289 if (tb->page_addr[1] == phys_page2)
290 goto found;
291 } else {
292 goto found;
295 ptb1 = &tb->phys_hash_next;
297 not_found:
298 /* if no translated code available, then translate it now */
299 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
301 found:
302 /* Move the last found TB to the head of the list */
303 if (likely(*ptb1)) {
304 *ptb1 = tb->phys_hash_next;
305 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
306 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
308 /* we add the TB in the virtual pc hash table */
309 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
310 return tb;
313 static inline TranslationBlock *tb_find_fast(CPUState *cpu)
315 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
316 TranslationBlock *tb;
317 target_ulong cs_base, pc;
318 int flags;
320 /* we record a subset of the CPU state. It will
321 always be the same before a given translated block
322 is executed. */
323 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
324 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
325 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
326 tb->flags != flags)) {
327 tb = tb_find_slow(cpu, pc, cs_base, flags);
329 return tb;
332 static void cpu_handle_debug_exception(CPUState *cpu)
334 CPUClass *cc = CPU_GET_CLASS(cpu);
335 CPUWatchpoint *wp;
337 if (!cpu->watchpoint_hit) {
338 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
339 wp->flags &= ~BP_WATCHPOINT_HIT;
343 cc->debug_excp_handler(cpu);
346 /* main execution loop */
348 volatile sig_atomic_t exit_request;
350 int cpu_exec(CPUState *cpu)
352 CPUClass *cc = CPU_GET_CLASS(cpu);
353 #ifdef TARGET_I386
354 X86CPU *x86_cpu = X86_CPU(cpu);
355 CPUArchState *env = &x86_cpu->env;
356 #endif
357 int ret, interrupt_request;
358 TranslationBlock *tb;
359 uint8_t *tc_ptr;
360 uintptr_t next_tb;
361 SyncClocks sc;
363 /* This must be volatile so it is not trashed by longjmp() */
364 volatile bool have_tb_lock = false;
366 if (cpu->halted) {
367 if (!cpu_has_work(cpu)) {
368 return EXCP_HALTED;
371 cpu->halted = 0;
374 current_cpu = cpu;
376 /* As long as current_cpu is null, up to the assignment just above,
377 * requests by other threads to exit the execution loop are expected to
378 * be issued using the exit_request global. We must make sure that our
379 * evaluation of the global value is performed past the current_cpu
380 * value transition point, which requires a memory barrier as well as
381 * an instruction scheduling constraint on modern architectures. */
382 smp_mb();
384 rcu_read_lock();
386 if (unlikely(exit_request)) {
387 cpu->exit_request = 1;
390 cc->cpu_exec_enter(cpu);
392 /* Calculate difference between guest clock and host clock.
393 * This delay includes the delay of the last cycle, so
394 * what we have to do is sleep until it is 0. As for the
395 * advance/delay we gain here, we try to fix it next time.
397 init_delay_params(&sc, cpu);
399 /* prepare setjmp context for exception handling */
400 for(;;) {
401 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
402 /* if an exception is pending, we execute it here */
403 if (cpu->exception_index >= 0) {
404 if (cpu->exception_index >= EXCP_INTERRUPT) {
405 /* exit request from the cpu execution loop */
406 ret = cpu->exception_index;
407 if (ret == EXCP_DEBUG) {
408 cpu_handle_debug_exception(cpu);
410 cpu->exception_index = -1;
411 break;
412 } else {
413 #if defined(CONFIG_USER_ONLY)
414 /* if user mode only, we simulate a fake exception
415 which will be handled outside the cpu execution
416 loop */
417 #if defined(TARGET_I386)
418 cc->do_interrupt(cpu);
419 #endif
420 ret = cpu->exception_index;
421 cpu->exception_index = -1;
422 break;
423 #else
424 cc->do_interrupt(cpu);
425 cpu->exception_index = -1;
426 #endif
430 next_tb = 0; /* force lookup of first TB */
431 for(;;) {
432 interrupt_request = cpu->interrupt_request;
433 if (unlikely(interrupt_request)) {
434 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
435 /* Mask out external interrupts for this step. */
436 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
438 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
439 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
440 cpu->exception_index = EXCP_DEBUG;
441 cpu_loop_exit(cpu);
443 if (interrupt_request & CPU_INTERRUPT_HALT) {
444 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
445 cpu->halted = 1;
446 cpu->exception_index = EXCP_HLT;
447 cpu_loop_exit(cpu);
449 #if defined(TARGET_I386)
450 if (interrupt_request & CPU_INTERRUPT_INIT) {
451 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
452 do_cpu_init(x86_cpu);
453 cpu->exception_index = EXCP_HALTED;
454 cpu_loop_exit(cpu);
456 #else
457 if (interrupt_request & CPU_INTERRUPT_RESET) {
458 cpu_reset(cpu);
460 #endif
461 /* The target hook has 3 exit conditions:
462 False when the interrupt isn't processed,
463 True when it is, and we should restart on a new TB,
464 and via longjmp via cpu_loop_exit. */
465 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
466 next_tb = 0;
468 /* Don't use the cached interrupt_request value,
469 do_interrupt may have updated the EXITTB flag. */
470 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
471 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
472 /* ensure that no TB jump will be modified as
473 the program flow was changed */
474 next_tb = 0;
477 if (unlikely(cpu->exit_request)) {
478 cpu->exit_request = 0;
479 cpu->exception_index = EXCP_INTERRUPT;
480 cpu_loop_exit(cpu);
482 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
483 have_tb_lock = true;
484 tb = tb_find_fast(cpu);
485 /* Note: we do it here to avoid a gcc bug on Mac OS X when
486 doing it in tb_find_slow */
487 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
488 /* as some TB could have been invalidated because
489 of memory exceptions while generating the code, we
490 must recompute the hash index here */
491 next_tb = 0;
492 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
494 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
495 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
496 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
498 /* see if we can patch the calling TB. When the TB
499 spans two pages, we cannot safely do a direct
500 jump. */
501 if (next_tb != 0 && tb->page_addr[1] == -1) {
502 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
503 next_tb & TB_EXIT_MASK, tb);
505 have_tb_lock = false;
506 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
508 /* cpu_interrupt might be called while translating the
509 TB, but before it is linked into a potentially
510 infinite loop and becomes env->current_tb. Avoid
511 starting execution if there is a pending interrupt. */
512 cpu->current_tb = tb;
513 barrier();
514 if (likely(!cpu->exit_request)) {
515 trace_exec_tb(tb, tb->pc);
516 tc_ptr = tb->tc_ptr;
517 /* execute the generated code */
518 next_tb = cpu_tb_exec(cpu, tc_ptr);
519 switch (next_tb & TB_EXIT_MASK) {
520 case TB_EXIT_REQUESTED:
521 /* Something asked us to stop executing
522 * chained TBs; just continue round the main
523 * loop. Whatever requested the exit will also
524 * have set something else (eg exit_request or
525 * interrupt_request) which we will handle
526 * next time around the loop.
528 next_tb = 0;
529 break;
530 case TB_EXIT_ICOUNT_EXPIRED:
532 /* Instruction counter expired. */
533 int insns_left = cpu->icount_decr.u32;
534 if (cpu->icount_extra && insns_left >= 0) {
535 /* Refill decrementer and continue execution. */
536 cpu->icount_extra += insns_left;
537 insns_left = MIN(0xffff, cpu->icount_extra);
538 cpu->icount_extra -= insns_left;
539 cpu->icount_decr.u16.low = insns_left;
540 } else {
541 if (insns_left > 0) {
542 /* Execute remaining instructions. */
543 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
544 cpu_exec_nocache(cpu, insns_left, tb);
545 align_clocks(&sc, cpu);
547 cpu->exception_index = EXCP_INTERRUPT;
548 next_tb = 0;
549 cpu_loop_exit(cpu);
551 break;
553 default:
554 break;
557 cpu->current_tb = NULL;
558 /* Try to align the host and virtual clocks
559 if the guest is in advance */
560 align_clocks(&sc, cpu);
561 /* reset soft MMU for next block (it can currently
562 only be set by a memory fault) */
563 } /* for(;;) */
564 } else {
565 /* Reload env after longjmp - the compiler may have smashed all
566 * local variables as longjmp is marked 'noreturn'. */
567 cpu = current_cpu;
568 cc = CPU_GET_CLASS(cpu);
569 cpu->can_do_io = 1;
570 #ifdef TARGET_I386
571 x86_cpu = X86_CPU(cpu);
572 env = &x86_cpu->env;
573 #endif
574 if (have_tb_lock) {
575 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
576 have_tb_lock = false;
579 } /* for(;;) */
581 cc->cpu_exec_exit(cpu);
582 rcu_read_unlock();
584 /* fail safe : never use current_cpu outside cpu_exec() */
585 current_cpu = NULL;
586 return ret;