target/arm: Suppress TB end for FPCR/FPSR
[qemu/ar7.git] / target / hppa / helper.c
blob858ec205b69fb892c1bbe09f19b7c51a207595b6
1 /*
2 * HPPA emulation cpu helpers for qemu.
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "fpu/softfloat.h"
25 #include "exec/helper-proto.h"
27 target_ureg cpu_hppa_get_psw(CPUHPPAState *env)
29 target_ureg psw;
31 /* Fold carry bits down to 8 consecutive bits. */
32 /* ??? Needs tweaking for hppa64. */
33 /* .......b...c...d...e...f...g...h */
34 psw = (env->psw_cb >> 4) & 0x01111111;
35 /* .......b..bc..cd..de..ef..fg..gh */
36 psw |= psw >> 3;
37 /* .............bcd............efgh */
38 psw |= (psw >> 6) & 0x000f000f;
39 /* .........................bcdefgh */
40 psw |= (psw >> 12) & 0xf;
41 psw |= env->psw_cb_msb << 7;
42 psw = (psw & 0xff) << 8;
44 psw |= env->psw_n * PSW_N;
45 psw |= (env->psw_v < 0) * PSW_V;
46 psw |= env->psw;
48 return psw;
51 void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw)
53 target_ureg cb = 0;
55 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB);
56 env->psw_n = (psw / PSW_N) & 1;
57 env->psw_v = -((psw / PSW_V) & 1);
58 env->psw_cb_msb = (psw >> 15) & 1;
60 cb |= ((psw >> 14) & 1) << 28;
61 cb |= ((psw >> 13) & 1) << 24;
62 cb |= ((psw >> 12) & 1) << 20;
63 cb |= ((psw >> 11) & 1) << 16;
64 cb |= ((psw >> 10) & 1) << 12;
65 cb |= ((psw >> 9) & 1) << 8;
66 cb |= ((psw >> 8) & 1) << 4;
67 env->psw_cb = cb;
70 void hppa_cpu_dump_state(CPUState *cs, FILE *f,
71 fprintf_function cpu_fprintf, int flags)
73 HPPACPU *cpu = HPPA_CPU(cs);
74 CPUHPPAState *env = &cpu->env;
75 target_ureg psw = cpu_hppa_get_psw(env);
76 target_ureg psw_cb;
77 char psw_c[20];
78 int i;
80 cpu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx "\n",
81 hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f),
82 hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b));
84 psw_c[0] = (psw & PSW_W ? 'W' : '-');
85 psw_c[1] = (psw & PSW_E ? 'E' : '-');
86 psw_c[2] = (psw & PSW_S ? 'S' : '-');
87 psw_c[3] = (psw & PSW_T ? 'T' : '-');
88 psw_c[4] = (psw & PSW_H ? 'H' : '-');
89 psw_c[5] = (psw & PSW_L ? 'L' : '-');
90 psw_c[6] = (psw & PSW_N ? 'N' : '-');
91 psw_c[7] = (psw & PSW_X ? 'X' : '-');
92 psw_c[8] = (psw & PSW_B ? 'B' : '-');
93 psw_c[9] = (psw & PSW_C ? 'C' : '-');
94 psw_c[10] = (psw & PSW_V ? 'V' : '-');
95 psw_c[11] = (psw & PSW_M ? 'M' : '-');
96 psw_c[12] = (psw & PSW_F ? 'F' : '-');
97 psw_c[13] = (psw & PSW_R ? 'R' : '-');
98 psw_c[14] = (psw & PSW_Q ? 'Q' : '-');
99 psw_c[15] = (psw & PSW_P ? 'P' : '-');
100 psw_c[16] = (psw & PSW_D ? 'D' : '-');
101 psw_c[17] = (psw & PSW_I ? 'I' : '-');
102 psw_c[18] = '\0';
103 psw_cb = ((env->psw_cb >> 4) & 0x01111111) | (env->psw_cb_msb << 28);
105 cpu_fprintf(f, "PSW " TREG_FMT_lx " CB " TREG_FMT_lx " %s\n",
106 psw, psw_cb, psw_c);
108 for (i = 0; i < 32; i++) {
109 cpu_fprintf(f, "GR%02d " TREG_FMT_lx "%c", i, env->gr[i],
110 (i & 3) == 3 ? '\n' : ' ');
112 #ifndef CONFIG_USER_ONLY
113 for (i = 0; i < 8; i++) {
114 cpu_fprintf(f, "SR%02d %08x%c", i, (uint32_t)(env->sr[i] >> 32),
115 (i & 3) == 3 ? '\n' : ' ');
117 #endif
118 cpu_fprintf(f, "\n");
120 /* ??? FR */