4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "exec-memory.h"
30 typedef struct PRePPCIState
{
31 PCIHostState host_state
;
35 typedef struct RavenPCIState
{
39 static inline uint32_t PPC_PCIIO_config(target_phys_addr_t addr
)
43 for(i
= 0; i
< 11; i
++) {
44 if ((addr
& (1 << (11 + i
))) != 0)
47 return (addr
& 0x7ff) | (i
<< 11);
50 static void ppc_pci_io_write(void *opaque
, target_phys_addr_t addr
,
51 uint64_t val
, unsigned int size
)
53 PREPPCIState
*s
= opaque
;
54 pci_data_write(s
->host_state
.bus
, PPC_PCIIO_config(addr
), val
, size
);
57 static uint64_t ppc_pci_io_read(void *opaque
, target_phys_addr_t addr
,
60 PREPPCIState
*s
= opaque
;
61 return pci_data_read(s
->host_state
.bus
, PPC_PCIIO_config(addr
), size
);
64 static const MemoryRegionOps PPC_PCIIO_ops
= {
65 .read
= ppc_pci_io_read
,
66 .write
= ppc_pci_io_write
,
67 .endianness
= DEVICE_LITTLE_ENDIAN
,
70 static int prep_map_irq(PCIDevice
*pci_dev
, int irq_num
)
72 return (irq_num
+ (pci_dev
->devfn
>> 3)) & 1;
75 static void prep_set_irq(void *opaque
, int irq_num
, int level
)
77 qemu_irq
*pic
= opaque
;
79 qemu_set_irq(pic
[irq_num
] , level
);
82 static int raven_pcihost_init(SysBusDevice
*dev
)
84 PCIHostState
*h
= FROM_SYSBUS(PCIHostState
, dev
);
85 PREPPCIState
*s
= DO_UPCAST(PREPPCIState
, host_state
, h
);
86 MemoryRegion
*address_space_mem
= get_system_memory();
87 MemoryRegion
*address_space_io
= get_system_io();
91 for (i
= 0; i
< 4; i
++) {
92 sysbus_init_irq(dev
, &s
->irq
[i
]);
95 bus
= pci_register_bus(&h
->busdev
.qdev
, NULL
,
96 prep_set_irq
, prep_map_irq
, s
->irq
,
97 address_space_mem
, address_space_io
, 0, 4);
100 memory_region_init_io(&h
->conf_mem
, &pci_host_conf_be_ops
, s
,
102 sysbus_add_io(dev
, 0xcf8, &h
->conf_mem
);
103 sysbus_init_ioports(&h
->busdev
, 0xcf8, 1);
105 memory_region_init_io(&h
->data_mem
, &pci_host_data_be_ops
, s
,
107 sysbus_add_io(dev
, 0xcfc, &h
->data_mem
);
108 sysbus_init_ioports(&h
->busdev
, 0xcfc, 1);
110 memory_region_init_io(&h
->mmcfg
, &PPC_PCIIO_ops
, s
, "pciio", 0x00400000);
111 memory_region_add_subregion(address_space_mem
, 0x80800000, &h
->mmcfg
);
113 pci_create_simple(bus
, 0, "raven");
118 static int raven_init(PCIDevice
*d
)
120 d
->config
[0x0C] = 0x08; // cache_line_size
121 d
->config
[0x0D] = 0x10; // latency_timer
122 d
->config
[0x34] = 0x00; // capabilities_pointer
127 static const VMStateDescription vmstate_raven
= {
130 .minimum_version_id
= 0,
131 .fields
= (VMStateField
[]) {
132 VMSTATE_PCI_DEVICE(dev
, RavenPCIState
),
133 VMSTATE_END_OF_LIST()
137 static void raven_class_init(ObjectClass
*klass
, void *data
)
139 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
140 DeviceClass
*dc
= DEVICE_CLASS(klass
);
142 k
->init
= raven_init
;
143 k
->vendor_id
= PCI_VENDOR_ID_MOTOROLA
;
144 k
->device_id
= PCI_DEVICE_ID_MOTOROLA_RAVEN
;
146 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
147 dc
->desc
= "PReP Host Bridge - Motorola Raven";
148 dc
->vmsd
= &vmstate_raven
;
152 static TypeInfo raven_info
= {
154 .parent
= TYPE_PCI_DEVICE
,
155 .instance_size
= sizeof(RavenPCIState
),
156 .class_init
= raven_class_init
,
159 static void raven_pcihost_class_init(ObjectClass
*klass
, void *data
)
161 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
162 DeviceClass
*dc
= DEVICE_CLASS(klass
);
164 k
->init
= raven_pcihost_init
;
169 static TypeInfo raven_pcihost_info
= {
170 .name
= "raven-pcihost",
171 .parent
= TYPE_SYS_BUS_DEVICE
,
172 .instance_size
= sizeof(PREPPCIState
),
173 .class_init
= raven_pcihost_class_init
,
176 static void raven_register_types(void)
178 type_register_static(&raven_pcihost_info
);
179 type_register_static(&raven_info
);
182 type_init(raven_register_types
)