2 * Nuvoton NPCM7xx SoC family.
4 * Copyright 2020 Google LLC
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 #include "hw/boards.h"
20 #include "hw/cpu/a9mpcore.h"
21 #include "hw/misc/npcm7xx_clk.h"
22 #include "hw/misc/npcm7xx_gcr.h"
23 #include "hw/timer/npcm7xx_timer.h"
24 #include "target/arm/cpu.h"
26 #define NPCM7XX_MAX_NUM_CPUS (2)
28 /* The first half of the address space is reserved for DDR4 DRAM. */
29 #define NPCM7XX_DRAM_BA (0x00000000)
30 #define NPCM7XX_DRAM_SZ (2 * GiB)
32 /* Magic addresses for setting up direct kernel booting and SMP boot stubs. */
33 #define NPCM7XX_LOADER_START (0x00000000) /* Start of SDRAM */
34 #define NPCM7XX_SMP_LOADER_START (0xffff0000) /* Boot ROM */
35 #define NPCM7XX_SMP_BOOTREG_ADDR (0xf080013c) /* GCR.SCRPAD */
36 #define NPCM7XX_GIC_CPU_IF_ADDR (0xf03fe100) /* GIC within A9 */
38 typedef struct NPCM7xxMachine
{
42 #define TYPE_NPCM7XX_MACHINE MACHINE_TYPE_NAME("npcm7xx")
43 #define NPCM7XX_MACHINE(obj) \
44 OBJECT_CHECK(NPCM7xxMachine, (obj), TYPE_NPCM7XX_MACHINE)
46 typedef struct NPCM7xxMachineClass
{
50 } NPCM7xxMachineClass
;
52 #define NPCM7XX_MACHINE_CLASS(klass) \
53 OBJECT_CLASS_CHECK(NPCM7xxMachineClass, (klass), TYPE_NPCM7XX_MACHINE)
54 #define NPCM7XX_MACHINE_GET_CLASS(obj) \
55 OBJECT_GET_CLASS(NPCM7xxMachineClass, (obj), TYPE_NPCM7XX_MACHINE)
57 typedef struct NPCM7xxState
{
60 ARMCPU cpu
[NPCM7XX_MAX_NUM_CPUS
];
61 A9MPPrivState a9mpcore
;
70 NPCM7xxTimerCtrlState tim
[3];
73 #define TYPE_NPCM7XX "npcm7xx"
74 #define NPCM7XX(obj) OBJECT_CHECK(NPCM7xxState, (obj), TYPE_NPCM7XX)
76 #define TYPE_NPCM730 "npcm730"
77 #define TYPE_NPCM750 "npcm750"
79 typedef struct NPCM7xxClass
{
82 /* Bitmask of modules that are permanently disabled on this chip. */
83 uint32_t disabled_modules
;
84 /* Number of CPU cores enabled in this SoC class (may be 1 or 2). */
88 #define NPCM7XX_CLASS(klass) \
89 OBJECT_CLASS_CHECK(NPCM7xxClass, (klass), TYPE_NPCM7XX)
90 #define NPCM7XX_GET_CLASS(obj) \
91 OBJECT_GET_CLASS(NPCM7xxClass, (obj), TYPE_NPCM7XX)
94 * npcm7xx_load_kernel - Loads memory with everything needed to boot
95 * @machine - The machine containing the SoC to be booted.
96 * @soc - The SoC containing the CPU to be booted.
98 * This will set up the ARM boot info structure for the specific NPCM7xx
99 * derivative and call arm_load_kernel() to set up loading of the kernel, etc.
100 * into memory, if requested by the user.
102 void npcm7xx_load_kernel(MachineState
*machine
, NPCM7xxState
*soc
);
104 #endif /* NPCM7XX_H */