2 # Power ISA decode for 32-bit insns (opcode space 0)
4 # Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
6 # This library is free software; you can redistribute it and/or
7 # modify it under the terms of the GNU Lesser General Public
8 # License as published by the Free Software Foundation; either
9 # version 2.1 of the License, or (at your option) any later version.
11 # This library is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 # Lesser General Public License for more details.
16 # You should have received a copy of the GNU Lesser General Public
17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 @D ...... rt:5 ra:5 si:s16 &D
23 &D_bf bf l:bool ra imm
24 @D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf
25 @D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf
27 %ds_si 2:s14 !function=times_4
28 @DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
32 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
35 @VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
38 @X ...... rt:5 ra:5 rb:5 .......... . &X
41 @X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
43 &X_bfl bf l:bool ra rb
44 @X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
46 ### Fixed-Point Load Instructions
48 LBZ 100010 ..... ..... ................ @D
49 LBZU 100011 ..... ..... ................ @D
50 LBZX 011111 ..... ..... ..... 0001010111 - @X
51 LBZUX 011111 ..... ..... ..... 0001110111 - @X
53 LHZ 101000 ..... ..... ................ @D
54 LHZU 101001 ..... ..... ................ @D
55 LHZX 011111 ..... ..... ..... 0100010111 - @X
56 LHZUX 011111 ..... ..... ..... 0100110111 - @X
58 LHA 101010 ..... ..... ................ @D
59 LHAU 101011 ..... ..... ................ @D
60 LHAX 011111 ..... ..... ..... 0101010111 - @X
61 LHAXU 011111 ..... ..... ..... 0101110111 - @X
63 LWZ 100000 ..... ..... ................ @D
64 LWZU 100001 ..... ..... ................ @D
65 LWZX 011111 ..... ..... ..... 0000010111 - @X
66 LWZUX 011111 ..... ..... ..... 0000110111 - @X
68 LWA 111010 ..... ..... ..............10 @DS
69 LWAX 011111 ..... ..... ..... 0101010101 - @X
70 LWAUX 011111 ..... ..... ..... 0101110101 - @X
72 LD 111010 ..... ..... ..............00 @DS
73 LDU 111010 ..... ..... ..............01 @DS
74 LDX 011111 ..... ..... ..... 0000010101 - @X
75 LDUX 011111 ..... ..... ..... 0000110101 - @X
77 ### Fixed-Point Store Instructions
79 STB 100110 ..... ..... ................ @D
80 STBU 100111 ..... ..... ................ @D
81 STBX 011111 ..... ..... ..... 0011010111 - @X
82 STBUX 011111 ..... ..... ..... 0011110111 - @X
84 STH 101100 ..... ..... ................ @D
85 STHU 101101 ..... ..... ................ @D
86 STHX 011111 ..... ..... ..... 0110010111 - @X
87 STHUX 011111 ..... ..... ..... 0110110111 - @X
89 STW 100100 ..... ..... ................ @D
90 STWU 100101 ..... ..... ................ @D
91 STWX 011111 ..... ..... ..... 0010010111 - @X
92 STWUX 011111 ..... ..... ..... 0010110111 - @X
94 STD 111110 ..... ..... ..............00 @DS
95 STDU 111110 ..... ..... ..............01 @DS
96 STDX 011111 ..... ..... ..... 0010010101 - @X
97 STDUX 011111 ..... ..... ..... 0010110101 - @X
99 ### Fixed-Point Compare Instructions
101 CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl
102 CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl
103 CMPI 001011 ... - . ..... ................ @D_bfs
104 CMPLI 001010 ... - . ..... ................ @D_bfu
106 ### Fixed-Point Arithmetic Instructions
108 ADDI 001110 ..... ..... ................ @D
109 ADDIS 001111 ..... ..... ................ @D
111 ADDPCIS 010011 ..... ..... .......... 00010 . @DX
113 ## Fixed-Point Logical Instructions
115 CFUGED 011111 ..... ..... ..... 0011011100 - @X
117 ### Move To/From System Register Instructions
119 SETBC 011111 ..... ..... ----- 0110000000 - @X_bi
120 SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
121 SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
122 SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
124 ## Vector Bit Manipulation Instruction
126 VCFUGED 000100 ..... ..... ..... 10101001101 @VX