hw/i386/q35: Include missing 'hw/acpi/acpi.h' header
[qemu/ar7.git] / tcg / ppc / tcg-target-con-set.h
blob9f99bde505b7bcfadb7a63801605fe5148cdf050
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define PowerPC target-specific constraint sets.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
9 * Each operand should be a sequence of constraint letters as defined by
10 * tcg-target-con-str.h; the constraint combination is inclusive or.
12 C_O0_I1(r)
13 C_O0_I2(r, r)
14 C_O0_I2(r, rC)
15 C_O0_I2(v, r)
16 C_O0_I3(r, r, r)
17 C_O0_I3(o, m, r)
18 C_O0_I4(r, r, ri, ri)
19 C_O0_I4(r, r, r, r)
20 C_O1_I1(r, r)
21 C_O1_I1(v, r)
22 C_O1_I1(v, v)
23 C_O1_I1(v, vr)
24 C_O1_I2(r, 0, rZ)
25 C_O1_I2(r, rI, ri)
26 C_O1_I2(r, rI, rT)
27 C_O1_I2(r, r, r)
28 C_O1_I2(r, r, ri)
29 C_O1_I2(r, r, rC)
30 C_O1_I2(r, r, rI)
31 C_O1_I2(r, r, rT)
32 C_O1_I2(r, r, rU)
33 C_O1_I2(r, r, rZW)
34 C_O1_I2(v, v, v)
35 C_O1_I3(v, v, v, v)
36 C_O1_I4(r, r, rC, rZ, rZ)
37 C_O1_I4(r, r, r, ri, ri)
38 C_O2_I1(r, r, r)
39 C_N1O1_I1(o, m, r)
40 C_O2_I2(r, r, r, r)
41 C_O2_I4(r, r, rI, rZM, r, r)
42 C_O2_I4(r, r, r, r, rI, rZM)