hw/pci: Have safer pcie_bus_realize() by checking error path
[qemu/ar7.git] / linux-user / openrisc / target_cpu.h
blob74370d67c45d457f3308656e8e9cc4aca8056fe6
1 /*
2 * OpenRISC specific CPU ABI and functions for linux-user
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef OPENRISC_TARGET_CPU_H
21 #define OPENRISC_TARGET_CPU_H
23 static inline void cpu_clone_regs_child(CPUOpenRISCState *env,
24 target_ulong newsp,
25 unsigned flags)
27 if (newsp) {
28 cpu_set_gpr(env, 1, newsp);
30 cpu_set_gpr(env, 11, 0);
33 static inline void cpu_clone_regs_parent(CPUOpenRISCState *env, unsigned flags)
37 static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls)
39 cpu_set_gpr(env, 10, newtls);
42 static inline abi_ulong get_sp_from_cpustate(CPUOpenRISCState *state)
44 return cpu_get_gpr(state, 1);
46 #endif