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acpi-build: don't access unaligned addresses
[qemu/ar7.git] / hw / i386 / acpi-build.c
blob7ecfd7004ba0ceecc490a5ec8bf6f7600df74266
1 /* Support for generating ACPI tables and passing them to Guests
2 *
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 * Copyright (C) 2006 Fabrice Bellard
5 * Copyright (C) 2013 Red Hat Inc
6 *
7 * Author: Michael S. Tsirkin <mst@redhat.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #include "acpi-build.h"
24 #include <stddef.h>
25 #include <glib.h>
26 #include "qemu-common.h"
27 #include "qemu/bitmap.h"
28 #include "qemu/range.h"
29 #include "hw/pci/pci.h"
30 #include "qom/cpu.h"
31 #include "hw/i386/pc.h"
32 #include "target-i386/cpu.h"
33 #include "hw/timer/hpet.h"
34 #include "hw/i386/acpi-defs.h"
35 #include "hw/acpi/acpi.h"
36 #include "hw/nvram/fw_cfg.h"
37 #include "bios-linker-loader.h"
38 #include "hw/loader.h"
39 #include "hw/isa/isa.h"
40
41 /* Supported chipsets: */
42 #include "hw/acpi/piix4.h"
43 #include "hw/acpi/pcihp.h"
44 #include "hw/i386/ich9.h"
45 #include "hw/pci/pci_bus.h"
46 #include "hw/pci-host/q35.h"
47
48 #include "hw/i386/q35-acpi-dsdt.hex"
49 #include "hw/i386/acpi-dsdt.hex"
50
51 #include "qapi/qmp/qint.h"
52 #include "qom/qom-qobject.h"
53
54 typedef struct AcpiCpuInfo {
55 DECLARE_BITMAP(found_cpus, MAX_CPUMASK_BITS + 1);
56 } AcpiCpuInfo;
57
58 typedef struct AcpiMcfgInfo {
59 uint64_t mcfg_base;
60 uint32_t mcfg_size;
61 } AcpiMcfgInfo;
62
63 typedef struct AcpiPmInfo {
64 bool s3_disabled;
65 bool s4_disabled;
66 uint8_t s4_val;
67 uint16_t sci_int;
68 uint8_t acpi_enable_cmd;
69 uint8_t acpi_disable_cmd;
70 uint32_t gpe0_blk;
71 uint32_t gpe0_blk_len;
72 uint32_t io_base;
73 } AcpiPmInfo;
74
75 typedef struct AcpiMiscInfo {
76 bool has_hpet;
77 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
78 const unsigned char *dsdt_code;
79 unsigned dsdt_size;
80 uint16_t pvpanic_port;
81 } AcpiMiscInfo;
82
83 typedef struct AcpiBuildPciBusHotplugState {
84 GArray *device_table;
85 GArray *notify_table;
86 struct AcpiBuildPciBusHotplugState *parent;
87 } AcpiBuildPciBusHotplugState;
88
89 static void acpi_get_dsdt(AcpiMiscInfo *info)
90 {
91 uint16_t *applesmc_sta;
92 Object *piix = piix4_pm_find();
93 Object *lpc = ich9_lpc_find();
94 assert(!!piix != !!lpc);
95
96 if (piix) {
97 info->dsdt_code = AcpiDsdtAmlCode;
98 info->dsdt_size = sizeof AcpiDsdtAmlCode;
99 applesmc_sta = piix_dsdt_applesmc_sta;
100 }
101 if (lpc) {
102 info->dsdt_code = Q35AcpiDsdtAmlCode;
103 info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
104 applesmc_sta = q35_dsdt_applesmc_sta;
105 }
106
107 /* Patch in appropriate value for AppleSMC _STA */
108 *(uint8_t *)(info->dsdt_code + *applesmc_sta) =
109 applesmc_find() ? 0x0b : 0x00;
110 }
111
112 static
113 int acpi_add_cpu_info(Object *o, void *opaque)
114 {
115 AcpiCpuInfo *cpu = opaque;
116 uint64_t apic_id;
117
118 if (object_dynamic_cast(o, TYPE_CPU)) {
119 apic_id = object_property_get_int(o, "apic-id", NULL);
120 assert(apic_id <= MAX_CPUMASK_BITS);
121
122 set_bit(apic_id, cpu->found_cpus);
123 }
124
125 object_child_foreach(o, acpi_add_cpu_info, opaque);
126 return 0;
127 }
128
129 static void acpi_get_cpu_info(AcpiCpuInfo *cpu)
130 {
131 Object *root = object_get_root();
132
133 memset(cpu->found_cpus, 0, sizeof cpu->found_cpus);
134 object_child_foreach(root, acpi_add_cpu_info, cpu);
135 }
136
137 static void acpi_get_pm_info(AcpiPmInfo *pm)
138 {
139 Object *piix = piix4_pm_find();
140 Object *lpc = ich9_lpc_find();
141 Object *obj = NULL;
142 QObject *o;
143
144 if (piix) {
145 obj = piix;
146 }
147 if (lpc) {
148 obj = lpc;
149 }
150 assert(obj);
151
152 /* Fill in optional s3/s4 related properties */
153 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
154 if (o) {
155 pm->s3_disabled = qint_get_int(qobject_to_qint(o));
156 } else {
157 pm->s3_disabled = false;
158 }
159 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL);
160 if (o) {
161 pm->s4_disabled = qint_get_int(qobject_to_qint(o));
162 } else {
163 pm->s4_disabled = false;
164 }
165 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL);
166 if (o) {
167 pm->s4_val = qint_get_int(qobject_to_qint(o));
168 } else {
169 pm->s4_val = false;
170 }
171
172 /* Fill in mandatory properties */
173 pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL);
174
175 pm->acpi_enable_cmd = object_property_get_int(obj,
176 ACPI_PM_PROP_ACPI_ENABLE_CMD,
177 NULL);
178 pm->acpi_disable_cmd = object_property_get_int(obj,
179 ACPI_PM_PROP_ACPI_DISABLE_CMD,
180 NULL);
181 pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE,
182 NULL);
183 pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK,
184 NULL);
185 pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
186 NULL);
187 }
188
189 static void acpi_get_misc_info(AcpiMiscInfo *info)
190 {
191 info->has_hpet = hpet_find();
192 info->pvpanic_port = pvpanic_port();
193 }
194
195 static void acpi_get_pci_info(PcPciInfo *info)
196 {
197 Object *pci_host;
198 bool ambiguous;
199
200 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
201 g_assert(!ambiguous);
202 g_assert(pci_host);
203
204 info->w32.begin = object_property_get_int(pci_host,
205 PCI_HOST_PROP_PCI_HOLE_START,
206 NULL);
207 info->w32.end = object_property_get_int(pci_host,
208 PCI_HOST_PROP_PCI_HOLE_END,
209 NULL);
210 info->w64.begin = object_property_get_int(pci_host,
211 PCI_HOST_PROP_PCI_HOLE64_START,
212 NULL);
213 info->w64.end = object_property_get_int(pci_host,
214 PCI_HOST_PROP_PCI_HOLE64_END,
215 NULL);
216 }
217
218 #define ACPI_BUILD_APPNAME "Bochs"
219 #define ACPI_BUILD_APPNAME6 "BOCHS "
220 #define ACPI_BUILD_APPNAME4 "BXPC"
221
222 #define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0)
223
224 #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables"
225 #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp"
226
227 static void
228 build_header(GArray *linker, GArray *table_data,
229 AcpiTableHeader *h, uint32_t sig, int len, uint8_t rev)
230 {
231 h->signature = cpu_to_le32(sig);
232 h->length = cpu_to_le32(len);
233 h->revision = rev;
234 memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6);
235 memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4);
236 memcpy(h->oem_table_id + 4, (void *)&sig, 4);
237 h->oem_revision = cpu_to_le32(1);
238 memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4);
239 h->asl_compiler_revision = cpu_to_le32(1);
240 h->checksum = 0;
241 /* Checksum to be filled in by Guest linker */
242 bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE,
243 table_data->data, h, len, &h->checksum);
244 }
245
246 static inline GArray *build_alloc_array(void)
247 {
248 return g_array_new(false, true /* clear */, 1);
249 }
250
251 static inline void build_free_array(GArray *array)
252 {
253 g_array_free(array, true);
254 }
255
256 static inline void build_prepend_byte(GArray *array, uint8_t val)
257 {
258 g_array_prepend_val(array, val);
259 }
260
261 static inline void build_append_byte(GArray *array, uint8_t val)
262 {
263 g_array_append_val(array, val);
264 }
265
266 static inline void build_append_array(GArray *array, GArray *val)
267 {
268 g_array_append_vals(array, val->data, val->len);
269 }
270
271 static void GCC_FMT_ATTR(2, 3)
272 build_append_nameseg(GArray *array, const char *format, ...)
273 {
274 /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */
275 char s[] = "XXXX";
276 int len;
277 va_list args;
278
279 va_start(args, format);
280 len = vsnprintf(s, sizeof s, format, args);
281 va_end(args);
282
283 assert(len == 4);
284 g_array_append_vals(array, s, len);
285 }
286
287 /* 5.4 Definition Block Encoding */
288 enum {
289 PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */
290 PACKAGE_LENGTH_2BYTE_SHIFT = 4,
291 PACKAGE_LENGTH_3BYTE_SHIFT = 12,
292 PACKAGE_LENGTH_4BYTE_SHIFT = 20,
293 };
294
295 static void build_prepend_package_length(GArray *package, unsigned min_bytes)
296 {
297 uint8_t byte;
298 unsigned length = package->len;
299 unsigned length_bytes;
300
301 if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) {
302 length_bytes = 1;
303 } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) {
304 length_bytes = 2;
305 } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) {
306 length_bytes = 3;
307 } else {
308 length_bytes = 4;
309 }
310
311 /* Force length to at least min_bytes.
312 * This wastes memory but that's how bios did it.
313 */
314 length_bytes = MAX(length_bytes, min_bytes);
315
316 /* PkgLength is the length of the inclusive length of the data. */
317 length += length_bytes;
318
319 switch (length_bytes) {
320 case 1:
321 byte = length;
322 build_prepend_byte(package, byte);
323 return;
324 case 4:
325 byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT;
326 build_prepend_byte(package, byte);
327 length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1;
328 /* fall through */
329 case 3:
330 byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT;
331 build_prepend_byte(package, byte);
332 length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1;
333 /* fall through */
334 case 2:
335 byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT;
336 build_prepend_byte(package, byte);
337 length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1;
338 /* fall through */
339 }
340 /*
341 * Most significant two bits of byte zero indicate how many following bytes
342 * are in PkgLength encoding.
343 */
344 byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length;
345 build_prepend_byte(package, byte);
346 }
347
348 static void build_package(GArray *package, uint8_t op, unsigned min_bytes)
349 {
350 build_prepend_package_length(package, min_bytes);
351 build_prepend_byte(package, op);
352 }
353
354 static void build_extop_package(GArray *package, uint8_t op)
355 {
356 build_package(package, op, 1);
357 build_prepend_byte(package, 0x5B); /* ExtOpPrefix */
358 }
359
360 static void build_append_value(GArray *table, uint32_t value, int size)
361 {
362 uint8_t prefix;
363 int i;
364
365 switch (size) {
366 case 1:
367 prefix = 0x0A; /* BytePrefix */
368 break;
369 case 2:
370 prefix = 0x0B; /* WordPrefix */
371 break;
372 case 4:
373 prefix = 0x0C; /* DWordPrefix */
374 break;
375 default:
376 assert(0);
377 return;
378 }
379 build_append_byte(table, prefix);
380 for (i = 0; i < size; ++i) {
381 build_append_byte(table, value & 0xFF);
382 value = value >> 8;
383 }
384 }
385
386 static void build_append_int(GArray *table, uint32_t value)
387 {
388 if (value == 0x00) {
389 build_append_byte(table, 0x00); /* ZeroOp */
390 } else if (value == 0x01) {
391 build_append_byte(table, 0x01); /* OneOp */
392 } else if (value <= 0xFF) {
393 build_append_value(table, value, 1);
394 } else if (value <= 0xFFFFF) {
395 build_append_value(table, value, 2);
396 } else {
397 build_append_value(table, value, 4);
398 }
399 }
400
401 static GArray *build_alloc_method(const char *name, uint8_t arg_count)
402 {
403 GArray *method = build_alloc_array();
404
405 build_append_nameseg(method, "%s", name);
406 build_append_byte(method, arg_count); /* MethodFlags: ArgCount */
407
408 return method;
409 }
410
411 static void build_append_and_cleanup_method(GArray *device, GArray *method)
412 {
413 uint8_t op = 0x14; /* MethodOp */
414
415 build_package(method, op, 0);
416
417 build_append_array(device, method);
418 build_free_array(method);
419 }
420
421 static void build_append_notify_target_ifequal(GArray *method,
422 GArray *target_name,
423 uint32_t value, int size)
424 {
425 GArray *notify = build_alloc_array();
426 uint8_t op = 0xA0; /* IfOp */
427
428 build_append_byte(notify, 0x93); /* LEqualOp */
429 build_append_byte(notify, 0x68); /* Arg0Op */
430 build_append_value(notify, value, size);
431 build_append_byte(notify, 0x86); /* NotifyOp */
432 build_append_array(notify, target_name);
433 build_append_byte(notify, 0x69); /* Arg1Op */
434
435 /* Pack it up */
436 build_package(notify, op, 1);
437
438 build_append_array(method, notify);
439
440 build_free_array(notify);
441 }
442
443 /* End here */
444 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
445
446 static inline void *acpi_data_push(GArray *table_data, unsigned size)
447 {
448 unsigned off = table_data->len;
449 g_array_set_size(table_data, off + size);
450 return table_data->data + off;
451 }
452
453 static unsigned acpi_data_len(GArray *table)
454 {
455 #if GLIB_CHECK_VERSION(2, 22, 0)
456 assert(g_array_get_element_size(table) == 1);
457 #endif
458 return table->len;
459 }
460
461 static void acpi_align_size(GArray *blob, unsigned align)
462 {
463 /* Align size to multiple of given size. This reduces the chance
464 * we need to change size in the future (breaking cross version migration).
465 */
466 g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
467 }
468
469 /* Set a value within table in a safe manner */
470 #define ACPI_BUILD_SET_LE(table, size, off, bits, val) \
471 do { \
472 uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \
473 memcpy(acpi_data_get_ptr(table, size, off, \
474 (bits) / BITS_PER_BYTE), \
475 &ACPI_BUILD_SET_LE_val, \
476 (bits) / BITS_PER_BYTE); \
477 } while (0)
478
479 static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
480 unsigned off, unsigned size)
481 {
482 assert(off + size > off);
483 assert(off + size <= table_size);
484 return table_data + off;
485 }
486
487 static inline void acpi_add_table(GArray *table_offsets, GArray *table_data)
488 {
489 uint32_t offset = cpu_to_le32(table_data->len);
490 g_array_append_val(table_offsets, offset);
491 }
492
493 /* FACS */
494 static void
495 build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info)
496 {
497 AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs);
498 facs->signature = cpu_to_le32(ACPI_FACS_SIGNATURE);
499 facs->length = cpu_to_le32(sizeof(*facs));
500 }
501
502 /* Load chipset information in FADT */
503 static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)
504 {
505 fadt->model = 1;
506 fadt->reserved1 = 0;
507 fadt->sci_int = cpu_to_le16(pm->sci_int);
508 fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);
509 fadt->acpi_enable = pm->acpi_enable_cmd;
510 fadt->acpi_disable = pm->acpi_disable_cmd;
511 /* EVT, CNT, TMR offset matches hw/acpi/core.c */
512 fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);
513 fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);
514 fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);
515 fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);
516 /* EVT, CNT, TMR length matches hw/acpi/core.c */
517 fadt->pm1_evt_len = 4;
518 fadt->pm1_cnt_len = 2;
519 fadt->pm_tmr_len = 4;
520 fadt->gpe0_blk_len = pm->gpe0_blk_len;
521 fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */
522 fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */
523 fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |
524 (1 << ACPI_FADT_F_PROC_C1) |
525 (1 << ACPI_FADT_F_SLP_BUTTON) |
526 (1 << ACPI_FADT_F_RTC_S4));
527 fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);
528 }
529
530
531 /* FADT */
532 static void
533 build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm,
534 unsigned facs, unsigned dsdt)
535 {
536 AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt));
537
538 fadt->firmware_ctrl = cpu_to_le32(facs);
539 /* FACS address to be filled by Guest linker */
540 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
541 ACPI_BUILD_TABLE_FILE,
542 table_data, &fadt->firmware_ctrl,
543 sizeof fadt->firmware_ctrl);
544
545 fadt->dsdt = cpu_to_le32(dsdt);
546 /* DSDT address to be filled by Guest linker */
547 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
548 ACPI_BUILD_TABLE_FILE,
549 table_data, &fadt->dsdt,
550 sizeof fadt->dsdt);
551
552 fadt_setup(fadt, pm);
553
554 build_header(linker, table_data,
555 (void *)fadt, ACPI_FACP_SIGNATURE, sizeof(*fadt), 1);
556 }
557
558 static void
559 build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu,
560 PcGuestInfo *guest_info)
561 {
562 int madt_start = table_data->len;
563
564 AcpiMultipleApicTable *madt;
565 AcpiMadtIoApic *io_apic;
566 AcpiMadtIntsrcovr *intsrcovr;
567 AcpiMadtLocalNmi *local_nmi;
568 int i;
569
570 madt = acpi_data_push(table_data, sizeof *madt);
571 madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS);
572 madt->flags = cpu_to_le32(1);
573
574 for (i = 0; i < guest_info->apic_id_limit; i++) {
575 AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic);
576 apic->type = ACPI_APIC_PROCESSOR;
577 apic->length = sizeof(*apic);
578 apic->processor_id = i;
579 apic->local_apic_id = i;
580 if (test_bit(i, cpu->found_cpus)) {
581 apic->flags = cpu_to_le32(1);
582 } else {
583 apic->flags = cpu_to_le32(0);
584 }
585 }
586 io_apic = acpi_data_push(table_data, sizeof *io_apic);
587 io_apic->type = ACPI_APIC_IO;
588 io_apic->length = sizeof(*io_apic);
589 #define ACPI_BUILD_IOAPIC_ID 0x0
590 io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID;
591 io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
592 io_apic->interrupt = cpu_to_le32(0);
593
594 if (guest_info->apic_xrupt_override) {
595 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
596 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
597 intsrcovr->length = sizeof(*intsrcovr);
598 intsrcovr->source = 0;
599 intsrcovr->gsi = cpu_to_le32(2);
600 intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */
601 }
602 for (i = 1; i < 16; i++) {
603 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
604 if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) {
605 /* No need for a INT source override structure. */
606 continue;
607 }
608 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
609 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
610 intsrcovr->length = sizeof(*intsrcovr);
611 intsrcovr->source = i;
612 intsrcovr->gsi = cpu_to_le32(i);
613 intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */
614 }
615
616 local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
617 local_nmi->type = ACPI_APIC_LOCAL_NMI;
618 local_nmi->length = sizeof(*local_nmi);
619 local_nmi->processor_id = 0xff; /* all processors */
620 local_nmi->flags = cpu_to_le16(0);
621 local_nmi->lint = 1; /* ACPI_LINT1 */
622
623 build_header(linker, table_data,
624 (void *)(table_data->data + madt_start), ACPI_APIC_SIGNATURE,
625 table_data->len - madt_start, 1);
626 }
627
628 /* Encode a hex value */
629 static inline char acpi_get_hex(uint32_t val)
630 {
631 val &= 0x0f;
632 return (val <= 9) ? ('0' + val) : ('A' + val - 10);
633 }
634
635 #include "hw/i386/ssdt-proc.hex"
636
637 /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
638 #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
639 #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4)
640 #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start)
641 #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start)
642 #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start)
643
644 /* 0x5B 0x82 DeviceOp PkgLength NameString */
645 #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
646 #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
647 #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
648 #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
649 #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
650 #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
651
652 #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)
653 #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
654 #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
655 #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
656
657 #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)
658 #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)
659 #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)
660 #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)
661
662 #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)
663 #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)
664 #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)
665 #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)
666
667 #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
668 #define ACPI_SSDT_HEADER_LENGTH 36
669
670 #include "hw/i386/ssdt-misc.hex"
671 #include "hw/i386/ssdt-pcihp.hex"
672
673 static void
674 build_append_notify_method(GArray *device, const char *name,
675 const char *format, int count)
676 {
677 int i;
678 GArray *method = build_alloc_method(name, 2);
679
680 for (i = 0; i < count; i++) {
681 GArray *target = build_alloc_array();
682 build_append_nameseg(target, format, i);
683 assert(i < 256); /* Fits in 1 byte */
684 build_append_notify_target_ifequal(method, target, i, 1);
685 build_free_array(target);
686 }
687
688 build_append_and_cleanup_method(device, method);
689 }
690
691 static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
692 {
693 unsigned devfn = PCI_DEVFN(slot, 0);
694
695 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
696 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
697 ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
698 ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
699 }
700
701 static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
702 {
703 unsigned devfn = PCI_DEVFN(slot, 0);
704
705 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
706 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
707 ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
708 }
709
710 static void patch_pcivga(int slot, uint8_t *ssdt_ptr)
711 {
712 unsigned devfn = PCI_DEVFN(slot, 0);
713
714 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
715 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);
716 ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;
717 }
718
719 static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)
720 {
721 unsigned devfn = PCI_DEVFN(slot, 0);
722
723 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
724 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);
725 ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;
726 }
727
728 /* Assign BSEL property to all buses. In the future, this can be changed
729 * to only assign to buses that support hotplug.
730 */
731 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
732 {
733 unsigned *bsel_alloc = opaque;
734 unsigned *bus_bsel;
735
736 if (bus->qbus.allow_hotplug) {
737 bus_bsel = g_malloc(sizeof *bus_bsel);
738
739 *bus_bsel = (*bsel_alloc)++;
740 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
741 bus_bsel, NULL);
742 }
743
744 return bsel_alloc;
745 }
746
747 static void acpi_set_pci_info(void)
748 {
749 PCIBus *bus = find_i440fx(); /* TODO: Q35 support */
750 unsigned bsel_alloc = 0;
751
752 if (bus) {
753 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
754 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
755 }
756 }
757
758 static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state,
759 AcpiBuildPciBusHotplugState *parent)
760 {
761 state->parent = parent;
762 state->device_table = build_alloc_array();
763 state->notify_table = build_alloc_array();
764 }
765
766 static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state)
767 {
768 build_free_array(state->device_table);
769 build_free_array(state->notify_table);
770 }
771
772 static void *build_pci_bus_begin(PCIBus *bus, void *parent_state)
773 {
774 AcpiBuildPciBusHotplugState *parent = parent_state;
775 AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child);
776
777 build_pci_bus_state_init(child, parent);
778
779 return child;
780 }
781
782 static void build_pci_bus_end(PCIBus *bus, void *bus_state)
783 {
784 AcpiBuildPciBusHotplugState *child = bus_state;
785 AcpiBuildPciBusHotplugState *parent = child->parent;
786 GArray *bus_table = build_alloc_array();
787 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
788 DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);
789 DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX);
790 DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX);
791 DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX);
792 uint8_t op;
793 int i;
794 QObject *bsel;
795 GArray *method;
796 bool bus_hotplug_support = false;
797
798 if (bus->parent_dev) {
799 op = 0x82; /* DeviceOp */
800 build_append_nameseg(bus_table, "S%.02X_",
801 bus->parent_dev->devfn);
802 build_append_byte(bus_table, 0x08); /* NameOp */
803 build_append_nameseg(bus_table, "_SUN");
804 build_append_value(bus_table, PCI_SLOT(bus->parent_dev->devfn), 1);
805 build_append_byte(bus_table, 0x08); /* NameOp */
806 build_append_nameseg(bus_table, "_ADR");
807 build_append_value(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) |
808 PCI_FUNC(bus->parent_dev->devfn), 4);
809 } else {
810 op = 0x10; /* ScopeOp */;
811 build_append_nameseg(bus_table, "PCI0");
812 }
813
814 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
815 if (bsel) {
816 build_append_byte(bus_table, 0x08); /* NameOp */
817 build_append_nameseg(bus_table, "BSEL");
818 build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
819 memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
820 } else {
821 /* No bsel - no slots are hot-pluggable */
822 memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable);
823 }
824
825 memset(slot_device_present, 0x00, sizeof slot_device_present);
826 memset(slot_device_system, 0x00, sizeof slot_device_present);
827 memset(slot_device_vga, 0x00, sizeof slot_device_vga);
828 memset(slot_device_qxl, 0x00, sizeof slot_device_qxl);
829
830 for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
831 DeviceClass *dc;
832 PCIDeviceClass *pc;
833 PCIDevice *pdev = bus->devices[i];
834 int slot = PCI_SLOT(i);
835
836 if (!pdev) {
837 continue;
838 }
839
840 set_bit(slot, slot_device_present);
841 pc = PCI_DEVICE_GET_CLASS(pdev);
842 dc = DEVICE_GET_CLASS(pdev);
843
844 if (pc->class_id == PCI_CLASS_BRIDGE_ISA) {
845 set_bit(slot, slot_device_system);
846 }
847
848 if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
849 set_bit(slot, slot_device_vga);
850
851 if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
852 set_bit(slot, slot_device_qxl);
853 }
854 }
855
856 if (!dc->hotpluggable || pc->is_bridge) {
857 clear_bit(slot, slot_hotplug_enable);
858 }
859 }
860
861 /* Append Device object for each slot */
862 for (i = 0; i < PCI_SLOT_MAX; i++) {
863 bool can_eject = test_bit(i, slot_hotplug_enable);
864 bool present = test_bit(i, slot_device_present);
865 bool vga = test_bit(i, slot_device_vga);
866 bool qxl = test_bit(i, slot_device_qxl);
867 bool system = test_bit(i, slot_device_system);
868 if (can_eject) {
869 void *pcihp = acpi_data_push(bus_table,
870 ACPI_PCIHP_SIZEOF);
871 memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
872 patch_pcihp(i, pcihp);
873 bus_hotplug_support = true;
874 } else if (qxl) {
875 void *pcihp = acpi_data_push(bus_table,
876 ACPI_PCIQXL_SIZEOF);
877 memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
878 patch_pciqxl(i, pcihp);
879 } else if (vga) {
880 void *pcihp = acpi_data_push(bus_table,
881 ACPI_PCIVGA_SIZEOF);
882 memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
883 patch_pcivga(i, pcihp);
884 } else if (system) {
885 /* Nothing to do: system devices are in DSDT. */
886 } else if (present) {
887 void *pcihp = acpi_data_push(bus_table,
888 ACPI_PCINOHP_SIZEOF);
889 memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
890 patch_pcinohp(i, pcihp);
891 }
892 }
893
894 if (bsel) {
895 method = build_alloc_method("DVNT", 2);
896
897 for (i = 0; i < PCI_SLOT_MAX; i++) {
898 GArray *notify;
899 uint8_t op;
900
901 if (!test_bit(i, slot_hotplug_enable)) {
902 continue;
903 }
904
905 notify = build_alloc_array();
906 op = 0xA0; /* IfOp */
907
908 build_append_byte(notify, 0x7B); /* AndOp */
909 build_append_byte(notify, 0x68); /* Arg0Op */
910 build_append_int(notify, 0x1 << i);
911 build_append_byte(notify, 0x00); /* NullName */
912 build_append_byte(notify, 0x86); /* NotifyOp */
913 build_append_nameseg(notify, "S%.02X_", PCI_DEVFN(i, 0));
914 build_append_byte(notify, 0x69); /* Arg1Op */
915
916 /* Pack it up */
917 build_package(notify, op, 0);
918
919 build_append_array(method, notify);
920
921 build_free_array(notify);
922 }
923
924 build_append_and_cleanup_method(bus_table, method);
925 }
926
927 /* Append PCNT method to notify about events on local and child buses.
928 * Add unconditionally for root since DSDT expects it.
929 */
930 if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) {
931 method = build_alloc_method("PCNT", 0);
932
933 /* If bus supports hotplug select it and notify about local events */
934 if (bsel) {
935 build_append_byte(method, 0x70); /* StoreOp */
936 build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
937 build_append_nameseg(method, "BNUM");
938 build_append_nameseg(method, "DVNT");
939 build_append_nameseg(method, "PCIU");
940 build_append_int(method, 1); /* Device Check */
941 build_append_nameseg(method, "DVNT");
942 build_append_nameseg(method, "PCID");
943 build_append_int(method, 3); /* Eject Request */
944 }
945
946 /* Notify about child bus events in any case */
947 build_append_array(method, child->notify_table);
948
949 build_append_and_cleanup_method(bus_table, method);
950
951 /* Append description of child buses */
952 build_append_array(bus_table, child->device_table);
953
954 /* Pack it up */
955 if (bus->parent_dev) {
956 build_extop_package(bus_table, op);
957 } else {
958 build_package(bus_table, op, 0);
959 }
960
961 /* Append our bus description to parent table */
962 build_append_array(parent->device_table, bus_table);
963
964 /* Also tell parent how to notify us, invoking PCNT method.
965 * At the moment this is not needed for root as we have a single root.
966 */
967 if (bus->parent_dev) {
968 build_append_byte(parent->notify_table, '^'); /* ParentPrefixChar */
969 build_append_byte(parent->notify_table, 0x2E); /* DualNamePrefix */
970 build_append_nameseg(parent->notify_table, "S%.02X_",
971 bus->parent_dev->devfn);
972 build_append_nameseg(parent->notify_table, "PCNT");
973 }
974 }
975
976 build_free_array(bus_table);
977 build_pci_bus_state_cleanup(child);
978 g_free(child);
979 }
980
981 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
982 {
983 ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin);
984
985 ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1);
986
987 if (pci->w64.end || pci->w64.begin) {
988 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1);
989 ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin);
990 ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1);
991 ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin);
992 } else {
993 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0);
994 }
995 }
996
997 static void
998 build_ssdt(GArray *table_data, GArray *linker,
999 AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
1000 PcPciInfo *pci, PcGuestInfo *guest_info)
1001 {
1002 int acpi_cpus = MIN(0xff, guest_info->apic_id_limit);
1003 int ssdt_start = table_data->len;
1004 uint8_t *ssdt_ptr;
1005 int i;
1006
1007 /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
1008 ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml));
1009 memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
1010 if (pm->s3_disabled) {
1011 ssdt_ptr[acpi_s3_name[0]] = 'X';
1012 }
1013 if (pm->s4_disabled) {
1014 ssdt_ptr[acpi_s4_name[0]] = 'X';
1015 } else {
1016 ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] =
1017 pm->s4_val;
1018 }
1019
1020 patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
1021
1022 *(uint16_t *)(ssdt_ptr + *ssdt_isa_pest) =
1023 cpu_to_le16(misc->pvpanic_port);
1024
1025 {
1026 GArray *sb_scope = build_alloc_array();
1027 uint8_t op = 0x10; /* ScopeOp */
1028
1029 build_append_nameseg(sb_scope, "_SB_");
1030
1031 /* build Processor object for each processor */
1032 for (i = 0; i < acpi_cpus; i++) {
1033 uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF);
1034 memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF);
1035 proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4);
1036 proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i);
1037 proc[ACPI_PROC_OFFSET_CPUID1] = i;
1038 proc[ACPI_PROC_OFFSET_CPUID2] = i;
1039 }
1040
1041 /* build this code:
1042 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
1043 */
1044 /* Arg0 = Processor ID = APIC ID */
1045 build_append_notify_method(sb_scope, "NTFY", "CP%0.02X", acpi_cpus);
1046
1047 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */
1048 build_append_byte(sb_scope, 0x08); /* NameOp */
1049 build_append_nameseg(sb_scope, "CPON");
1050
1051 {
1052 GArray *package = build_alloc_array();
1053 uint8_t op = 0x12; /* PackageOp */
1054
1055 build_append_byte(package, acpi_cpus); /* NumElements */
1056 for (i = 0; i < acpi_cpus; i++) {
1057 uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00;
1058 build_append_byte(package, b);
1059 }
1060
1061 build_package(package, op, 2);
1062 build_append_array(sb_scope, package);
1063 build_free_array(package);
1064 }
1065
1066 {
1067 AcpiBuildPciBusHotplugState hotplug_state;
1068 Object *pci_host;
1069 PCIBus *bus = NULL;
1070 bool ambiguous;
1071
1072 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1073 if (!ambiguous && pci_host) {
1074 bus = PCI_HOST_BRIDGE(pci_host)->bus;
1075 }
1076
1077 build_pci_bus_state_init(&hotplug_state, NULL);
1078
1079 if (bus) {
1080 /* Scan all PCI buses. Generate tables to support hotplug. */
1081 pci_for_each_bus_depth_first(bus, build_pci_bus_begin,
1082 build_pci_bus_end, &hotplug_state);
1083 }
1084
1085 build_append_array(sb_scope, hotplug_state.device_table);
1086 build_pci_bus_state_cleanup(&hotplug_state);
1087 }
1088
1089 build_package(sb_scope, op, 3);
1090 build_append_array(table_data, sb_scope);
1091 build_free_array(sb_scope);
1092 }
1093
1094 build_header(linker, table_data,
1095 (void *)(table_data->data + ssdt_start),
1096 ACPI_SSDT_SIGNATURE, table_data->len - ssdt_start, 1);
1097 }
1098
1099 static void
1100 build_hpet(GArray *table_data, GArray *linker)
1101 {
1102 Acpi20Hpet *hpet;
1103
1104 hpet = acpi_data_push(table_data, sizeof(*hpet));
1105 /* Note timer_block_id value must be kept in sync with value advertised by
1106 * emulated hpet
1107 */
1108 hpet->timer_block_id = cpu_to_le32(0x8086a201);
1109 hpet->addr.address = cpu_to_le64(HPET_BASE);
1110 build_header(linker, table_data,
1111 (void *)hpet, ACPI_HPET_SIGNATURE, sizeof(*hpet), 1);
1112 }
1113
1114 static void
1115 acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem,
1116 uint64_t base, uint64_t len, int node, int enabled)
1117 {
1118 numamem->type = ACPI_SRAT_MEMORY;
1119 numamem->length = sizeof(*numamem);
1120 memset(numamem->proximity, 0, 4);
1121 numamem->proximity[0] = node;
1122 numamem->flags = cpu_to_le32(!!enabled);
1123 numamem->base_addr = cpu_to_le64(base);
1124 numamem->range_length = cpu_to_le64(len);
1125 }
1126
1127 static void
1128 build_srat(GArray *table_data, GArray *linker,
1129 AcpiCpuInfo *cpu, PcGuestInfo *guest_info)
1130 {
1131 AcpiSystemResourceAffinityTable *srat;
1132 AcpiSratProcessorAffinity *core;
1133 AcpiSratMemoryAffinity *numamem;
1134
1135 int i;
1136 uint64_t curnode;
1137 int srat_start, numa_start, slots;
1138 uint64_t mem_len, mem_base, next_base;
1139
1140 srat_start = table_data->len;
1141
1142 srat = acpi_data_push(table_data, sizeof *srat);
1143 srat->reserved1 = cpu_to_le32(1);
1144 core = (void *)(srat + 1);
1145
1146 for (i = 0; i < guest_info->apic_id_limit; ++i) {
1147 core = acpi_data_push(table_data, sizeof *core);
1148 core->type = ACPI_SRAT_PROCESSOR;
1149 core->length = sizeof(*core);
1150 core->local_apic_id = i;
1151 curnode = guest_info->node_cpu[i];
1152 core->proximity_lo = curnode;
1153 memset(core->proximity_hi, 0, 3);
1154 core->local_sapic_eid = 0;
1155 if (test_bit(i, cpu->found_cpus)) {
1156 core->flags = cpu_to_le32(1);
1157 } else {
1158 core->flags = cpu_to_le32(0);
1159 }
1160 }
1161
1162
1163 /* the memory map is a bit tricky, it contains at least one hole
1164 * from 640k-1M and possibly another one from 3.5G-4G.
1165 */
1166 next_base = 0;
1167 numa_start = table_data->len;
1168
1169 numamem = acpi_data_push(table_data, sizeof *numamem);
1170 acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1);
1171 next_base = 1024 * 1024;
1172 for (i = 1; i < guest_info->numa_nodes + 1; ++i) {
1173 mem_base = next_base;
1174 mem_len = guest_info->node_mem[i - 1];
1175 if (i == 1) {
1176 mem_len -= 1024 * 1024;
1177 }
1178 next_base = mem_base + mem_len;
1179
1180 /* Cut out the ACPI_PCI hole */
1181 if (mem_base <= guest_info->ram_size_below_4g &&
1182 next_base > guest_info->ram_size_below_4g) {
1183 mem_len -= next_base - guest_info->ram_size_below_4g;
1184 if (mem_len > 0) {
1185 numamem = acpi_data_push(table_data, sizeof *numamem);
1186 acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1);
1187 }
1188 mem_base = 1ULL << 32;
1189 mem_len = next_base - guest_info->ram_size_below_4g;
1190 next_base += (1ULL << 32) - guest_info->ram_size_below_4g;
1191 }
1192 numamem = acpi_data_push(table_data, sizeof *numamem);
1193 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1);
1194 }
1195 slots = (table_data->len - numa_start) / sizeof *numamem;
1196 for (; slots < guest_info->numa_nodes + 2; slots++) {
1197 numamem = acpi_data_push(table_data, sizeof *numamem);
1198 acpi_build_srat_memory(numamem, 0, 0, 0, 0);
1199 }
1200
1201 build_header(linker, table_data,
1202 (void *)(table_data->data + srat_start),
1203 ACPI_SRAT_SIGNATURE,
1204 table_data->len - srat_start, 1);
1205 }
1206
1207 static void
1208 build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info)
1209 {
1210 AcpiTableMcfg *mcfg;
1211 uint32_t sig;
1212 int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]);
1213
1214 mcfg = acpi_data_push(table_data, len);
1215 mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base);
1216 /* Only a single allocation so no need to play with segments */
1217 mcfg->allocation[0].pci_segment = cpu_to_le16(0);
1218 mcfg->allocation[0].start_bus_number = 0;
1219 mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1);
1220
1221 /* MCFG is used for ECAM which can be enabled or disabled by guest.
1222 * To avoid table size changes (which create migration issues),
1223 * always create the table even if there are no allocations,
1224 * but set the signature to a reserved value in this case.
1225 * ACPI spec requires OSPMs to ignore such tables.
1226 */
1227 if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) {
1228 sig = ACPI_RSRV_SIGNATURE;
1229 } else {
1230 sig = ACPI_MCFG_SIGNATURE;
1231 }
1232 build_header(linker, table_data, (void *)mcfg, sig, len, 1);
1233 }
1234
1235 static void
1236 build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
1237 {
1238 AcpiTableHeader *dsdt;
1239
1240 assert(misc->dsdt_code && misc->dsdt_size);
1241
1242 dsdt = acpi_data_push(table_data, misc->dsdt_size);
1243 memcpy(dsdt, misc->dsdt_code, misc->dsdt_size);
1244
1245 memset(dsdt, 0, sizeof *dsdt);
1246 build_header(linker, table_data, dsdt, ACPI_DSDT_SIGNATURE,
1247 misc->dsdt_size, 1);
1248 }
1249
1250 /* Build final rsdt table */
1251 static void
1252 build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets)
1253 {
1254 AcpiRsdtDescriptorRev1 *rsdt;
1255 size_t rsdt_len;
1256 int i;
1257
1258 rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len;
1259 rsdt = acpi_data_push(table_data, rsdt_len);
1260 memcpy(rsdt->table_offset_entry, table_offsets->data,
1261 sizeof(uint32_t) * table_offsets->len);
1262 for (i = 0; i < table_offsets->len; ++i) {
1263 /* rsdt->table_offset_entry to be filled by Guest linker */
1264 bios_linker_loader_add_pointer(linker,
1265 ACPI_BUILD_TABLE_FILE,
1266 ACPI_BUILD_TABLE_FILE,
1267 table_data, &rsdt->table_offset_entry[i],
1268 sizeof(uint32_t));
1269 }
1270 build_header(linker, table_data,
1271 (void *)rsdt, ACPI_RSDT_SIGNATURE, rsdt_len, 1);
1272 }
1273
1274 static GArray *
1275 build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
1276 {
1277 AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp);
1278
1279 bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 1,
1280 true /* fseg memory */);
1281
1282 rsdp->signature = cpu_to_le64(ACPI_RSDP_SIGNATURE);
1283 memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6);
1284 rsdp->rsdt_physical_address = cpu_to_le32(rsdt);
1285 /* Address to be filled by Guest linker */
1286 bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE,
1287 ACPI_BUILD_TABLE_FILE,
1288 rsdp_table, &rsdp->rsdt_physical_address,
1289 sizeof rsdp->rsdt_physical_address);
1290 rsdp->checksum = 0;
1291 /* Checksum to be filled by Guest linker */
1292 bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE,
1293 rsdp, rsdp, sizeof *rsdp, &rsdp->checksum);
1294
1295 return rsdp_table;
1296 }
1297
1298 typedef
1299 struct AcpiBuildTables {
1300 GArray *table_data;
1301 GArray *rsdp;
1302 GArray *linker;
1303 } AcpiBuildTables;
1304
1305 static inline void acpi_build_tables_init(AcpiBuildTables *tables)
1306 {
1307 tables->rsdp = g_array_new(false, true /* clear */, 1);
1308 tables->table_data = g_array_new(false, true /* clear */, 1);
1309 tables->linker = bios_linker_loader_init();
1310 }
1311
1312 static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre)
1313 {
1314 void *linker_data = bios_linker_loader_cleanup(tables->linker);
1315 if (mfre) {
1316 g_free(linker_data);
1317 }
1318 g_array_free(tables->rsdp, mfre);
1319 g_array_free(tables->table_data, mfre);
1320 }
1321
1322 typedef
1323 struct AcpiBuildState {
1324 /* Copy of table in RAM (for patching). */
1325 uint8_t *table_ram;
1326 uint32_t table_size;
1327 /* Is table patched? */
1328 uint8_t patched;
1329 PcGuestInfo *guest_info;
1330 } AcpiBuildState;
1331
1332 static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
1333 {
1334 Object *pci_host;
1335 QObject *o;
1336 bool ambiguous;
1337
1338 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1339 g_assert(!ambiguous);
1340 g_assert(pci_host);
1341
1342 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL);
1343 if (!o) {
1344 return false;
1345 }
1346 mcfg->mcfg_base = qint_get_int(qobject_to_qint(o));
1347
1348 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL);
1349 assert(o);
1350 mcfg->mcfg_size = qint_get_int(qobject_to_qint(o));
1351 return true;
1352 }
1353
1354 static
1355 void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
1356 {
1357 GArray *table_offsets;
1358 unsigned facs, dsdt, rsdt;
1359 AcpiCpuInfo cpu;
1360 AcpiPmInfo pm;
1361 AcpiMiscInfo misc;
1362 AcpiMcfgInfo mcfg;
1363 PcPciInfo pci;
1364 uint8_t *u;
1365
1366 acpi_get_cpu_info(&cpu);
1367 acpi_get_pm_info(&pm);
1368 acpi_get_dsdt(&misc);
1369 acpi_get_misc_info(&misc);
1370 acpi_get_pci_info(&pci);
1371
1372 table_offsets = g_array_new(false, true /* clear */,
1373 sizeof(uint32_t));
1374 ACPI_BUILD_DPRINTF(3, "init ACPI tables\n");
1375
1376 bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE,
1377 64 /* Ensure FACS is aligned */,
1378 false /* high memory */);
1379
1380 /*
1381 * FACS is pointed to by FADT.
1382 * We place it first since it's the only table that has alignment
1383 * requirements.
1384 */
1385 facs = tables->table_data->len;
1386 build_facs(tables->table_data, tables->linker, guest_info);
1387
1388 /* DSDT is pointed to by FADT */
1389 dsdt = tables->table_data->len;
1390 build_dsdt(tables->table_data, tables->linker, &misc);
1391
1392 /* ACPI tables pointed to by RSDT */
1393 acpi_add_table(table_offsets, tables->table_data);
1394 build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt);
1395 acpi_add_table(table_offsets, tables->table_data);
1396
1397 build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci,
1398 guest_info);
1399 acpi_add_table(table_offsets, tables->table_data);
1400
1401 build_madt(tables->table_data, tables->linker, &cpu, guest_info);
1402 acpi_add_table(table_offsets, tables->table_data);
1403 if (misc.has_hpet) {
1404 build_hpet(tables->table_data, tables->linker);
1405 }
1406 if (guest_info->numa_nodes) {
1407 acpi_add_table(table_offsets, tables->table_data);
1408 build_srat(tables->table_data, tables->linker, &cpu, guest_info);
1409 }
1410 if (acpi_get_mcfg(&mcfg)) {
1411 acpi_add_table(table_offsets, tables->table_data);
1412 build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
1413 }
1414
1415 /* Add tables supplied by user (if any) */
1416 for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
1417 unsigned len = acpi_table_len(u);
1418
1419 acpi_add_table(table_offsets, tables->table_data);
1420 g_array_append_vals(tables->table_data, u, len);
1421 }
1422
1423 /* RSDT is pointed to by RSDP */
1424 rsdt = tables->table_data->len;
1425 build_rsdt(tables->table_data, tables->linker, table_offsets);
1426
1427 /* RSDP is in FSEG memory, so allocate it separately */
1428 build_rsdp(tables->rsdp, tables->linker, rsdt);
1429
1430 /* We'll expose it all to Guest so align size to reduce
1431 * chance of size changes.
1432 * RSDP is small so it's easy to keep it immutable, no need to
1433 * bother with alignment.
1434 */
1435 acpi_align_size(tables->table_data, 0x1000);
1436
1437 acpi_align_size(tables->linker, 0x1000);
1438
1439 /* Cleanup memory that's no longer used. */
1440 g_array_free(table_offsets, true);
1441 }
1442
1443 static void acpi_build_update(void *build_opaque, uint32_t offset)
1444 {
1445 AcpiBuildState *build_state = build_opaque;
1446 AcpiBuildTables tables;
1447
1448 /* No state to update or already patched? Nothing to do. */
1449 if (!build_state || build_state->patched) {
1450 return;
1451 }
1452 build_state->patched = 1;
1453
1454 acpi_build_tables_init(&tables);
1455
1456 acpi_build(build_state->guest_info, &tables);
1457
1458 assert(acpi_data_len(tables.table_data) == build_state->table_size);
1459 memcpy(build_state->table_ram, tables.table_data->data,
1460 build_state->table_size);
1461
1462 acpi_build_tables_cleanup(&tables, true);
1463 }
1464
1465 static void acpi_build_reset(void *build_opaque)
1466 {
1467 AcpiBuildState *build_state = build_opaque;
1468 build_state->patched = 0;
1469 }
1470
1471 static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob,
1472 const char *name)
1473 {
1474 return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name,
1475 acpi_build_update, build_state);
1476 }
1477
1478 static const VMStateDescription vmstate_acpi_build = {
1479 .name = "acpi_build",
1480 .version_id = 1,
1481 .minimum_version_id = 1,
1482 .minimum_version_id_old = 1,
1483 .fields = (VMStateField[]) {
1484 VMSTATE_UINT8(patched, AcpiBuildState),
1485 VMSTATE_END_OF_LIST()
1486 },
1487 };
1488
1489 void acpi_setup(PcGuestInfo *guest_info)
1490 {
1491 AcpiBuildTables tables;
1492 AcpiBuildState *build_state;
1493
1494 if (!guest_info->fw_cfg) {
1495 ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n");
1496 return;
1497 }
1498
1499 if (!guest_info->has_acpi_build) {
1500 ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n");
1501 return;
1502 }
1503
1504 if (!acpi_enabled) {
1505 ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n");
1506 return;
1507 }
1508
1509 build_state = g_malloc0(sizeof *build_state);
1510
1511 build_state->guest_info = guest_info;
1512
1513 acpi_set_pci_info();
1514
1515 acpi_build_tables_init(&tables);
1516 acpi_build(build_state->guest_info, &tables);
1517
1518 /* Now expose it all to Guest */
1519 build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data,
1520 ACPI_BUILD_TABLE_FILE);
1521 build_state->table_size = acpi_data_len(tables.table_data);
1522
1523 acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader");
1524
1525 /*
1526 * RSDP is small so it's easy to keep it immutable, no need to
1527 * bother with ROM blobs.
1528 */
1529 fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE,
1530 tables.rsdp->data, acpi_data_len(tables.rsdp));
1531
1532 qemu_register_reset(acpi_build_reset, build_state);
1533 acpi_build_reset(build_state);
1534 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
1535
1536 /* Cleanup tables but don't free the memory: we track it
1537 * in build_state.
1538 */
1539 acpi_build_tables_cleanup(&tables, false);
1540 }
AR7 emulation for QEMU