4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/hwaddr.h"
26 #include "exec/memattrs.h"
27 #include "qapi/qapi-types-run-state.h"
28 #include "qemu/bitmap.h"
29 #include "qemu/rcu_queue.h"
30 #include "qemu/queue.h"
31 #include "qemu/thread.h"
32 #include "qemu/plugin.h"
34 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
39 * Type wide enough to contain any #target_ulong virtual address.
41 typedef uint64_t vaddr
;
42 #define VADDR_PRId PRId64
43 #define VADDR_PRIu PRIu64
44 #define VADDR_PRIo PRIo64
45 #define VADDR_PRIx PRIx64
46 #define VADDR_PRIX PRIX64
47 #define VADDR_MAX UINT64_MAX
51 * @section_id: QEMU-cpu
53 * @short_description: Base class for all CPUs
56 #define TYPE_CPU "cpu"
58 /* Since this macro is used a lot in hot code paths and in conjunction with
59 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
62 #define CPU(obj) ((CPUState *)(obj))
64 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
65 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
67 typedef enum MMUAccessType
{
73 typedef struct CPUWatchpoint CPUWatchpoint
;
75 struct TranslationBlock
;
79 * @class_by_name: Callback to map -cpu command line model name to an
80 * instantiatable CPU type.
81 * @parse_features: Callback to parse command line arguments.
82 * @reset: Callback to reset the #CPUState to its initial state.
83 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
84 * @has_work: Callback for checking if there is work to do.
85 * @do_interrupt: Callback for interrupt handling.
86 * @do_unaligned_access: Callback for unaligned access handling, if
87 * the target defines #TARGET_ALIGNED_ONLY.
88 * @do_transaction_failed: Callback for handling failed memory transactions
89 * (ie bus faults or external aborts; not MMU faults)
90 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
91 * runtime configurable endianness is currently big-endian. Non-configurable
92 * CPUs can use the default implementation of this method. This method should
93 * not be used by any callers other than the pre-1.0 virtio devices.
94 * @memory_rw_debug: Callback for GDB memory access.
95 * @dump_state: Callback for dumping state.
96 * @dump_statistics: Callback for dumping statistics.
97 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
98 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
99 * @get_memory_mapping: Callback for obtaining the memory mappings.
100 * @set_pc: Callback for setting the Program Counter register. This
101 * should have the semantics used by the target architecture when
102 * setting the PC from a source such as an ELF file entry point;
103 * for example on Arm it will also set the Thumb mode bit based
104 * on the least significant bit of the new PC value.
105 * If the target behaviour here is anything other than "set
106 * the PC register to the value passed in" then the target must
107 * also implement the synchronize_from_tb hook.
108 * @synchronize_from_tb: Callback for synchronizing state from a TCG
109 * #TranslationBlock. This is called when we abandon execution
110 * of a TB before starting it, and must set all parts of the CPU
111 * state which the previous TB in the chain may not have updated.
112 * This always includes at least the program counter; some targets
113 * will need to do more. If this hook is not implemented then the
114 * default is to call @set_pc(tb->pc).
115 * @tlb_fill: Callback for handling a softmmu tlb miss or user-only
116 * address fault. For system mode, if the access is valid, call
117 * tlb_set_page and return true; if the access is invalid, and
118 * probe is true, return false; otherwise raise an exception and
119 * do not return. For user-only mode, always raise an exception
121 * @get_phys_page_debug: Callback for obtaining a physical address.
122 * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the
123 * associated memory transaction attributes to use for the access.
124 * CPUs which use memory transaction attributes should implement this
125 * instead of get_phys_page_debug.
126 * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
127 * a memory access with the specified memory transaction attributes.
128 * @gdb_read_register: Callback for letting GDB read a register.
129 * @gdb_write_register: Callback for letting GDB write a register.
130 * @debug_check_watchpoint: Callback: return true if the architectural
131 * watchpoint whose address has matched should really fire.
132 * @debug_excp_handler: Callback for handling debug exceptions.
133 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
134 * 64-bit VM coredump.
135 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
136 * note to a 32-bit VM coredump.
137 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
138 * 32-bit VM coredump.
139 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
140 * note to a 32-bit VM coredump.
141 * @vmsd: State description for migration.
142 * @gdb_num_core_regs: Number of core registers accessible to GDB.
143 * @gdb_core_xml_file: File name for core registers GDB XML description.
144 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
145 * before the insn which triggers a watchpoint rather than after it.
146 * @gdb_arch_name: Optional callback that returns the architecture name known
147 * to GDB. The caller must free the returned string with g_free.
148 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
149 * gdb stub. Returns a pointer to the XML contents for the specified XML file
150 * or NULL if the CPU doesn't have a dynamically generated content for it.
151 * @cpu_exec_enter: Callback for cpu_exec preparation.
152 * @cpu_exec_exit: Callback for cpu_exec cleanup.
153 * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
154 * @disas_set_info: Setup architecture specific components of disassembly info
155 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
156 * address before attempting to match it against watchpoints.
158 * Represents a CPU family or model.
160 typedef struct CPUClass
{
162 DeviceClass parent_class
;
165 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
166 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
168 void (*reset
)(CPUState
*cpu
);
169 int reset_dump_flags
;
170 bool (*has_work
)(CPUState
*cpu
);
171 void (*do_interrupt
)(CPUState
*cpu
);
172 void (*do_unaligned_access
)(CPUState
*cpu
, vaddr addr
,
173 MMUAccessType access_type
,
174 int mmu_idx
, uintptr_t retaddr
);
175 void (*do_transaction_failed
)(CPUState
*cpu
, hwaddr physaddr
, vaddr addr
,
176 unsigned size
, MMUAccessType access_type
,
177 int mmu_idx
, MemTxAttrs attrs
,
178 MemTxResult response
, uintptr_t retaddr
);
179 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
180 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
181 uint8_t *buf
, int len
, bool is_write
);
182 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
183 GuestPanicInformation
* (*get_crash_info
)(CPUState
*cpu
);
184 void (*dump_statistics
)(CPUState
*cpu
, int flags
);
185 int64_t (*get_arch_id
)(CPUState
*cpu
);
186 bool (*get_paging_enabled
)(const CPUState
*cpu
);
187 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
189 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
190 void (*synchronize_from_tb
)(CPUState
*cpu
, struct TranslationBlock
*tb
);
191 bool (*tlb_fill
)(CPUState
*cpu
, vaddr address
, int size
,
192 MMUAccessType access_type
, int mmu_idx
,
193 bool probe
, uintptr_t retaddr
);
194 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
195 hwaddr (*get_phys_page_attrs_debug
)(CPUState
*cpu
, vaddr addr
,
197 int (*asidx_from_attrs
)(CPUState
*cpu
, MemTxAttrs attrs
);
198 int (*gdb_read_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
199 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
200 bool (*debug_check_watchpoint
)(CPUState
*cpu
, CPUWatchpoint
*wp
);
201 void (*debug_excp_handler
)(CPUState
*cpu
);
203 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
204 int cpuid
, void *opaque
);
205 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
207 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
208 int cpuid
, void *opaque
);
209 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
212 const VMStateDescription
*vmsd
;
213 const char *gdb_core_xml_file
;
214 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
215 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
216 void (*cpu_exec_enter
)(CPUState
*cpu
);
217 void (*cpu_exec_exit
)(CPUState
*cpu
);
218 bool (*cpu_exec_interrupt
)(CPUState
*cpu
, int interrupt_request
);
220 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
221 vaddr (*adjust_watchpoint_address
)(CPUState
*cpu
, vaddr addr
, int len
);
222 void (*tcg_initialize
)(void);
224 /* Keep non-pointer data at the end to minimize holes. */
225 int gdb_num_core_regs
;
226 bool gdb_stop_before_watchpoint
;
230 * Low 16 bits: number of cycles left, used only in icount mode.
231 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
232 * for this CPU and return to its top level loop (even in non-icount mode).
233 * This allows a single read-compare-cbranch-write sequence to test
234 * for both decrementer underflow and exceptions.
236 typedef union IcountDecr
{
239 #ifdef HOST_WORDS_BIGENDIAN
249 typedef struct CPUBreakpoint
{
251 int flags
; /* BP_* */
252 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
255 struct CPUWatchpoint
{
260 int flags
; /* BP_* */
261 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
267 struct hax_vcpu_state
;
269 #define TB_JMP_CACHE_BITS 12
270 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
274 /* The union type allows passing of 64 bit target pointers on 32 bit
275 * hosts in a single parameter
279 unsigned long host_ulong
;
284 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
285 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
286 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
287 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
288 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
290 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
292 struct qemu_work_item
;
294 #define CPU_UNSET_NUMA_NODE_ID -1
295 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
299 * @cpu_index: CPU index (informative).
300 * @cluster_index: Identifies which cluster this CPU is in.
301 * For boards which don't define clusters or for "loose" CPUs not assigned
302 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
303 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
305 * @nr_cores: Number of cores within this CPU package.
306 * @nr_threads: Number of threads within this CPU.
307 * @running: #true if CPU is currently running (lockless).
308 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
309 * valid under cpu_list_lock.
310 * @created: Indicates whether the CPU thread has been successfully created.
311 * @interrupt_request: Indicates a pending interrupt request.
312 * @halted: Nonzero if the CPU is in suspended state.
313 * @stop: Indicates a pending stop request.
314 * @stopped: Indicates the CPU has been artificially stopped.
315 * @unplug: Indicates a pending CPU unplug request.
316 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
317 * @singlestep_enabled: Flags for single-stepping.
318 * @icount_extra: Instructions until next timer event.
319 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
320 * requires that IO only be performed on the last instruction of a TB
321 * so that interrupts take effect immediately.
322 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
323 * AddressSpaces this CPU has)
324 * @num_ases: number of CPUAddressSpaces in @cpu_ases
325 * @as: Pointer to the first AddressSpace, for the convenience of targets which
326 * only have a single AddressSpace
327 * @env_ptr: Pointer to subclass-specific CPUArchState field.
328 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
329 * @gdb_regs: Additional GDB registers.
330 * @gdb_num_regs: Number of total registers accessible to GDB.
331 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
332 * @next_cpu: Next CPU sharing TB cache.
333 * @opaque: User data.
334 * @mem_io_pc: Host Program Counter at which the memory was accessed.
335 * @kvm_fd: vCPU file descriptor for KVM.
336 * @work_mutex: Lock to prevent multiple access to queued_work_*.
337 * @queued_work_first: First asynchronous work pending.
338 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
340 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
341 * @plugin_mask: Plugin event bitmap. Modified only via async work.
342 * @ignore_memory_transaction_failures: Cached copy of the MachineState
343 * flag of the same name: allows the board to suppress calling of the
344 * CPU do_transaction_failed hook function.
346 * State of one CPU core or thread.
350 DeviceState parent_obj
;
356 struct QemuThread
*thread
;
361 bool running
, has_waiter
;
362 struct QemuCond
*halt_cond
;
370 bool in_exclusive_context
;
371 uint32_t cflags_next_tb
;
372 /* updates protected by BQL */
373 uint32_t interrupt_request
;
374 int singlestep_enabled
;
375 int64_t icount_budget
;
376 int64_t icount_extra
;
377 uint64_t random_seed
;
380 QemuMutex work_mutex
;
381 struct qemu_work_item
*queued_work_first
, *queued_work_last
;
383 CPUAddressSpace
*cpu_ases
;
386 MemoryRegion
*memory
;
388 void *env_ptr
; /* CPUArchState */
389 IcountDecr
*icount_decr_ptr
;
391 /* Accessed in parallel; all accesses must be atomic */
392 struct TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
394 struct GDBRegisterState
*gdb_regs
;
397 QTAILQ_ENTRY(CPUState
) node
;
399 /* ice debug support */
400 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
402 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
403 CPUWatchpoint
*watchpoint_hit
;
407 /* In order to avoid passing too many arguments to the MMIO helpers,
408 * we store some rarely used information in the CPU context.
413 struct KVMState
*kvm_state
;
414 struct kvm_run
*kvm_run
;
416 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
417 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
418 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
420 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
422 GArray
*plugin_mem_cbs
;
424 /* TODO Move common fields from CPUArchState here. */
429 int32_t exception_index
;
431 /* shared by kvm, hax and hvf */
434 /* Used to keep track of an outstanding cpu throttle thread for migration
437 bool throttle_thread_scheduled
;
439 bool ignore_memory_transaction_failures
;
441 struct hax_vcpu_state
*hax_vcpu
;
445 /* track IOMMUs whose translations we've cached in the TCG TLB */
446 GArray
*iommu_notifiers
;
449 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
450 extern CPUTailQ cpus
;
452 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
453 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
454 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
455 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
456 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
458 extern __thread CPUState
*current_cpu
;
460 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
464 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
465 atomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
470 * qemu_tcg_mttcg_enabled:
471 * Check whether we are running MultiThread TCG or not.
473 * Returns: %true if we are in MTTCG mode %false otherwise.
475 extern bool mttcg_enabled
;
476 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
479 * cpu_paging_enabled:
480 * @cpu: The CPU whose state is to be inspected.
482 * Returns: %true if paging is enabled, %false otherwise.
484 bool cpu_paging_enabled(const CPUState
*cpu
);
487 * cpu_get_memory_mapping:
488 * @cpu: The CPU whose memory mappings are to be obtained.
489 * @list: Where to write the memory mappings to.
490 * @errp: Pointer for reporting an #Error.
492 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
496 * cpu_write_elf64_note:
497 * @f: pointer to a function that writes memory to a file
498 * @cpu: The CPU whose memory is to be dumped
499 * @cpuid: ID number of the CPU
500 * @opaque: pointer to the CPUState struct
502 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
503 int cpuid
, void *opaque
);
506 * cpu_write_elf64_qemunote:
507 * @f: pointer to a function that writes memory to a file
508 * @cpu: The CPU whose memory is to be dumped
509 * @cpuid: ID number of the CPU
510 * @opaque: pointer to the CPUState struct
512 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
516 * cpu_write_elf32_note:
517 * @f: pointer to a function that writes memory to a file
518 * @cpu: The CPU whose memory is to be dumped
519 * @cpuid: ID number of the CPU
520 * @opaque: pointer to the CPUState struct
522 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
523 int cpuid
, void *opaque
);
526 * cpu_write_elf32_qemunote:
527 * @f: pointer to a function that writes memory to a file
528 * @cpu: The CPU whose memory is to be dumped
529 * @cpuid: ID number of the CPU
530 * @opaque: pointer to the CPUState struct
532 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
536 * cpu_get_crash_info:
537 * @cpu: The CPU to get crash information for
539 * Gets the previously saved crash information.
540 * Caller is responsible for freeing the data.
542 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
547 * @CPU_DUMP_FPU: dump FPU register state, not just integer
548 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
551 CPU_DUMP_CODE
= 0x00010000,
552 CPU_DUMP_FPU
= 0x00020000,
553 CPU_DUMP_CCOP
= 0x00040000,
558 * @cpu: The CPU whose state is to be dumped.
559 * @f: If non-null, dump to this stream, else to current print sink.
563 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
566 * cpu_dump_statistics:
567 * @cpu: The CPU whose state is to be dumped.
568 * @flags: Flags what to dump.
570 * Dump CPU statistics to the current monitor if we have one, else to
573 void cpu_dump_statistics(CPUState
*cpu
, int flags
);
575 #ifndef CONFIG_USER_ONLY
577 * cpu_get_phys_page_attrs_debug:
578 * @cpu: The CPU to obtain the physical page address for.
579 * @addr: The virtual address.
580 * @attrs: Updated on return with the memory transaction attributes to use
583 * Obtains the physical page corresponding to a virtual one, together
584 * with the corresponding memory transaction attributes to use for the access.
585 * Use it only for debugging because no protection checks are done.
587 * Returns: Corresponding physical page address or -1 if no page found.
589 static inline hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
592 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
594 if (cc
->get_phys_page_attrs_debug
) {
595 return cc
->get_phys_page_attrs_debug(cpu
, addr
, attrs
);
597 /* Fallback for CPUs which don't implement the _attrs_ hook */
598 *attrs
= MEMTXATTRS_UNSPECIFIED
;
599 return cc
->get_phys_page_debug(cpu
, addr
);
603 * cpu_get_phys_page_debug:
604 * @cpu: The CPU to obtain the physical page address for.
605 * @addr: The virtual address.
607 * Obtains the physical page corresponding to a virtual one.
608 * Use it only for debugging because no protection checks are done.
610 * Returns: Corresponding physical page address or -1 if no page found.
612 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
614 MemTxAttrs attrs
= {};
616 return cpu_get_phys_page_attrs_debug(cpu
, addr
, &attrs
);
619 /** cpu_asidx_from_attrs:
621 * @attrs: memory transaction attributes
623 * Returns the address space index specifying the CPU AddressSpace
624 * to use for a memory access with the given transaction attributes.
626 static inline int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
)
628 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
631 if (cc
->asidx_from_attrs
) {
632 ret
= cc
->asidx_from_attrs(cpu
, attrs
);
633 assert(ret
< cpu
->num_ases
&& ret
>= 0);
641 * @cpu: The CPU to be added to the list of CPUs.
643 void cpu_list_add(CPUState
*cpu
);
647 * @cpu: The CPU to be removed from the list of CPUs.
649 void cpu_list_remove(CPUState
*cpu
);
653 * @cpu: The CPU whose state is to be reset.
655 void cpu_reset(CPUState
*cpu
);
659 * @typename: The CPU base type.
660 * @cpu_model: The model string without any parameters.
662 * Looks up a CPU #ObjectClass matching name @cpu_model.
664 * Returns: A #CPUClass or %NULL if not matching class is found.
666 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
670 * @typename: The CPU type.
672 * Instantiates a CPU and realizes the CPU.
674 * Returns: A #CPUState or %NULL if an error occurred.
676 CPUState
*cpu_create(const char *typename
);
680 * @cpu_option: The -cpu option including optional parameters.
682 * processes optional parameters and registers them as global properties
684 * Returns: type of CPU to create or prints error and terminates process
685 * if an error occurred.
687 const char *parse_cpu_option(const char *cpu_option
);
691 * @cpu: The vCPU to check.
693 * Checks whether the CPU has work to do.
695 * Returns: %true if the CPU has work, %false otherwise.
697 static inline bool cpu_has_work(CPUState
*cpu
)
699 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
701 g_assert(cc
->has_work
);
702 return cc
->has_work(cpu
);
707 * @cpu: The vCPU to check against.
709 * Checks whether the caller is executing on the vCPU thread.
711 * Returns: %true if called from @cpu's thread, %false otherwise.
713 bool qemu_cpu_is_self(CPUState
*cpu
);
717 * @cpu: The vCPU to kick.
719 * Kicks @cpu's thread.
721 void qemu_cpu_kick(CPUState
*cpu
);
725 * @cpu: The CPU to check.
727 * Checks whether the CPU is stopped.
729 * Returns: %true if run state is not running or if artificially stopped;
732 bool cpu_is_stopped(CPUState
*cpu
);
736 * @cpu: The vCPU to run on.
737 * @func: The function to be executed.
738 * @data: Data to pass to the function.
739 * @mutex: Mutex to release while waiting for @func to run.
741 * Used internally in the implementation of run_on_cpu.
743 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
748 * @cpu: The vCPU to run on.
749 * @func: The function to be executed.
750 * @data: Data to pass to the function.
752 * Schedules the function @func for execution on the vCPU @cpu.
754 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
758 * @cpu: The vCPU to run on.
759 * @func: The function to be executed.
760 * @data: Data to pass to the function.
762 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
764 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
767 * async_safe_run_on_cpu:
768 * @cpu: The vCPU to run on.
769 * @func: The function to be executed.
770 * @data: Data to pass to the function.
772 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
773 * while all other vCPUs are sleeping.
775 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
778 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
781 * cpu_in_exclusive_context()
782 * @cpu: The vCPU to check
784 * Returns true if @cpu is an exclusive context, for example running
785 * something which has previously been queued via async_safe_run_on_cpu().
787 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
789 return cpu
->in_exclusive_context
;
794 * @index: The CPUState@cpu_index value of the CPU to obtain.
796 * Gets a CPU matching @index.
798 * Returns: The CPU or %NULL if there is no matching CPU.
800 CPUState
*qemu_get_cpu(int index
);
804 * @id: Guest-exposed CPU ID to lookup.
806 * Search for CPU with specified ID.
808 * Returns: %true - CPU is found, %false - CPU isn't found.
810 bool cpu_exists(int64_t id
);
814 * @id: Guest-exposed CPU ID of the CPU to obtain.
816 * Get a CPU with matching @id.
818 * Returns: The CPU or %NULL if there is no matching CPU.
820 CPUState
*cpu_by_arch_id(int64_t id
);
824 * @new_throttle_pct: Percent of sleep time. Valid range is 1 to 99.
826 * Throttles all vcpus by forcing them to sleep for the given percentage of
827 * time. A throttle_percentage of 25 corresponds to a 75% duty cycle roughly.
828 * (example: 10ms sleep for every 30ms awake).
830 * cpu_throttle_set can be called as needed to adjust new_throttle_pct.
831 * Once the throttling starts, it will remain in effect until cpu_throttle_stop
834 void cpu_throttle_set(int new_throttle_pct
);
839 * Stops the vcpu throttling started by cpu_throttle_set.
841 void cpu_throttle_stop(void);
844 * cpu_throttle_active:
846 * Returns: %true if the vcpus are currently being throttled, %false otherwise.
848 bool cpu_throttle_active(void);
851 * cpu_throttle_get_percentage:
853 * Returns the vcpu throttle percentage. See cpu_throttle_set for details.
855 * Returns: The throttle percentage in range 1 to 99.
857 int cpu_throttle_get_percentage(void);
859 #ifndef CONFIG_USER_ONLY
861 typedef void (*CPUInterruptHandler
)(CPUState
*, int);
863 extern CPUInterruptHandler cpu_interrupt_handler
;
867 * @cpu: The CPU to set an interrupt on.
868 * @mask: The interrupts to set.
870 * Invokes the interrupt handler.
872 static inline void cpu_interrupt(CPUState
*cpu
, int mask
)
874 cpu_interrupt_handler(cpu
, mask
);
877 #else /* USER_ONLY */
879 void cpu_interrupt(CPUState
*cpu
, int mask
);
881 #endif /* USER_ONLY */
885 #ifdef CONFIG_SOFTMMU
886 static inline void cpu_unaligned_access(CPUState
*cpu
, vaddr addr
,
887 MMUAccessType access_type
,
888 int mmu_idx
, uintptr_t retaddr
)
890 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
892 cc
->do_unaligned_access(cpu
, addr
, access_type
, mmu_idx
, retaddr
);
895 static inline void cpu_transaction_failed(CPUState
*cpu
, hwaddr physaddr
,
896 vaddr addr
, unsigned size
,
897 MMUAccessType access_type
,
898 int mmu_idx
, MemTxAttrs attrs
,
899 MemTxResult response
,
902 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
904 if (!cpu
->ignore_memory_transaction_failures
&& cc
->do_transaction_failed
) {
905 cc
->do_transaction_failed(cpu
, physaddr
, addr
, size
, access_type
,
906 mmu_idx
, attrs
, response
, retaddr
);
911 #endif /* NEED_CPU_H */
915 * @cpu: The CPU to set the program counter for.
916 * @addr: Program counter value.
918 * Sets the program counter for a CPU.
920 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
922 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
924 cc
->set_pc(cpu
, addr
);
928 * cpu_reset_interrupt:
929 * @cpu: The CPU to clear the interrupt on.
930 * @mask: The interrupt mask to clear.
932 * Resets interrupts on the vCPU @cpu.
934 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
938 * @cpu: The CPU to exit.
940 * Requests the CPU @cpu to exit execution.
942 void cpu_exit(CPUState
*cpu
);
946 * @cpu: The CPU to resume.
948 * Resumes CPU, i.e. puts CPU into runnable state.
950 void cpu_resume(CPUState
*cpu
);
954 * @cpu: The CPU to remove.
956 * Requests the CPU to be removed.
958 void cpu_remove(CPUState
*cpu
);
962 * @cpu: The CPU to remove.
964 * Requests the CPU to be removed and waits till it is removed.
966 void cpu_remove_sync(CPUState
*cpu
);
969 * process_queued_cpu_work() - process all items on CPU work queue
970 * @cpu: The CPU which work queue to process.
972 void process_queued_cpu_work(CPUState
*cpu
);
976 * @cpu: The CPU for the current thread.
978 * Record that a CPU has started execution and can be interrupted with
981 void cpu_exec_start(CPUState
*cpu
);
985 * @cpu: The CPU for the current thread.
987 * Record that a CPU has stopped execution and exclusive sections
988 * can be executed without interrupting it.
990 void cpu_exec_end(CPUState
*cpu
);
995 * Wait for a concurrent exclusive section to end, and then start
996 * a section of work that is run while other CPUs are not running
997 * between cpu_exec_start and cpu_exec_end. CPUs that are running
998 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
999 * during the exclusive section go to sleep until this CPU calls
1002 void start_exclusive(void);
1007 * Concludes an exclusive execution section started by start_exclusive.
1009 void end_exclusive(void);
1013 * @cpu: The vCPU to initialize.
1015 * Initializes a vCPU.
1017 void qemu_init_vcpu(CPUState
*cpu
);
1019 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
1020 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
1021 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
1025 * @cpu: CPU to the flags for.
1026 * @enabled: Flags to enable.
1028 * Enables or disables single-stepping for @cpu.
1030 void cpu_single_step(CPUState
*cpu
, int enabled
);
1032 /* Breakpoint/watchpoint flags */
1033 #define BP_MEM_READ 0x01
1034 #define BP_MEM_WRITE 0x02
1035 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
1036 #define BP_STOP_BEFORE_ACCESS 0x04
1037 /* 0x08 currently unused */
1040 #define BP_ANY (BP_GDB | BP_CPU)
1041 #define BP_WATCHPOINT_HIT_READ 0x40
1042 #define BP_WATCHPOINT_HIT_WRITE 0x80
1043 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
1045 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1046 CPUBreakpoint
**breakpoint
);
1047 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
1048 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
1049 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
1051 /* Return true if PC matches an installed breakpoint. */
1052 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
1056 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
1057 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1058 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
1066 #ifdef CONFIG_USER_ONLY
1067 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1068 int flags
, CPUWatchpoint
**watchpoint
)
1073 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
1074 vaddr len
, int flags
)
1079 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
1084 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
1088 static inline void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
1089 MemTxAttrs atr
, int fl
, uintptr_t ra
)
1093 static inline int cpu_watchpoint_address_matches(CPUState
*cpu
,
1094 vaddr addr
, vaddr len
)
1099 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1100 int flags
, CPUWatchpoint
**watchpoint
);
1101 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
1102 vaddr len
, int flags
);
1103 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
1104 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
1105 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
1106 MemTxAttrs attrs
, int flags
, uintptr_t ra
);
1107 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
);
1111 * cpu_get_address_space:
1112 * @cpu: CPU to get address space from
1113 * @asidx: index identifying which address space to get
1115 * Return the requested address space of this CPU. @asidx
1116 * specifies which address space to read.
1118 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1120 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1122 extern Property cpu_common_props
[];
1123 void cpu_exec_initfn(CPUState
*cpu
);
1124 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1125 void cpu_exec_unrealizefn(CPUState
*cpu
);
1128 * target_words_bigendian:
1129 * Returns true if the (default) endianness of the target is big endian,
1130 * false otherwise. Note that in target-specific code, you can use
1131 * TARGET_WORDS_BIGENDIAN directly instead. On the other hand, common
1132 * code should normally never need to know about the endianness of the
1133 * target, so please do *not* use this function unless you know very well
1134 * what you are doing!
1136 bool target_words_bigendian(void);
1140 #ifdef CONFIG_SOFTMMU
1141 extern const VMStateDescription vmstate_cpu_common
;
1143 #define vmstate_cpu_common vmstate_dummy
1146 #define VMSTATE_CPU() { \
1147 .name = "parent_obj", \
1148 .size = sizeof(CPUState), \
1149 .vmsd = &vmstate_cpu_common, \
1150 .flags = VMS_STRUCT, \
1154 #endif /* NEED_CPU_H */
1156 #define UNASSIGNED_CPU_INDEX -1
1157 #define UNASSIGNED_CLUSTER_INDEX -1