hw/pci/pcie_host.c

   1 /*
   2  * pcie_host.c
   3  * utility functions for pci express host bridge.
   4  *
   5  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6  *                    VA Linux Systems Japan K.K.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "hw/pci/pci.h"
  24 #include "hw/pci/pcie_host.h"
  25 #include "qemu/module.h"
  26 #include "exec/address-spaces.h"
  27
  28 /* a helper function to get a PCIDevice for a given mmconfig address */
  29 static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s,
  30                                                      uint32_t mmcfg_addr)
  31 {
  32     return pci_find_device(s, PCIE_MMCFG_BUS(mmcfg_addr),
  33                            PCIE_MMCFG_DEVFN(mmcfg_addr));
  34 }
  35
  36 static void pcie_mmcfg_data_write(void *opaque, hwaddr mmcfg_addr,
  37                                   uint64_t val, unsigned len)
  38 {
  39     PCIExpressHost *e = opaque;
  40     PCIBus *s = e->pci.bus;
  41     PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
  42     uint32_t addr;
  43     uint32_t limit;
  44
  45     if (!pci_dev) {
  46         return;
  47     }
  48     addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
  49     limit = pci_config_size(pci_dev);
  50     pci_host_config_write_common(pci_dev, addr, limit, val, len);
  51 }
  52
  53 static uint64_t pcie_mmcfg_data_read(void *opaque,
  54                                      hwaddr mmcfg_addr,
  55                                      unsigned len)
  56 {
  57     PCIExpressHost *e = opaque;
  58     PCIBus *s = e->pci.bus;
  59     PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
  60     uint32_t addr;
  61     uint32_t limit;
  62
  63     if (!pci_dev) {
  64         return ~0x0;
  65     }
  66     addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
  67     limit = pci_config_size(pci_dev);
  68     return pci_host_config_read_common(pci_dev, addr, limit, len);
  69 }
  70
  71 static const MemoryRegionOps pcie_mmcfg_ops = {
  72     .read = pcie_mmcfg_data_read,
  73     .write = pcie_mmcfg_data_write,
  74     .endianness = DEVICE_LITTLE_ENDIAN,
  75 };
  76
  77 static void pcie_host_init(Object *obj)
  78 {
  79     PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
  80
  81     e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
  82     memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio",
  83                           PCIE_MMCFG_SIZE_MAX);
  84 }
  85
  86 void pcie_host_mmcfg_unmap(PCIExpressHost *e)
  87 {
  88     if (e->base_addr != PCIE_BASE_ADDR_UNMAPPED) {
  89         memory_region_del_subregion(get_system_memory(), &e->mmio);
  90         e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
  91     }
  92 }
  93
  94 void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size)
  95 {
  96     assert(!(size & (size - 1)));       /* power of 2 */
  97     assert(size >= PCIE_MMCFG_SIZE_MIN);
  98     assert(size <= PCIE_MMCFG_SIZE_MAX);
  99     e->size = size;
 100     memory_region_set_size(&e->mmio, e->size);
 101 }
 102
 103 void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
 104                          uint32_t size)
 105 {
 106     pcie_host_mmcfg_init(e, size);
 107     e->base_addr = addr;
 108     memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
 109 }
 110
 111 void pcie_host_mmcfg_update(PCIExpressHost *e,
 112                             int enable,
 113                             hwaddr addr,
 114                             uint32_t size)
 115 {
 116     memory_region_transaction_begin();
 117     pcie_host_mmcfg_unmap(e);
 118     if (enable) {
 119         pcie_host_mmcfg_map(e, addr, size);
 120     }
 121     memory_region_transaction_commit();
 122 }
 123
 124 static const TypeInfo pcie_host_type_info = {
 125     .name = TYPE_PCIE_HOST_BRIDGE,
 126     .parent = TYPE_PCI_HOST_BRIDGE,
 127     .abstract = true,
 128     .instance_size = sizeof(PCIExpressHost),
 129     .instance_init = pcie_host_init,
 130 };
 131
 132 static void pcie_host_register_types(void)
 133 {
 134     type_register_static(&pcie_host_type_info);
 135 }
 136
 137 type_init(pcie_host_register_types)