qemu-pr-helper: use new libmultipath API
[qemu/ar7.git] / target / s390x / cpu.c
blob3fdf9bae70693d4bd3741af6e38d33471d517e02
1 /*
2 * QEMU S/390 CPU
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
6 * Copyright (c) 2012 SUSE LINUX Products GmbH
7 * Copyright (c) 2012 IBM Corp.
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2.1 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, see
21 * <http://www.gnu.org/licenses/lgpl-2.1.html>
22 * Contributions after 2012-12-11 are licensed under the terms of the
23 * GNU GPL, version 2 or (at your option) any later version.
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "cpu.h"
29 #include "internal.h"
30 #include "kvm_s390x.h"
31 #include "sysemu/kvm.h"
32 #include "qemu-common.h"
33 #include "qemu/cutils.h"
34 #include "qemu/timer.h"
35 #include "qemu/error-report.h"
36 #include "trace.h"
37 #include "qapi/visitor.h"
38 #include "exec/exec-all.h"
39 #include "hw/qdev-properties.h"
40 #ifndef CONFIG_USER_ONLY
41 #include "hw/hw.h"
42 #include "sysemu/arch_init.h"
43 #include "sysemu/sysemu.h"
44 #endif
46 #define CR0_RESET 0xE0UL
47 #define CR14_RESET 0xC2000000UL;
49 static void s390_cpu_set_pc(CPUState *cs, vaddr value)
51 S390CPU *cpu = S390_CPU(cs);
53 cpu->env.psw.addr = value;
56 static bool s390_cpu_has_work(CPUState *cs)
58 S390CPU *cpu = S390_CPU(cs);
59 CPUS390XState *env = &cpu->env;
61 return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
62 (env->psw.mask & PSW_MASK_EXT);
65 #if !defined(CONFIG_USER_ONLY)
66 /* S390CPUClass::load_normal() */
67 static void s390_cpu_load_normal(CPUState *s)
69 S390CPU *cpu = S390_CPU(s);
70 cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
71 cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64;
72 s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
74 #endif
76 /* S390CPUClass::cpu_reset() */
77 static void s390_cpu_reset(CPUState *s)
79 S390CPU *cpu = S390_CPU(s);
80 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
81 CPUS390XState *env = &cpu->env;
83 env->pfault_token = -1UL;
84 scc->parent_reset(s);
85 cpu->env.sigp_order = 0;
86 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
89 /* S390CPUClass::initial_reset() */
90 static void s390_cpu_initial_reset(CPUState *s)
92 S390CPU *cpu = S390_CPU(s);
93 CPUS390XState *env = &cpu->env;
94 int i;
96 s390_cpu_reset(s);
97 /* initial reset does not clear everything! */
98 memset(&env->start_initial_reset_fields, 0,
99 offsetof(CPUS390XState, end_reset_fields) -
100 offsetof(CPUS390XState, start_initial_reset_fields));
102 /* architectured initial values for CR 0 and 14 */
103 env->cregs[0] = CR0_RESET;
104 env->cregs[14] = CR14_RESET;
106 /* architectured initial value for Breaking-Event-Address register */
107 env->gbea = 1;
109 env->pfault_token = -1UL;
110 env->ext_index = -1;
111 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
112 env->io_index[i] = -1;
114 env->mchk_index = -1;
116 /* tininess for underflow is detected before rounding */
117 set_float_detect_tininess(float_tininess_before_rounding,
118 &env->fpu_status);
120 /* Reset state inside the kernel that we cannot access yet from QEMU. */
121 if (kvm_enabled()) {
122 kvm_s390_reset_vcpu(cpu);
126 /* CPUClass:reset() */
127 static void s390_cpu_full_reset(CPUState *s)
129 S390CPU *cpu = S390_CPU(s);
130 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
131 CPUS390XState *env = &cpu->env;
132 int i;
134 scc->parent_reset(s);
135 cpu->env.sigp_order = 0;
136 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
138 memset(env, 0, offsetof(CPUS390XState, end_reset_fields));
140 /* architectured initial values for CR 0 and 14 */
141 env->cregs[0] = CR0_RESET;
142 env->cregs[14] = CR14_RESET;
144 /* architectured initial value for Breaking-Event-Address register */
145 env->gbea = 1;
147 env->pfault_token = -1UL;
148 env->ext_index = -1;
149 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
150 env->io_index[i] = -1;
152 env->mchk_index = -1;
154 /* tininess for underflow is detected before rounding */
155 set_float_detect_tininess(float_tininess_before_rounding,
156 &env->fpu_status);
158 /* Reset state inside the kernel that we cannot access yet from QEMU. */
159 if (kvm_enabled()) {
160 kvm_s390_reset_vcpu(cpu);
164 #if !defined(CONFIG_USER_ONLY)
165 static void s390_cpu_machine_reset_cb(void *opaque)
167 S390CPU *cpu = opaque;
169 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
171 #endif
173 static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
175 info->mach = bfd_mach_s390_64;
176 info->print_insn = print_insn_s390;
179 static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
181 CPUState *cs = CPU(dev);
182 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
183 #if !defined(CONFIG_USER_ONLY)
184 S390CPU *cpu = S390_CPU(dev);
185 #endif
186 Error *err = NULL;
188 /* the model has to be realized before qemu_init_vcpu() due to kvm */
189 s390_realize_cpu_model(cs, &err);
190 if (err) {
191 goto out;
194 #if !defined(CONFIG_USER_ONLY)
195 if (cpu->env.core_id >= max_cpus) {
196 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
197 ", maximum core-id: %d", cpu->env.core_id,
198 max_cpus - 1);
199 goto out;
202 if (cpu_exists(cpu->env.core_id)) {
203 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
204 ", it already exists", cpu->env.core_id);
205 goto out;
208 /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */
209 cs->cpu_index = cpu->env.core_id;
210 #endif
212 cpu_exec_realizefn(cs, &err);
213 if (err != NULL) {
214 goto out;
217 #if !defined(CONFIG_USER_ONLY)
218 qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
219 #endif
220 s390_cpu_gdb_init(cs);
221 qemu_init_vcpu(cs);
222 #if !defined(CONFIG_USER_ONLY)
223 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
224 #else
225 cpu_reset(cs);
226 #endif
228 scc->parent_realize(dev, &err);
229 out:
230 error_propagate(errp, err);
233 static void s390_cpu_initfn(Object *obj)
235 CPUState *cs = CPU(obj);
236 S390CPU *cpu = S390_CPU(obj);
237 CPUS390XState *env = &cpu->env;
238 static bool inited;
239 #if !defined(CONFIG_USER_ONLY)
240 struct tm tm;
241 #endif
243 cs->env_ptr = env;
244 cs->halted = 1;
245 cs->exception_index = EXCP_HLT;
246 s390_cpu_model_register_props(obj);
247 #if !defined(CONFIG_USER_ONLY)
248 qemu_get_timedate(&tm, 0);
249 env->tod_offset = TOD_UNIX_EPOCH +
250 (time2tod(mktimegm(&tm)) * 1000000000ULL);
251 env->tod_basetime = 0;
252 env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
253 env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
254 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
255 #endif
257 if (tcg_enabled() && !inited) {
258 inited = true;
259 s390x_translate_init();
263 static void s390_cpu_finalize(Object *obj)
265 #if !defined(CONFIG_USER_ONLY)
266 S390CPU *cpu = S390_CPU(obj);
268 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
269 g_free(cpu->irqstate);
270 #endif
273 #if !defined(CONFIG_USER_ONLY)
274 static bool disabled_wait(CPUState *cpu)
276 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
277 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
280 static unsigned s390_count_running_cpus(void)
282 CPUState *cpu;
283 int nr_running = 0;
285 CPU_FOREACH(cpu) {
286 uint8_t state = S390_CPU(cpu)->env.cpu_state;
287 if (state == CPU_STATE_OPERATING ||
288 state == CPU_STATE_LOAD) {
289 if (!disabled_wait(cpu)) {
290 nr_running++;
295 return nr_running;
298 unsigned int s390_cpu_halt(S390CPU *cpu)
300 CPUState *cs = CPU(cpu);
301 trace_cpu_halt(cs->cpu_index);
303 if (!cs->halted) {
304 cs->halted = 1;
305 cs->exception_index = EXCP_HLT;
308 return s390_count_running_cpus();
311 void s390_cpu_unhalt(S390CPU *cpu)
313 CPUState *cs = CPU(cpu);
314 trace_cpu_unhalt(cs->cpu_index);
316 if (cs->halted) {
317 cs->halted = 0;
318 cs->exception_index = -1;
322 unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
324 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
326 switch (cpu_state) {
327 case CPU_STATE_STOPPED:
328 case CPU_STATE_CHECK_STOP:
329 /* halt the cpu for common infrastructure */
330 s390_cpu_halt(cpu);
331 break;
332 case CPU_STATE_OPERATING:
333 case CPU_STATE_LOAD:
334 /* unhalt the cpu for common infrastructure */
335 s390_cpu_unhalt(cpu);
336 break;
337 default:
338 error_report("Requested CPU state is not a valid S390 CPU state: %u",
339 cpu_state);
340 exit(1);
342 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
343 kvm_s390_set_cpu_state(cpu, cpu_state);
345 cpu->env.cpu_state = cpu_state;
347 return s390_count_running_cpus();
350 int s390_get_clock(uint8_t *tod_high, uint64_t *tod_low)
352 int r = 0;
354 if (kvm_enabled()) {
355 r = kvm_s390_get_clock_ext(tod_high, tod_low);
356 if (r == -ENXIO) {
357 return kvm_s390_get_clock(tod_high, tod_low);
359 } else {
360 /* Fixme TCG */
361 *tod_high = 0;
362 *tod_low = 0;
365 return r;
368 int s390_set_clock(uint8_t *tod_high, uint64_t *tod_low)
370 int r = 0;
372 if (kvm_enabled()) {
373 r = kvm_s390_set_clock_ext(tod_high, tod_low);
374 if (r == -ENXIO) {
375 return kvm_s390_set_clock(tod_high, tod_low);
378 /* Fixme TCG */
379 return r;
382 int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit)
384 if (kvm_enabled()) {
385 return kvm_s390_set_mem_limit(new_limit, hw_limit);
387 return 0;
390 void s390_cmma_reset(void)
392 if (kvm_enabled()) {
393 kvm_s390_cmma_reset();
397 int s390_cpu_restart(S390CPU *cpu)
399 if (kvm_enabled()) {
400 return kvm_s390_cpu_restart(cpu);
402 return -ENOSYS;
405 int s390_get_memslot_count(void)
407 if (kvm_enabled()) {
408 return kvm_s390_get_memslot_count();
409 } else {
410 return MAX_AVAIL_SLOTS;
414 int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id,
415 int vq, bool assign)
417 if (kvm_enabled()) {
418 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
419 } else {
420 return 0;
424 void s390_crypto_reset(void)
426 if (kvm_enabled()) {
427 kvm_s390_crypto_reset();
431 bool s390_get_squash_mcss(void)
433 if (object_property_get_bool(OBJECT(qdev_get_machine()), "s390-squash-mcss",
434 NULL)) {
435 return true;
438 return false;
441 void s390_enable_css_support(S390CPU *cpu)
443 if (kvm_enabled()) {
444 kvm_s390_enable_css_support(cpu);
447 #endif
449 static gchar *s390_gdb_arch_name(CPUState *cs)
451 return g_strdup("s390:64-bit");
454 static Property s390x_cpu_properties[] = {
455 #if !defined(CONFIG_USER_ONLY)
456 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
457 #endif
458 DEFINE_PROP_END_OF_LIST()
461 static void s390_cpu_class_init(ObjectClass *oc, void *data)
463 S390CPUClass *scc = S390_CPU_CLASS(oc);
464 CPUClass *cc = CPU_CLASS(scc);
465 DeviceClass *dc = DEVICE_CLASS(oc);
467 scc->parent_realize = dc->realize;
468 dc->realize = s390_cpu_realizefn;
469 dc->props = s390x_cpu_properties;
470 dc->user_creatable = true;
472 scc->parent_reset = cc->reset;
473 #if !defined(CONFIG_USER_ONLY)
474 scc->load_normal = s390_cpu_load_normal;
475 #endif
476 scc->cpu_reset = s390_cpu_reset;
477 scc->initial_cpu_reset = s390_cpu_initial_reset;
478 cc->reset = s390_cpu_full_reset;
479 cc->class_by_name = s390_cpu_class_by_name,
480 cc->has_work = s390_cpu_has_work;
481 #ifdef CONFIG_TCG
482 cc->do_interrupt = s390_cpu_do_interrupt;
483 #endif
484 cc->dump_state = s390_cpu_dump_state;
485 cc->set_pc = s390_cpu_set_pc;
486 cc->gdb_read_register = s390_cpu_gdb_read_register;
487 cc->gdb_write_register = s390_cpu_gdb_write_register;
488 #ifdef CONFIG_USER_ONLY
489 cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
490 #else
491 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
492 cc->vmsd = &vmstate_s390_cpu;
493 cc->write_elf64_note = s390_cpu_write_elf64_note;
494 #ifdef CONFIG_TCG
495 cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
496 cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
497 cc->do_unaligned_access = s390x_cpu_do_unaligned_access;
498 #endif
499 #endif
500 cc->disas_set_info = s390_cpu_disas_set_info;
502 cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
503 cc->gdb_core_xml_file = "s390x-core64.xml";
504 cc->gdb_arch_name = s390_gdb_arch_name;
506 s390_cpu_model_class_register_props(oc);
509 static const TypeInfo s390_cpu_type_info = {
510 .name = TYPE_S390_CPU,
511 .parent = TYPE_CPU,
512 .instance_size = sizeof(S390CPU),
513 .instance_init = s390_cpu_initfn,
514 .instance_finalize = s390_cpu_finalize,
515 .abstract = true,
516 .class_size = sizeof(S390CPUClass),
517 .class_init = s390_cpu_class_init,
520 static void s390_cpu_register_types(void)
522 type_register_static(&s390_cpu_type_info);
525 type_init(s390_cpu_register_types)