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[qemu/ar7.git] / hw / mips / mips_fulong2e.c
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1 /*
2 * QEMU fulong 2e mini pc support
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
21 #include "qemu/osdep.h"
22 #include "qemu-common.h"
23 #include "qemu/units.h"
24 #include "qapi/error.h"
25 #include "cpu.h"
26 #include "hw/intc/i8259.h"
27 #include "hw/dma/i8257.h"
28 #include "hw/isa/superio.h"
29 #include "net/net.h"
30 #include "hw/boards.h"
31 #include "hw/i2c/smbus_eeprom.h"
32 #include "hw/block/flash.h"
33 #include "hw/mips/mips.h"
34 #include "hw/mips/cpudevs.h"
35 #include "hw/pci/pci.h"
36 #include "audio/audio.h"
37 #include "qemu/log.h"
38 #include "hw/loader.h"
39 #include "hw/ide/pci.h"
40 #include "elf.h"
41 #include "hw/isa/vt82c686.h"
42 #include "hw/rtc/mc146818rtc.h"
43 #include "hw/timer/i8254.h"
44 #include "exec/address-spaces.h"
45 #include "sysemu/qtest.h"
46 #include "sysemu/reset.h"
47 #include "qemu/error-report.h"
49 #define DEBUG_FULONG2E_INIT
51 #define ENVP_ADDR 0x80002000l
52 #define ENVP_NB_ENTRIES 16
53 #define ENVP_ENTRY_SIZE 256
55 /* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
56 #define BIOS_SIZE (512 * KiB)
57 #define MAX_IDE_BUS 2
60 * PMON is not part of qemu and released with BSD license, anyone
61 * who want to build a pmon binary please first git-clone the source
62 * from the git repository at:
63 * http://www.loongson.cn/support/git/pmon
64 * Then follow the "Compile Guide" available at:
65 * http://dev.lemote.com/code/pmon
67 * Notes:
68 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
69 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
70 * in the "Compile Guide".
72 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
74 /* PCI SLOT in fulong 2e */
75 #define FULONG2E_VIA_SLOT 5
76 #define FULONG2E_ATI_SLOT 6
77 #define FULONG2E_RTL8139_SLOT 7
79 static struct _loaderparams {
80 int ram_size;
81 const char *kernel_filename;
82 const char *kernel_cmdline;
83 const char *initrd_filename;
84 } loaderparams;
86 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
87 const char *string, ...)
89 va_list ap;
90 int32_t table_addr;
92 if (index >= ENVP_NB_ENTRIES) {
93 return;
96 if (string == NULL) {
97 prom_buf[index] = 0;
98 return;
101 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
102 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
104 va_start(ap, string);
105 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
106 va_end(ap);
109 static int64_t load_kernel(CPUMIPSState *env)
111 int64_t kernel_entry, kernel_low, kernel_high, initrd_size;
112 int index = 0;
113 long kernel_size;
114 ram_addr_t initrd_offset;
115 uint32_t *prom_buf;
116 long prom_size;
118 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
119 cpu_mips_kseg0_to_phys, NULL,
120 (uint64_t *)&kernel_entry,
121 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
122 NULL, 0, EM_MIPS, 1, 0);
123 if (kernel_size < 0) {
124 error_report("could not load kernel '%s': %s",
125 loaderparams.kernel_filename,
126 load_elf_strerror(kernel_size));
127 exit(1);
130 /* load initrd */
131 initrd_size = 0;
132 initrd_offset = 0;
133 if (loaderparams.initrd_filename) {
134 initrd_size = get_image_size(loaderparams.initrd_filename);
135 if (initrd_size > 0) {
136 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &
137 INITRD_PAGE_MASK;
138 if (initrd_offset + initrd_size > ram_size) {
139 error_report("memory too small for initial ram disk '%s'",
140 loaderparams.initrd_filename);
141 exit(1);
143 initrd_size = load_image_targphys(loaderparams.initrd_filename,
144 initrd_offset,
145 ram_size - initrd_offset);
147 if (initrd_size == (target_ulong) -1) {
148 error_report("could not load initial ram disk '%s'",
149 loaderparams.initrd_filename);
150 exit(1);
154 /* Setup prom parameters. */
155 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
156 prom_buf = g_malloc(prom_size);
158 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
159 if (initrd_size > 0) {
160 prom_set(prom_buf, index++,
161 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
162 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
163 initrd_size, loaderparams.kernel_cmdline);
164 } else {
165 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
168 /* Setup minimum environment variables */
169 prom_set(prom_buf, index++, "busclock=33000000");
170 prom_set(prom_buf, index++, "cpuclock=100000000");
171 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
172 prom_set(prom_buf, index++, "modetty0=38400n8r");
173 prom_set(prom_buf, index++, NULL);
175 rom_add_blob_fixed("prom", prom_buf, prom_size,
176 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
178 g_free(prom_buf);
179 return kernel_entry;
182 static void write_bootloader(CPUMIPSState *env, uint8_t *base,
183 int64_t kernel_addr)
185 uint32_t *p;
187 /* Small bootloader */
188 p = (uint32_t *)base;
190 /* j 0x1fc00040 */
191 stl_p(p++, 0x0bf00010);
192 /* nop */
193 stl_p(p++, 0x00000000);
195 /* Second part of the bootloader */
196 p = (uint32_t *)(base + 0x040);
198 /* lui a0, 0 */
199 stl_p(p++, 0x3c040000);
200 /* ori a0, a0, 2 */
201 stl_p(p++, 0x34840002);
202 /* lui a1, high(ENVP_ADDR) */
203 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));
204 /* ori a1, a0, low(ENVP_ADDR) */
205 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));
206 /* lui a2, high(ENVP_ADDR + 8) */
207 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));
208 /* ori a2, a2, low(ENVP_ADDR + 8) */
209 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));
210 /* lui a3, high(env->ram_size) */
211 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
212 /* ori a3, a3, low(env->ram_size) */
213 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
214 /* lui ra, high(kernel_addr) */
215 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
216 /* ori ra, ra, low(kernel_addr) */
217 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
218 /* jr ra */
219 stl_p(p++, 0x03e00008);
220 /* nop */
221 stl_p(p++, 0x00000000);
224 static void main_cpu_reset(void *opaque)
226 MIPSCPU *cpu = opaque;
227 CPUMIPSState *env = &cpu->env;
229 cpu_reset(CPU(cpu));
230 /* TODO: 2E reset stuff */
231 if (loaderparams.kernel_filename) {
232 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
236 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
237 I2CBus **i2c_bus, ISABus **p_isa_bus)
239 qemu_irq *i8259;
240 ISABus *isa_bus;
241 PCIDevice *dev;
243 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
244 if (!isa_bus) {
245 fprintf(stderr, "vt82c686b_init error\n");
246 exit(1);
248 *p_isa_bus = isa_bus;
249 /* Interrupt controller */
250 /* The 8259 -> IP5 */
251 i8259 = i8259_init(isa_bus, intc);
252 isa_bus_irqs(isa_bus, i8259);
253 /* init other devices */
254 i8254_pit_init(isa_bus, 0x40, 0, NULL);
255 i8257_dma_init(isa_bus, 0);
256 /* Super I/O */
257 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
259 dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
260 pci_ide_create_devs(dev);
262 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
263 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
265 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
267 /* Audio support */
268 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
269 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
272 /* Network support */
273 static void network_init(PCIBus *pci_bus)
275 int i;
277 for (i = 0; i < nb_nics; i++) {
278 NICInfo *nd = &nd_table[i];
279 const char *default_devaddr = NULL;
281 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
282 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
283 default_devaddr = "07";
286 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
290 static void mips_fulong2e_init(MachineState *machine)
292 const char *kernel_filename = machine->kernel_filename;
293 const char *kernel_cmdline = machine->kernel_cmdline;
294 const char *initrd_filename = machine->initrd_filename;
295 char *filename;
296 MemoryRegion *address_space_mem = get_system_memory();
297 MemoryRegion *bios = g_new(MemoryRegion, 1);
298 long bios_size;
299 uint8_t *spd_data;
300 Error *err = NULL;
301 int64_t kernel_entry;
302 PCIBus *pci_bus;
303 ISABus *isa_bus;
304 I2CBus *smbus;
305 MIPSCPU *cpu;
306 CPUMIPSState *env;
307 DeviceState *dev;
309 /* init CPUs */
310 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
311 env = &cpu->env;
313 qemu_register_reset(main_cpu_reset, cpu);
315 /* TODO: support more than 256M RAM as highmem */
316 if (machine->ram_size != 256 * MiB) {
317 error_report("Invalid RAM size, should be 256MB");
318 exit(EXIT_FAILURE);
321 /* allocate RAM */
322 memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
323 &error_fatal);
325 memory_region_add_subregion(address_space_mem, 0, machine->ram);
326 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
329 * We do not support flash operation, just loading pmon.bin as raw BIOS.
330 * Please use -L to set the BIOS path and -bios to set bios name.
333 if (kernel_filename) {
334 loaderparams.ram_size = machine->ram_size;
335 loaderparams.kernel_filename = kernel_filename;
336 loaderparams.kernel_cmdline = kernel_cmdline;
337 loaderparams.initrd_filename = initrd_filename;
338 kernel_entry = load_kernel(env);
339 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
340 } else {
341 if (bios_name == NULL) {
342 bios_name = FULONG_BIOSNAME;
344 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
345 if (filename) {
346 bios_size = load_image_targphys(filename, 0x1fc00000LL,
347 BIOS_SIZE);
348 g_free(filename);
349 } else {
350 bios_size = -1;
353 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
354 !kernel_filename && !qtest_enabled()) {
355 error_report("Could not load MIPS bios '%s'", bios_name);
356 exit(1);
360 /* Init internal devices */
361 cpu_mips_irq_init_cpu(cpu);
362 cpu_mips_clock_init(cpu);
364 /* North bridge, Bonito --> IP2 */
365 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
367 /* South bridge -> IP5 */
368 vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
369 &smbus, &isa_bus);
371 /* GPU */
372 if (vga_interface_type != VGA_NONE) {
373 dev = DEVICE(pci_create(pci_bus, -1, "ati-vga"));
374 qdev_prop_set_uint32(dev, "vgamem_mb", 16);
375 qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
376 qdev_init_nofail(dev);
379 /* Populate SPD eeprom data */
380 spd_data = spd_data_generate(DDR, machine->ram_size, &err);
381 if (err) {
382 warn_report_err(err);
384 if (spd_data) {
385 smbus_eeprom_init_one(smbus, 0x50, spd_data);
388 mc146818_rtc_init(isa_bus, 2000, NULL);
390 /* Network card: RTL8139D */
391 network_init(pci_bus);
394 static void mips_fulong2e_machine_init(MachineClass *mc)
396 mc->desc = "Fulong 2e mini pc";
397 mc->init = mips_fulong2e_init;
398 mc->block_default_type = IF_IDE;
399 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
400 mc->default_ram_size = 256 * MiB;
401 mc->default_ram_id = "fulong2e.ram";
404 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)