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libqos: allow zero-size allocations
[qemu/ar7.git] / memory.c
blob93bd8ed7bc974037d6ef9ec1ad4e38ac10b2e784
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qemu/error-report.h"
22 #include "qom/object.h"
23 #include "trace.h"
24 #include <assert.h>
25
26 #include "exec/memory-internal.h"
27 #include "exec/ram_addr.h"
28 #include "sysemu/kvm.h"
29 #include "sysemu/sysemu.h"
30
31 //#define DEBUG_UNASSIGNED
32
33 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
35 static unsigned memory_region_transaction_depth;
36 static bool memory_region_update_pending;
37 static bool ioeventfd_update_pending;
38 static bool global_dirty_log = false;
39
40 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
42
43 static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
46 typedef struct AddrRange AddrRange;
47
48 /*
49 * Note that signed integers are needed for negative offsetting in aliases
50 * (large MemoryRegion::alias_offset).
51 */
52 struct AddrRange {
53 Int128 start;
54 Int128 size;
55 };
56
57 static AddrRange addrrange_make(Int128 start, Int128 size)
58 {
59 return (AddrRange) { start, size };
60 }
61
62 static bool addrrange_equal(AddrRange r1, AddrRange r2)
63 {
64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
65 }
66
67 static Int128 addrrange_end(AddrRange r)
68 {
69 return int128_add(r.start, r.size);
70 }
71
72 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
73 {
74 int128_addto(&range.start, delta);
75 return range;
76 }
77
78 static bool addrrange_contains(AddrRange range, Int128 addr)
79 {
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82 }
83
84 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85 {
86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
88 }
89
90 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91 {
92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
95 }
96
97 enum ListenerDirection { Forward, Reverse };
98
99 static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101 {
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104 }
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
158 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
159 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
161 .mr = (fr)->mr, \
162 .address_space = (as), \
163 .offset_within_region = (fr)->offset_in_region, \
164 .size = (fr)->addr.size, \
165 .offset_within_address_space = int128_get64((fr)->addr.start), \
166 .readonly = (fr)->readonly, \
167 }), ##_args)
168
169 struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172 };
173
174 struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
178 EventNotifier *e;
179 };
180
181 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183 {
184 if (int128_lt(a.addr.start, b.addr.start)) {
185 return true;
186 } else if (int128_gt(a.addr.start, b.addr.start)) {
187 return false;
188 } else if (int128_lt(a.addr.size, b.addr.size)) {
189 return true;
190 } else if (int128_gt(a.addr.size, b.addr.size)) {
191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
203 if (a.e < b.e) {
204 return true;
205 } else if (a.e > b.e) {
206 return false;
207 }
208 return false;
209 }
210
211 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213 {
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216 }
217
218 typedef struct FlatRange FlatRange;
219 typedef struct FlatView FlatView;
220
221 /* Range of memory in the global map. Addresses are absolute. */
222 struct FlatRange {
223 MemoryRegion *mr;
224 hwaddr offset_in_region;
225 AddrRange addr;
226 uint8_t dirty_log_mask;
227 bool romd_mode;
228 bool readonly;
229 };
230
231 /* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234 struct FlatView {
235 struct rcu_head rcu;
236 unsigned ref;
237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240 };
241
242 typedef struct AddressSpaceOps AddressSpaceOps;
243
244 #define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly;
254 }
255
256 static void flatview_init(FlatView *view)
257 {
258 view->ref = 1;
259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
288 g_free(view->ranges);
289 g_free(view);
290 }
291
292 static void flatview_ref(FlatView *view)
293 {
294 atomic_inc(&view->ref);
295 }
296
297 static void flatview_unref(FlatView *view)
298 {
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302 }
303
304 static bool can_merge(FlatRange *r1, FlatRange *r2)
305 {
306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
307 && r1->mr == r2->mr
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
311 && r1->dirty_log_mask == r2->dirty_log_mask
312 && r1->romd_mode == r2->romd_mode
313 && r1->readonly == r2->readonly;
314 }
315
316 /* Attempt to simplify a view by merging adjacent ranges */
317 static void flatview_simplify(FlatView *view)
318 {
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334 }
335
336 static bool memory_region_big_endian(MemoryRegion *mr)
337 {
338 #ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340 #else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342 #endif
343 }
344
345 static bool memory_region_wrong_endianness(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355 {
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373 }
374
375 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
376 hwaddr addr,
377 uint64_t *value,
378 unsigned size,
379 unsigned shift,
380 uint64_t mask,
381 MemTxAttrs attrs)
382 {
383 uint64_t tmp;
384
385 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
386 trace_memory_region_ops_read(mr, addr, tmp, size);
387 *value |= (tmp & mask) << shift;
388 return MEMTX_OK;
389 }
390
391 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
392 hwaddr addr,
393 uint64_t *value,
394 unsigned size,
395 unsigned shift,
396 uint64_t mask,
397 MemTxAttrs attrs)
398 {
399 uint64_t tmp;
400
401 tmp = mr->ops->read(mr->opaque, addr, size);
402 trace_memory_region_ops_read(mr, addr, tmp, size);
403 *value |= (tmp & mask) << shift;
404 return MEMTX_OK;
405 }
406
407 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
408 hwaddr addr,
409 uint64_t *value,
410 unsigned size,
411 unsigned shift,
412 uint64_t mask,
413 MemTxAttrs attrs)
414 {
415 uint64_t tmp = 0;
416 MemTxResult r;
417
418 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
419 trace_memory_region_ops_read(mr, addr, tmp, size);
420 *value |= (tmp & mask) << shift;
421 return r;
422 }
423
424 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = (*value >> shift) & mask;
435 trace_memory_region_ops_write(mr, addr, tmp, size);
436 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
437 return MEMTX_OK;
438 }
439
440 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
441 hwaddr addr,
442 uint64_t *value,
443 unsigned size,
444 unsigned shift,
445 uint64_t mask,
446 MemTxAttrs attrs)
447 {
448 uint64_t tmp;
449
450 tmp = (*value >> shift) & mask;
451 trace_memory_region_ops_write(mr, addr, tmp, size);
452 mr->ops->write(mr->opaque, addr, tmp, size);
453 return MEMTX_OK;
454 }
455
456 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
457 hwaddr addr,
458 uint64_t *value,
459 unsigned size,
460 unsigned shift,
461 uint64_t mask,
462 MemTxAttrs attrs)
463 {
464 uint64_t tmp;
465
466 tmp = (*value >> shift) & mask;
467 trace_memory_region_ops_write(mr, addr, tmp, size);
468 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
469 }
470
471 static MemTxResult access_with_adjusted_size(hwaddr addr,
472 uint64_t *value,
473 unsigned size,
474 unsigned access_size_min,
475 unsigned access_size_max,
476 MemTxResult (*access)(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs),
483 MemoryRegion *mr,
484 MemTxAttrs attrs)
485 {
486 uint64_t access_mask;
487 unsigned access_size;
488 unsigned i;
489 MemTxResult r = MEMTX_OK;
490
491 if (!access_size_min) {
492 access_size_min = 1;
493 }
494 if (!access_size_max) {
495 access_size_max = 4;
496 }
497
498 /* FIXME: support unaligned access? */
499 access_size = MAX(MIN(size, access_size_max), access_size_min);
500 access_mask = -1ULL >> (64 - access_size * 8);
501 if (memory_region_big_endian(mr)) {
502 for (i = 0; i < size; i += access_size) {
503 r |= access(mr, addr + i, value, access_size,
504 (size - access_size - i) * 8, access_mask, attrs);
505 }
506 } else {
507 for (i = 0; i < size; i += access_size) {
508 r |= access(mr, addr + i, value, access_size, i * 8,
509 access_mask, attrs);
510 }
511 }
512 return r;
513 }
514
515 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
516 {
517 AddressSpace *as;
518
519 while (mr->container) {
520 mr = mr->container;
521 }
522 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
523 if (mr == as->root) {
524 return as;
525 }
526 }
527 return NULL;
528 }
529
530 /* Render a memory region into the global view. Ranges in @view obscure
531 * ranges in @mr.
532 */
533 static void render_memory_region(FlatView *view,
534 MemoryRegion *mr,
535 Int128 base,
536 AddrRange clip,
537 bool readonly)
538 {
539 MemoryRegion *subregion;
540 unsigned i;
541 hwaddr offset_in_region;
542 Int128 remain;
543 Int128 now;
544 FlatRange fr;
545 AddrRange tmp;
546
547 if (!mr->enabled) {
548 return;
549 }
550
551 int128_addto(&base, int128_make64(mr->addr));
552 readonly |= mr->readonly;
553
554 tmp = addrrange_make(base, mr->size);
555
556 if (!addrrange_intersects(tmp, clip)) {
557 return;
558 }
559
560 clip = addrrange_intersection(tmp, clip);
561
562 if (mr->alias) {
563 int128_subfrom(&base, int128_make64(mr->alias->addr));
564 int128_subfrom(&base, int128_make64(mr->alias_offset));
565 render_memory_region(view, mr->alias, base, clip, readonly);
566 return;
567 }
568
569 /* Render subregions in priority order. */
570 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
571 render_memory_region(view, subregion, base, clip, readonly);
572 }
573
574 if (!mr->terminates) {
575 return;
576 }
577
578 offset_in_region = int128_get64(int128_sub(clip.start, base));
579 base = clip.start;
580 remain = clip.size;
581
582 fr.mr = mr;
583 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
584 fr.romd_mode = mr->romd_mode;
585 fr.readonly = readonly;
586
587 /* Render the region itself into any gaps left by the current view. */
588 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
589 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
590 continue;
591 }
592 if (int128_lt(base, view->ranges[i].addr.start)) {
593 now = int128_min(remain,
594 int128_sub(view->ranges[i].addr.start, base));
595 fr.offset_in_region = offset_in_region;
596 fr.addr = addrrange_make(base, now);
597 flatview_insert(view, i, &fr);
598 ++i;
599 int128_addto(&base, now);
600 offset_in_region += int128_get64(now);
601 int128_subfrom(&remain, now);
602 }
603 now = int128_sub(int128_min(int128_add(base, remain),
604 addrrange_end(view->ranges[i].addr)),
605 base);
606 int128_addto(&base, now);
607 offset_in_region += int128_get64(now);
608 int128_subfrom(&remain, now);
609 }
610 if (int128_nz(remain)) {
611 fr.offset_in_region = offset_in_region;
612 fr.addr = addrrange_make(base, remain);
613 flatview_insert(view, i, &fr);
614 }
615 }
616
617 /* Render a memory topology into a list of disjoint absolute ranges. */
618 static FlatView *generate_memory_topology(MemoryRegion *mr)
619 {
620 FlatView *view;
621
622 view = g_new(FlatView, 1);
623 flatview_init(view);
624
625 if (mr) {
626 render_memory_region(view, mr, int128_zero(),
627 addrrange_make(int128_zero(), int128_2_64()), false);
628 }
629 flatview_simplify(view);
630
631 return view;
632 }
633
634 static void address_space_add_del_ioeventfds(AddressSpace *as,
635 MemoryRegionIoeventfd *fds_new,
636 unsigned fds_new_nb,
637 MemoryRegionIoeventfd *fds_old,
638 unsigned fds_old_nb)
639 {
640 unsigned iold, inew;
641 MemoryRegionIoeventfd *fd;
642 MemoryRegionSection section;
643
644 /* Generate a symmetric difference of the old and new fd sets, adding
645 * and deleting as necessary.
646 */
647
648 iold = inew = 0;
649 while (iold < fds_old_nb || inew < fds_new_nb) {
650 if (iold < fds_old_nb
651 && (inew == fds_new_nb
652 || memory_region_ioeventfd_before(fds_old[iold],
653 fds_new[inew]))) {
654 fd = &fds_old[iold];
655 section = (MemoryRegionSection) {
656 .address_space = as,
657 .offset_within_address_space = int128_get64(fd->addr.start),
658 .size = fd->addr.size,
659 };
660 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
661 fd->match_data, fd->data, fd->e);
662 ++iold;
663 } else if (inew < fds_new_nb
664 && (iold == fds_old_nb
665 || memory_region_ioeventfd_before(fds_new[inew],
666 fds_old[iold]))) {
667 fd = &fds_new[inew];
668 section = (MemoryRegionSection) {
669 .address_space = as,
670 .offset_within_address_space = int128_get64(fd->addr.start),
671 .size = fd->addr.size,
672 };
673 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
674 fd->match_data, fd->data, fd->e);
675 ++inew;
676 } else {
677 ++iold;
678 ++inew;
679 }
680 }
681 }
682
683 static FlatView *address_space_get_flatview(AddressSpace *as)
684 {
685 FlatView *view;
686
687 rcu_read_lock();
688 view = atomic_rcu_read(&as->current_map);
689 flatview_ref(view);
690 rcu_read_unlock();
691 return view;
692 }
693
694 static void address_space_update_ioeventfds(AddressSpace *as)
695 {
696 FlatView *view;
697 FlatRange *fr;
698 unsigned ioeventfd_nb = 0;
699 MemoryRegionIoeventfd *ioeventfds = NULL;
700 AddrRange tmp;
701 unsigned i;
702
703 view = address_space_get_flatview(as);
704 FOR_EACH_FLAT_RANGE(fr, view) {
705 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
706 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
707 int128_sub(fr->addr.start,
708 int128_make64(fr->offset_in_region)));
709 if (addrrange_intersects(fr->addr, tmp)) {
710 ++ioeventfd_nb;
711 ioeventfds = g_realloc(ioeventfds,
712 ioeventfd_nb * sizeof(*ioeventfds));
713 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
714 ioeventfds[ioeventfd_nb-1].addr = tmp;
715 }
716 }
717 }
718
719 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
720 as->ioeventfds, as->ioeventfd_nb);
721
722 g_free(as->ioeventfds);
723 as->ioeventfds = ioeventfds;
724 as->ioeventfd_nb = ioeventfd_nb;
725 flatview_unref(view);
726 }
727
728 static void address_space_update_topology_pass(AddressSpace *as,
729 const FlatView *old_view,
730 const FlatView *new_view,
731 bool adding)
732 {
733 unsigned iold, inew;
734 FlatRange *frold, *frnew;
735
736 /* Generate a symmetric difference of the old and new memory maps.
737 * Kill ranges in the old map, and instantiate ranges in the new map.
738 */
739 iold = inew = 0;
740 while (iold < old_view->nr || inew < new_view->nr) {
741 if (iold < old_view->nr) {
742 frold = &old_view->ranges[iold];
743 } else {
744 frold = NULL;
745 }
746 if (inew < new_view->nr) {
747 frnew = &new_view->ranges[inew];
748 } else {
749 frnew = NULL;
750 }
751
752 if (frold
753 && (!frnew
754 || int128_lt(frold->addr.start, frnew->addr.start)
755 || (int128_eq(frold->addr.start, frnew->addr.start)
756 && !flatrange_equal(frold, frnew)))) {
757 /* In old but not in new, or in both but attributes changed. */
758
759 if (!adding) {
760 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
761 }
762
763 ++iold;
764 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
765 /* In both and unchanged (except logging may have changed) */
766
767 if (adding) {
768 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
769 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
770 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
771 frold->dirty_log_mask,
772 frnew->dirty_log_mask);
773 }
774 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
775 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
776 frold->dirty_log_mask,
777 frnew->dirty_log_mask);
778 }
779 }
780
781 ++iold;
782 ++inew;
783 } else {
784 /* In new */
785
786 if (adding) {
787 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
788 }
789
790 ++inew;
791 }
792 }
793 }
794
795
796 static void address_space_update_topology(AddressSpace *as)
797 {
798 FlatView *old_view = address_space_get_flatview(as);
799 FlatView *new_view = generate_memory_topology(as->root);
800
801 address_space_update_topology_pass(as, old_view, new_view, false);
802 address_space_update_topology_pass(as, old_view, new_view, true);
803
804 /* Writes are protected by the BQL. */
805 atomic_rcu_set(&as->current_map, new_view);
806 call_rcu(old_view, flatview_unref, rcu);
807
808 /* Note that all the old MemoryRegions are still alive up to this
809 * point. This relieves most MemoryListeners from the need to
810 * ref/unref the MemoryRegions they get---unless they use them
811 * outside the iothread mutex, in which case precise reference
812 * counting is necessary.
813 */
814 flatview_unref(old_view);
815
816 address_space_update_ioeventfds(as);
817 }
818
819 void memory_region_transaction_begin(void)
820 {
821 qemu_flush_coalesced_mmio_buffer();
822 ++memory_region_transaction_depth;
823 }
824
825 static void memory_region_clear_pending(void)
826 {
827 memory_region_update_pending = false;
828 ioeventfd_update_pending = false;
829 }
830
831 void memory_region_transaction_commit(void)
832 {
833 AddressSpace *as;
834
835 assert(memory_region_transaction_depth);
836 --memory_region_transaction_depth;
837 if (!memory_region_transaction_depth) {
838 if (memory_region_update_pending) {
839 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
840
841 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
842 address_space_update_topology(as);
843 }
844
845 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
846 } else if (ioeventfd_update_pending) {
847 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
848 address_space_update_ioeventfds(as);
849 }
850 }
851 memory_region_clear_pending();
852 }
853 }
854
855 static void memory_region_destructor_none(MemoryRegion *mr)
856 {
857 }
858
859 static void memory_region_destructor_ram(MemoryRegion *mr)
860 {
861 qemu_ram_free(mr->ram_addr);
862 }
863
864 static void memory_region_destructor_rom_device(MemoryRegion *mr)
865 {
866 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
867 }
868
869 static bool memory_region_need_escape(char c)
870 {
871 return c == '/' || c == '[' || c == '\\' || c == ']';
872 }
873
874 static char *memory_region_escape_name(const char *name)
875 {
876 const char *p;
877 char *escaped, *q;
878 uint8_t c;
879 size_t bytes = 0;
880
881 for (p = name; *p; p++) {
882 bytes += memory_region_need_escape(*p) ? 4 : 1;
883 }
884 if (bytes == p - name) {
885 return g_memdup(name, bytes + 1);
886 }
887
888 escaped = g_malloc(bytes + 1);
889 for (p = name, q = escaped; *p; p++) {
890 c = *p;
891 if (unlikely(memory_region_need_escape(c))) {
892 *q++ = '\\';
893 *q++ = 'x';
894 *q++ = "0123456789abcdef"[c >> 4];
895 c = "0123456789abcdef"[c & 15];
896 }
897 *q++ = c;
898 }
899 *q = 0;
900 return escaped;
901 }
902
903 void memory_region_init(MemoryRegion *mr,
904 Object *owner,
905 const char *name,
906 uint64_t size)
907 {
908 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
909 mr->size = int128_make64(size);
910 if (size == UINT64_MAX) {
911 mr->size = int128_2_64();
912 }
913 mr->name = g_strdup(name);
914 mr->owner = owner;
915
916 if (name) {
917 char *escaped_name = memory_region_escape_name(name);
918 char *name_array = g_strdup_printf("%s[*]", escaped_name);
919
920 if (!owner) {
921 owner = container_get(qdev_get_machine(), "/unattached");
922 }
923
924 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
925 object_unref(OBJECT(mr));
926 g_free(name_array);
927 g_free(escaped_name);
928 }
929 }
930
931 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
932 const char *name, Error **errp)
933 {
934 MemoryRegion *mr = MEMORY_REGION(obj);
935 uint64_t value = mr->addr;
936
937 visit_type_uint64(v, &value, name, errp);
938 }
939
940 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
941 const char *name, Error **errp)
942 {
943 MemoryRegion *mr = MEMORY_REGION(obj);
944 gchar *path = (gchar *)"";
945
946 if (mr->container) {
947 path = object_get_canonical_path(OBJECT(mr->container));
948 }
949 visit_type_str(v, &path, name, errp);
950 if (mr->container) {
951 g_free(path);
952 }
953 }
954
955 static Object *memory_region_resolve_container(Object *obj, void *opaque,
956 const char *part)
957 {
958 MemoryRegion *mr = MEMORY_REGION(obj);
959
960 return OBJECT(mr->container);
961 }
962
963 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
964 const char *name, Error **errp)
965 {
966 MemoryRegion *mr = MEMORY_REGION(obj);
967 int32_t value = mr->priority;
968
969 visit_type_int32(v, &value, name, errp);
970 }
971
972 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
973 {
974 MemoryRegion *mr = MEMORY_REGION(obj);
975
976 return mr->may_overlap;
977 }
978
979 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
980 const char *name, Error **errp)
981 {
982 MemoryRegion *mr = MEMORY_REGION(obj);
983 uint64_t value = memory_region_size(mr);
984
985 visit_type_uint64(v, &value, name, errp);
986 }
987
988 static void memory_region_initfn(Object *obj)
989 {
990 MemoryRegion *mr = MEMORY_REGION(obj);
991 ObjectProperty *op;
992
993 mr->ops = &unassigned_mem_ops;
994 mr->ram_addr = RAM_ADDR_INVALID;
995 mr->enabled = true;
996 mr->romd_mode = true;
997 mr->global_locking = true;
998 mr->destructor = memory_region_destructor_none;
999 QTAILQ_INIT(&mr->subregions);
1000 QTAILQ_INIT(&mr->coalesced);
1001
1002 op = object_property_add(OBJECT(mr), "container",
1003 "link<" TYPE_MEMORY_REGION ">",
1004 memory_region_get_container,
1005 NULL, /* memory_region_set_container */
1006 NULL, NULL, &error_abort);
1007 op->resolve = memory_region_resolve_container;
1008
1009 object_property_add(OBJECT(mr), "addr", "uint64",
1010 memory_region_get_addr,
1011 NULL, /* memory_region_set_addr */
1012 NULL, NULL, &error_abort);
1013 object_property_add(OBJECT(mr), "priority", "uint32",
1014 memory_region_get_priority,
1015 NULL, /* memory_region_set_priority */
1016 NULL, NULL, &error_abort);
1017 object_property_add_bool(OBJECT(mr), "may-overlap",
1018 memory_region_get_may_overlap,
1019 NULL, /* memory_region_set_may_overlap */
1020 &error_abort);
1021 object_property_add(OBJECT(mr), "size", "uint64",
1022 memory_region_get_size,
1023 NULL, /* memory_region_set_size, */
1024 NULL, NULL, &error_abort);
1025 }
1026
1027 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1028 unsigned size)
1029 {
1030 #ifdef DEBUG_UNASSIGNED
1031 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1032 #endif
1033 if (current_cpu != NULL) {
1034 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1035 }
1036 return 0;
1037 }
1038
1039 static void unassigned_mem_write(void *opaque, hwaddr addr,
1040 uint64_t val, unsigned size)
1041 {
1042 #ifdef DEBUG_UNASSIGNED
1043 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1044 #endif
1045 if (current_cpu != NULL) {
1046 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1047 }
1048 }
1049
1050 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1051 unsigned size, bool is_write)
1052 {
1053 return false;
1054 }
1055
1056 const MemoryRegionOps unassigned_mem_ops = {
1057 .valid.accepts = unassigned_mem_accepts,
1058 .endianness = DEVICE_NATIVE_ENDIAN,
1059 };
1060
1061 bool memory_region_access_valid(MemoryRegion *mr,
1062 hwaddr addr,
1063 unsigned size,
1064 bool is_write)
1065 {
1066 int access_size_min, access_size_max;
1067 int access_size, i;
1068
1069 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1070 return false;
1071 }
1072
1073 if (!mr->ops->valid.accepts) {
1074 return true;
1075 }
1076
1077 access_size_min = mr->ops->valid.min_access_size;
1078 if (!mr->ops->valid.min_access_size) {
1079 access_size_min = 1;
1080 }
1081
1082 access_size_max = mr->ops->valid.max_access_size;
1083 if (!mr->ops->valid.max_access_size) {
1084 access_size_max = 4;
1085 }
1086
1087 access_size = MAX(MIN(size, access_size_max), access_size_min);
1088 for (i = 0; i < size; i += access_size) {
1089 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1090 is_write)) {
1091 return false;
1092 }
1093 }
1094
1095 return true;
1096 }
1097
1098 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1099 hwaddr addr,
1100 uint64_t *pval,
1101 unsigned size,
1102 MemTxAttrs attrs)
1103 {
1104 *pval = 0;
1105
1106 if (mr->ops->read) {
1107 return access_with_adjusted_size(addr, pval, size,
1108 mr->ops->impl.min_access_size,
1109 mr->ops->impl.max_access_size,
1110 memory_region_read_accessor,
1111 mr, attrs);
1112 } else if (mr->ops->read_with_attrs) {
1113 return access_with_adjusted_size(addr, pval, size,
1114 mr->ops->impl.min_access_size,
1115 mr->ops->impl.max_access_size,
1116 memory_region_read_with_attrs_accessor,
1117 mr, attrs);
1118 } else {
1119 return access_with_adjusted_size(addr, pval, size, 1, 4,
1120 memory_region_oldmmio_read_accessor,
1121 mr, attrs);
1122 }
1123 }
1124
1125 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1126 hwaddr addr,
1127 uint64_t *pval,
1128 unsigned size,
1129 MemTxAttrs attrs)
1130 {
1131 MemTxResult r;
1132
1133 if (!memory_region_access_valid(mr, addr, size, false)) {
1134 *pval = unassigned_mem_read(mr, addr, size);
1135 return MEMTX_DECODE_ERROR;
1136 }
1137
1138 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1139 adjust_endianness(mr, pval, size);
1140 return r;
1141 }
1142
1143 /* Return true if an eventfd was signalled */
1144 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1145 hwaddr addr,
1146 uint64_t data,
1147 unsigned size,
1148 MemTxAttrs attrs)
1149 {
1150 MemoryRegionIoeventfd ioeventfd = {
1151 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1152 .data = data,
1153 };
1154 unsigned i;
1155
1156 for (i = 0; i < mr->ioeventfd_nb; i++) {
1157 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1158 ioeventfd.e = mr->ioeventfds[i].e;
1159
1160 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1161 event_notifier_set(ioeventfd.e);
1162 return true;
1163 }
1164 }
1165
1166 return false;
1167 }
1168
1169 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1170 hwaddr addr,
1171 uint64_t data,
1172 unsigned size,
1173 MemTxAttrs attrs)
1174 {
1175 if (!memory_region_access_valid(mr, addr, size, true)) {
1176 unassigned_mem_write(mr, addr, data, size);
1177 return MEMTX_DECODE_ERROR;
1178 }
1179
1180 adjust_endianness(mr, &data, size);
1181
1182 if ((!kvm_eventfds_enabled()) &&
1183 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1184 return MEMTX_OK;
1185 }
1186
1187 if (mr->ops->write) {
1188 return access_with_adjusted_size(addr, &data, size,
1189 mr->ops->impl.min_access_size,
1190 mr->ops->impl.max_access_size,
1191 memory_region_write_accessor, mr,
1192 attrs);
1193 } else if (mr->ops->write_with_attrs) {
1194 return
1195 access_with_adjusted_size(addr, &data, size,
1196 mr->ops->impl.min_access_size,
1197 mr->ops->impl.max_access_size,
1198 memory_region_write_with_attrs_accessor,
1199 mr, attrs);
1200 } else {
1201 return access_with_adjusted_size(addr, &data, size, 1, 4,
1202 memory_region_oldmmio_write_accessor,
1203 mr, attrs);
1204 }
1205 }
1206
1207 void memory_region_init_io(MemoryRegion *mr,
1208 Object *owner,
1209 const MemoryRegionOps *ops,
1210 void *opaque,
1211 const char *name,
1212 uint64_t size)
1213 {
1214 memory_region_init(mr, owner, name, size);
1215 mr->ops = ops ? ops : &unassigned_mem_ops;
1216 mr->opaque = opaque;
1217 mr->terminates = true;
1218 }
1219
1220 void memory_region_init_ram(MemoryRegion *mr,
1221 Object *owner,
1222 const char *name,
1223 uint64_t size,
1224 Error **errp)
1225 {
1226 memory_region_init(mr, owner, name, size);
1227 mr->ram = true;
1228 mr->terminates = true;
1229 mr->destructor = memory_region_destructor_ram;
1230 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1231 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1232 }
1233
1234 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1235 Object *owner,
1236 const char *name,
1237 uint64_t size,
1238 uint64_t max_size,
1239 void (*resized)(const char*,
1240 uint64_t length,
1241 void *host),
1242 Error **errp)
1243 {
1244 memory_region_init(mr, owner, name, size);
1245 mr->ram = true;
1246 mr->terminates = true;
1247 mr->destructor = memory_region_destructor_ram;
1248 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1249 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1250 }
1251
1252 #ifdef __linux__
1253 void memory_region_init_ram_from_file(MemoryRegion *mr,
1254 struct Object *owner,
1255 const char *name,
1256 uint64_t size,
1257 bool share,
1258 const char *path,
1259 Error **errp)
1260 {
1261 memory_region_init(mr, owner, name, size);
1262 mr->ram = true;
1263 mr->terminates = true;
1264 mr->destructor = memory_region_destructor_ram;
1265 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1266 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1267 }
1268 #endif
1269
1270 void memory_region_init_ram_ptr(MemoryRegion *mr,
1271 Object *owner,
1272 const char *name,
1273 uint64_t size,
1274 void *ptr)
1275 {
1276 memory_region_init(mr, owner, name, size);
1277 mr->ram = true;
1278 mr->terminates = true;
1279 mr->destructor = memory_region_destructor_ram;
1280 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1281
1282 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1283 assert(ptr != NULL);
1284 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1285 }
1286
1287 void memory_region_set_skip_dump(MemoryRegion *mr)
1288 {
1289 mr->skip_dump = true;
1290 }
1291
1292 void memory_region_init_alias(MemoryRegion *mr,
1293 Object *owner,
1294 const char *name,
1295 MemoryRegion *orig,
1296 hwaddr offset,
1297 uint64_t size)
1298 {
1299 memory_region_init(mr, owner, name, size);
1300 mr->alias = orig;
1301 mr->alias_offset = offset;
1302 }
1303
1304 void memory_region_init_rom_device(MemoryRegion *mr,
1305 Object *owner,
1306 const MemoryRegionOps *ops,
1307 void *opaque,
1308 const char *name,
1309 uint64_t size,
1310 Error **errp)
1311 {
1312 memory_region_init(mr, owner, name, size);
1313 mr->ops = ops;
1314 mr->opaque = opaque;
1315 mr->terminates = true;
1316 mr->rom_device = true;
1317 mr->destructor = memory_region_destructor_rom_device;
1318 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1319 }
1320
1321 void memory_region_init_iommu(MemoryRegion *mr,
1322 Object *owner,
1323 const MemoryRegionIOMMUOps *ops,
1324 const char *name,
1325 uint64_t size)
1326 {
1327 memory_region_init(mr, owner, name, size);
1328 mr->iommu_ops = ops,
1329 mr->terminates = true; /* then re-forwards */
1330 notifier_list_init(&mr->iommu_notify);
1331 }
1332
1333 static void memory_region_finalize(Object *obj)
1334 {
1335 MemoryRegion *mr = MEMORY_REGION(obj);
1336
1337 assert(!mr->container);
1338
1339 /* We know the region is not visible in any address space (it
1340 * does not have a container and cannot be a root either because
1341 * it has no references, so we can blindly clear mr->enabled.
1342 * memory_region_set_enabled instead could trigger a transaction
1343 * and cause an infinite loop.
1344 */
1345 mr->enabled = false;
1346 memory_region_transaction_begin();
1347 while (!QTAILQ_EMPTY(&mr->subregions)) {
1348 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1349 memory_region_del_subregion(mr, subregion);
1350 }
1351 memory_region_transaction_commit();
1352
1353 mr->destructor(mr);
1354 memory_region_clear_coalescing(mr);
1355 g_free((char *)mr->name);
1356 g_free(mr->ioeventfds);
1357 }
1358
1359 Object *memory_region_owner(MemoryRegion *mr)
1360 {
1361 Object *obj = OBJECT(mr);
1362 return obj->parent;
1363 }
1364
1365 void memory_region_ref(MemoryRegion *mr)
1366 {
1367 /* MMIO callbacks most likely will access data that belongs
1368 * to the owner, hence the need to ref/unref the owner whenever
1369 * the memory region is in use.
1370 *
1371 * The memory region is a child of its owner. As long as the
1372 * owner doesn't call unparent itself on the memory region,
1373 * ref-ing the owner will also keep the memory region alive.
1374 * Memory regions without an owner are supposed to never go away;
1375 * we do not ref/unref them because it slows down DMA sensibly.
1376 */
1377 if (mr && mr->owner) {
1378 object_ref(mr->owner);
1379 }
1380 }
1381
1382 void memory_region_unref(MemoryRegion *mr)
1383 {
1384 if (mr && mr->owner) {
1385 object_unref(mr->owner);
1386 }
1387 }
1388
1389 uint64_t memory_region_size(MemoryRegion *mr)
1390 {
1391 if (int128_eq(mr->size, int128_2_64())) {
1392 return UINT64_MAX;
1393 }
1394 return int128_get64(mr->size);
1395 }
1396
1397 const char *memory_region_name(const MemoryRegion *mr)
1398 {
1399 if (!mr->name) {
1400 ((MemoryRegion *)mr)->name =
1401 object_get_canonical_path_component(OBJECT(mr));
1402 }
1403 return mr->name;
1404 }
1405
1406 bool memory_region_is_skip_dump(MemoryRegion *mr)
1407 {
1408 return mr->skip_dump;
1409 }
1410
1411 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1412 {
1413 uint8_t mask = mr->dirty_log_mask;
1414 if (global_dirty_log) {
1415 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1416 }
1417 return mask;
1418 }
1419
1420 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1421 {
1422 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1423 }
1424
1425 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1426 {
1427 notifier_list_add(&mr->iommu_notify, n);
1428 }
1429
1430 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1431 hwaddr granularity, bool is_write)
1432 {
1433 hwaddr addr;
1434 IOMMUTLBEntry iotlb;
1435
1436 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1437 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1438 if (iotlb.perm != IOMMU_NONE) {
1439 n->notify(n, &iotlb);
1440 }
1441
1442 /* if (2^64 - MR size) < granularity, it's possible to get an
1443 * infinite loop here. This should catch such a wraparound */
1444 if ((addr + granularity) < addr) {
1445 break;
1446 }
1447 }
1448 }
1449
1450 void memory_region_unregister_iommu_notifier(Notifier *n)
1451 {
1452 notifier_remove(n);
1453 }
1454
1455 void memory_region_notify_iommu(MemoryRegion *mr,
1456 IOMMUTLBEntry entry)
1457 {
1458 assert(memory_region_is_iommu(mr));
1459 notifier_list_notify(&mr->iommu_notify, &entry);
1460 }
1461
1462 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1463 {
1464 uint8_t mask = 1 << client;
1465 uint8_t old_logging;
1466
1467 assert(client == DIRTY_MEMORY_VGA);
1468 old_logging = mr->vga_logging_count;
1469 mr->vga_logging_count += log ? 1 : -1;
1470 if (!!old_logging == !!mr->vga_logging_count) {
1471 return;
1472 }
1473
1474 memory_region_transaction_begin();
1475 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1476 memory_region_update_pending |= mr->enabled;
1477 memory_region_transaction_commit();
1478 }
1479
1480 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1481 hwaddr size, unsigned client)
1482 {
1483 assert(mr->ram_addr != RAM_ADDR_INVALID);
1484 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1485 }
1486
1487 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1488 hwaddr size)
1489 {
1490 assert(mr->ram_addr != RAM_ADDR_INVALID);
1491 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1492 memory_region_get_dirty_log_mask(mr));
1493 }
1494
1495 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1496 hwaddr size, unsigned client)
1497 {
1498 assert(mr->ram_addr != RAM_ADDR_INVALID);
1499 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1500 size, client);
1501 }
1502
1503
1504 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1505 {
1506 AddressSpace *as;
1507 FlatRange *fr;
1508
1509 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1510 FlatView *view = address_space_get_flatview(as);
1511 FOR_EACH_FLAT_RANGE(fr, view) {
1512 if (fr->mr == mr) {
1513 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1514 }
1515 }
1516 flatview_unref(view);
1517 }
1518 }
1519
1520 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1521 {
1522 if (mr->readonly != readonly) {
1523 memory_region_transaction_begin();
1524 mr->readonly = readonly;
1525 memory_region_update_pending |= mr->enabled;
1526 memory_region_transaction_commit();
1527 }
1528 }
1529
1530 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1531 {
1532 if (mr->romd_mode != romd_mode) {
1533 memory_region_transaction_begin();
1534 mr->romd_mode = romd_mode;
1535 memory_region_update_pending |= mr->enabled;
1536 memory_region_transaction_commit();
1537 }
1538 }
1539
1540 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1541 hwaddr size, unsigned client)
1542 {
1543 assert(mr->ram_addr != RAM_ADDR_INVALID);
1544 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1545 client);
1546 }
1547
1548 int memory_region_get_fd(MemoryRegion *mr)
1549 {
1550 if (mr->alias) {
1551 return memory_region_get_fd(mr->alias);
1552 }
1553
1554 assert(mr->ram_addr != RAM_ADDR_INVALID);
1555
1556 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1557 }
1558
1559 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1560 {
1561 void *ptr;
1562 uint64_t offset = 0;
1563
1564 rcu_read_lock();
1565 while (mr->alias) {
1566 offset += mr->alias_offset;
1567 mr = mr->alias;
1568 }
1569 assert(mr->ram_addr != RAM_ADDR_INVALID);
1570 ptr = qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1571 rcu_read_unlock();
1572
1573 return ptr + offset;
1574 }
1575
1576 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1577 {
1578 assert(mr->ram_addr != RAM_ADDR_INVALID);
1579
1580 qemu_ram_resize(mr->ram_addr, newsize, errp);
1581 }
1582
1583 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1584 {
1585 FlatView *view;
1586 FlatRange *fr;
1587 CoalescedMemoryRange *cmr;
1588 AddrRange tmp;
1589 MemoryRegionSection section;
1590
1591 view = address_space_get_flatview(as);
1592 FOR_EACH_FLAT_RANGE(fr, view) {
1593 if (fr->mr == mr) {
1594 section = (MemoryRegionSection) {
1595 .address_space = as,
1596 .offset_within_address_space = int128_get64(fr->addr.start),
1597 .size = fr->addr.size,
1598 };
1599
1600 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1601 int128_get64(fr->addr.start),
1602 int128_get64(fr->addr.size));
1603 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1604 tmp = addrrange_shift(cmr->addr,
1605 int128_sub(fr->addr.start,
1606 int128_make64(fr->offset_in_region)));
1607 if (!addrrange_intersects(tmp, fr->addr)) {
1608 continue;
1609 }
1610 tmp = addrrange_intersection(tmp, fr->addr);
1611 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1612 int128_get64(tmp.start),
1613 int128_get64(tmp.size));
1614 }
1615 }
1616 }
1617 flatview_unref(view);
1618 }
1619
1620 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1621 {
1622 AddressSpace *as;
1623
1624 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1625 memory_region_update_coalesced_range_as(mr, as);
1626 }
1627 }
1628
1629 void memory_region_set_coalescing(MemoryRegion *mr)
1630 {
1631 memory_region_clear_coalescing(mr);
1632 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1633 }
1634
1635 void memory_region_add_coalescing(MemoryRegion *mr,
1636 hwaddr offset,
1637 uint64_t size)
1638 {
1639 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1640
1641 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1642 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1643 memory_region_update_coalesced_range(mr);
1644 memory_region_set_flush_coalesced(mr);
1645 }
1646
1647 void memory_region_clear_coalescing(MemoryRegion *mr)
1648 {
1649 CoalescedMemoryRange *cmr;
1650 bool updated = false;
1651
1652 qemu_flush_coalesced_mmio_buffer();
1653 mr->flush_coalesced_mmio = false;
1654
1655 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1656 cmr = QTAILQ_FIRST(&mr->coalesced);
1657 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1658 g_free(cmr);
1659 updated = true;
1660 }
1661
1662 if (updated) {
1663 memory_region_update_coalesced_range(mr);
1664 }
1665 }
1666
1667 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1668 {
1669 mr->flush_coalesced_mmio = true;
1670 }
1671
1672 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1673 {
1674 qemu_flush_coalesced_mmio_buffer();
1675 if (QTAILQ_EMPTY(&mr->coalesced)) {
1676 mr->flush_coalesced_mmio = false;
1677 }
1678 }
1679
1680 void memory_region_set_global_locking(MemoryRegion *mr)
1681 {
1682 mr->global_locking = true;
1683 }
1684
1685 void memory_region_clear_global_locking(MemoryRegion *mr)
1686 {
1687 mr->global_locking = false;
1688 }
1689
1690 static bool userspace_eventfd_warning;
1691
1692 void memory_region_add_eventfd(MemoryRegion *mr,
1693 hwaddr addr,
1694 unsigned size,
1695 bool match_data,
1696 uint64_t data,
1697 EventNotifier *e)
1698 {
1699 MemoryRegionIoeventfd mrfd = {
1700 .addr.start = int128_make64(addr),
1701 .addr.size = int128_make64(size),
1702 .match_data = match_data,
1703 .data = data,
1704 .e = e,
1705 };
1706 unsigned i;
1707
1708 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1709 userspace_eventfd_warning))) {
1710 userspace_eventfd_warning = true;
1711 error_report("Using eventfd without MMIO binding in KVM. "
1712 "Suboptimal performance expected");
1713 }
1714
1715 if (size) {
1716 adjust_endianness(mr, &mrfd.data, size);
1717 }
1718 memory_region_transaction_begin();
1719 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1720 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1721 break;
1722 }
1723 }
1724 ++mr->ioeventfd_nb;
1725 mr->ioeventfds = g_realloc(mr->ioeventfds,
1726 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1727 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1728 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1729 mr->ioeventfds[i] = mrfd;
1730 ioeventfd_update_pending |= mr->enabled;
1731 memory_region_transaction_commit();
1732 }
1733
1734 void memory_region_del_eventfd(MemoryRegion *mr,
1735 hwaddr addr,
1736 unsigned size,
1737 bool match_data,
1738 uint64_t data,
1739 EventNotifier *e)
1740 {
1741 MemoryRegionIoeventfd mrfd = {
1742 .addr.start = int128_make64(addr),
1743 .addr.size = int128_make64(size),
1744 .match_data = match_data,
1745 .data = data,
1746 .e = e,
1747 };
1748 unsigned i;
1749
1750 if (size) {
1751 adjust_endianness(mr, &mrfd.data, size);
1752 }
1753 memory_region_transaction_begin();
1754 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1755 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1756 break;
1757 }
1758 }
1759 assert(i != mr->ioeventfd_nb);
1760 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1761 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1762 --mr->ioeventfd_nb;
1763 mr->ioeventfds = g_realloc(mr->ioeventfds,
1764 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1765 ioeventfd_update_pending |= mr->enabled;
1766 memory_region_transaction_commit();
1767 }
1768
1769 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1770 {
1771 hwaddr offset = subregion->addr;
1772 MemoryRegion *mr = subregion->container;
1773 MemoryRegion *other;
1774
1775 memory_region_transaction_begin();
1776
1777 memory_region_ref(subregion);
1778 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1779 if (subregion->may_overlap || other->may_overlap) {
1780 continue;
1781 }
1782 if (int128_ge(int128_make64(offset),
1783 int128_add(int128_make64(other->addr), other->size))
1784 || int128_le(int128_add(int128_make64(offset), subregion->size),
1785 int128_make64(other->addr))) {
1786 continue;
1787 }
1788 #if 0
1789 printf("warning: subregion collision %llx/%llx (%s) "
1790 "vs %llx/%llx (%s)\n",
1791 (unsigned long long)offset,
1792 (unsigned long long)int128_get64(subregion->size),
1793 subregion->name,
1794 (unsigned long long)other->addr,
1795 (unsigned long long)int128_get64(other->size),
1796 other->name);
1797 #endif
1798 }
1799 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1800 if (subregion->priority >= other->priority) {
1801 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1802 goto done;
1803 }
1804 }
1805 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1806 done:
1807 memory_region_update_pending |= mr->enabled && subregion->enabled;
1808 memory_region_transaction_commit();
1809 }
1810
1811 static void memory_region_add_subregion_common(MemoryRegion *mr,
1812 hwaddr offset,
1813 MemoryRegion *subregion)
1814 {
1815 assert(!subregion->container);
1816 subregion->container = mr;
1817 subregion->addr = offset;
1818 memory_region_update_container_subregions(subregion);
1819 }
1820
1821 void memory_region_add_subregion(MemoryRegion *mr,
1822 hwaddr offset,
1823 MemoryRegion *subregion)
1824 {
1825 subregion->may_overlap = false;
1826 subregion->priority = 0;
1827 memory_region_add_subregion_common(mr, offset, subregion);
1828 }
1829
1830 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1831 hwaddr offset,
1832 MemoryRegion *subregion,
1833 int priority)
1834 {
1835 subregion->may_overlap = true;
1836 subregion->priority = priority;
1837 memory_region_add_subregion_common(mr, offset, subregion);
1838 }
1839
1840 void memory_region_del_subregion(MemoryRegion *mr,
1841 MemoryRegion *subregion)
1842 {
1843 memory_region_transaction_begin();
1844 assert(subregion->container == mr);
1845 subregion->container = NULL;
1846 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1847 memory_region_unref(subregion);
1848 memory_region_update_pending |= mr->enabled && subregion->enabled;
1849 memory_region_transaction_commit();
1850 }
1851
1852 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1853 {
1854 if (enabled == mr->enabled) {
1855 return;
1856 }
1857 memory_region_transaction_begin();
1858 mr->enabled = enabled;
1859 memory_region_update_pending = true;
1860 memory_region_transaction_commit();
1861 }
1862
1863 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1864 {
1865 Int128 s = int128_make64(size);
1866
1867 if (size == UINT64_MAX) {
1868 s = int128_2_64();
1869 }
1870 if (int128_eq(s, mr->size)) {
1871 return;
1872 }
1873 memory_region_transaction_begin();
1874 mr->size = s;
1875 memory_region_update_pending = true;
1876 memory_region_transaction_commit();
1877 }
1878
1879 static void memory_region_readd_subregion(MemoryRegion *mr)
1880 {
1881 MemoryRegion *container = mr->container;
1882
1883 if (container) {
1884 memory_region_transaction_begin();
1885 memory_region_ref(mr);
1886 memory_region_del_subregion(container, mr);
1887 mr->container = container;
1888 memory_region_update_container_subregions(mr);
1889 memory_region_unref(mr);
1890 memory_region_transaction_commit();
1891 }
1892 }
1893
1894 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1895 {
1896 if (addr != mr->addr) {
1897 mr->addr = addr;
1898 memory_region_readd_subregion(mr);
1899 }
1900 }
1901
1902 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1903 {
1904 assert(mr->alias);
1905
1906 if (offset == mr->alias_offset) {
1907 return;
1908 }
1909
1910 memory_region_transaction_begin();
1911 mr->alias_offset = offset;
1912 memory_region_update_pending |= mr->enabled;
1913 memory_region_transaction_commit();
1914 }
1915
1916 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1917 {
1918 return mr->align;
1919 }
1920
1921 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1922 {
1923 const AddrRange *addr = addr_;
1924 const FlatRange *fr = fr_;
1925
1926 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1927 return -1;
1928 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1929 return 1;
1930 }
1931 return 0;
1932 }
1933
1934 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1935 {
1936 return bsearch(&addr, view->ranges, view->nr,
1937 sizeof(FlatRange), cmp_flatrange_addr);
1938 }
1939
1940 bool memory_region_is_mapped(MemoryRegion *mr)
1941 {
1942 return mr->container ? true : false;
1943 }
1944
1945 /* Same as memory_region_find, but it does not add a reference to the
1946 * returned region. It must be called from an RCU critical section.
1947 */
1948 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1949 hwaddr addr, uint64_t size)
1950 {
1951 MemoryRegionSection ret = { .mr = NULL };
1952 MemoryRegion *root;
1953 AddressSpace *as;
1954 AddrRange range;
1955 FlatView *view;
1956 FlatRange *fr;
1957
1958 addr += mr->addr;
1959 for (root = mr; root->container; ) {
1960 root = root->container;
1961 addr += root->addr;
1962 }
1963
1964 as = memory_region_to_address_space(root);
1965 if (!as) {
1966 return ret;
1967 }
1968 range = addrrange_make(int128_make64(addr), int128_make64(size));
1969
1970 view = atomic_rcu_read(&as->current_map);
1971 fr = flatview_lookup(view, range);
1972 if (!fr) {
1973 return ret;
1974 }
1975
1976 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1977 --fr;
1978 }
1979
1980 ret.mr = fr->mr;
1981 ret.address_space = as;
1982 range = addrrange_intersection(range, fr->addr);
1983 ret.offset_within_region = fr->offset_in_region;
1984 ret.offset_within_region += int128_get64(int128_sub(range.start,
1985 fr->addr.start));
1986 ret.size = range.size;
1987 ret.offset_within_address_space = int128_get64(range.start);
1988 ret.readonly = fr->readonly;
1989 return ret;
1990 }
1991
1992 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1993 hwaddr addr, uint64_t size)
1994 {
1995 MemoryRegionSection ret;
1996 rcu_read_lock();
1997 ret = memory_region_find_rcu(mr, addr, size);
1998 if (ret.mr) {
1999 memory_region_ref(ret.mr);
2000 }
2001 rcu_read_unlock();
2002 return ret;
2003 }
2004
2005 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2006 {
2007 MemoryRegion *mr;
2008
2009 rcu_read_lock();
2010 mr = memory_region_find_rcu(container, addr, 1).mr;
2011 rcu_read_unlock();
2012 return mr && mr != container;
2013 }
2014
2015 void address_space_sync_dirty_bitmap(AddressSpace *as)
2016 {
2017 FlatView *view;
2018 FlatRange *fr;
2019
2020 view = address_space_get_flatview(as);
2021 FOR_EACH_FLAT_RANGE(fr, view) {
2022 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2023 }
2024 flatview_unref(view);
2025 }
2026
2027 void memory_global_dirty_log_start(void)
2028 {
2029 global_dirty_log = true;
2030
2031 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2032
2033 /* Refresh DIRTY_LOG_MIGRATION bit. */
2034 memory_region_transaction_begin();
2035 memory_region_update_pending = true;
2036 memory_region_transaction_commit();
2037 }
2038
2039 void memory_global_dirty_log_stop(void)
2040 {
2041 global_dirty_log = false;
2042
2043 /* Refresh DIRTY_LOG_MIGRATION bit. */
2044 memory_region_transaction_begin();
2045 memory_region_update_pending = true;
2046 memory_region_transaction_commit();
2047
2048 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2049 }
2050
2051 static void listener_add_address_space(MemoryListener *listener,
2052 AddressSpace *as)
2053 {
2054 FlatView *view;
2055 FlatRange *fr;
2056
2057 if (listener->address_space_filter
2058 && listener->address_space_filter != as) {
2059 return;
2060 }
2061
2062 if (listener->begin) {
2063 listener->begin(listener);
2064 }
2065 if (global_dirty_log) {
2066 if (listener->log_global_start) {
2067 listener->log_global_start(listener);
2068 }
2069 }
2070
2071 view = address_space_get_flatview(as);
2072 FOR_EACH_FLAT_RANGE(fr, view) {
2073 MemoryRegionSection section = {
2074 .mr = fr->mr,
2075 .address_space = as,
2076 .offset_within_region = fr->offset_in_region,
2077 .size = fr->addr.size,
2078 .offset_within_address_space = int128_get64(fr->addr.start),
2079 .readonly = fr->readonly,
2080 };
2081 if (fr->dirty_log_mask && listener->log_start) {
2082 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2083 }
2084 if (listener->region_add) {
2085 listener->region_add(listener, &section);
2086 }
2087 }
2088 if (listener->commit) {
2089 listener->commit(listener);
2090 }
2091 flatview_unref(view);
2092 }
2093
2094 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2095 {
2096 MemoryListener *other = NULL;
2097 AddressSpace *as;
2098
2099 listener->address_space_filter = filter;
2100 if (QTAILQ_EMPTY(&memory_listeners)
2101 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2102 memory_listeners)->priority) {
2103 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2104 } else {
2105 QTAILQ_FOREACH(other, &memory_listeners, link) {
2106 if (listener->priority < other->priority) {
2107 break;
2108 }
2109 }
2110 QTAILQ_INSERT_BEFORE(other, listener, link);
2111 }
2112
2113 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2114 listener_add_address_space(listener, as);
2115 }
2116 }
2117
2118 void memory_listener_unregister(MemoryListener *listener)
2119 {
2120 QTAILQ_REMOVE(&memory_listeners, listener, link);
2121 }
2122
2123 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2124 {
2125 memory_region_ref(root);
2126 memory_region_transaction_begin();
2127 as->root = root;
2128 as->current_map = g_new(FlatView, 1);
2129 flatview_init(as->current_map);
2130 as->ioeventfd_nb = 0;
2131 as->ioeventfds = NULL;
2132 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2133 as->name = g_strdup(name ? name : "anonymous");
2134 address_space_init_dispatch(as);
2135 memory_region_update_pending |= root->enabled;
2136 memory_region_transaction_commit();
2137 }
2138
2139 static void do_address_space_destroy(AddressSpace *as)
2140 {
2141 MemoryListener *listener;
2142
2143 address_space_destroy_dispatch(as);
2144
2145 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2146 assert(listener->address_space_filter != as);
2147 }
2148
2149 flatview_unref(as->current_map);
2150 g_free(as->name);
2151 g_free(as->ioeventfds);
2152 memory_region_unref(as->root);
2153 }
2154
2155 void address_space_destroy(AddressSpace *as)
2156 {
2157 MemoryRegion *root = as->root;
2158
2159 /* Flush out anything from MemoryListeners listening in on this */
2160 memory_region_transaction_begin();
2161 as->root = NULL;
2162 memory_region_transaction_commit();
2163 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2164 address_space_unregister(as);
2165
2166 /* At this point, as->dispatch and as->current_map are dummy
2167 * entries that the guest should never use. Wait for the old
2168 * values to expire before freeing the data.
2169 */
2170 as->root = root;
2171 call_rcu(as, do_address_space_destroy, rcu);
2172 }
2173
2174 typedef struct MemoryRegionList MemoryRegionList;
2175
2176 struct MemoryRegionList {
2177 const MemoryRegion *mr;
2178 QTAILQ_ENTRY(MemoryRegionList) queue;
2179 };
2180
2181 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2182
2183 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2184 const MemoryRegion *mr, unsigned int level,
2185 hwaddr base,
2186 MemoryRegionListHead *alias_print_queue)
2187 {
2188 MemoryRegionList *new_ml, *ml, *next_ml;
2189 MemoryRegionListHead submr_print_queue;
2190 const MemoryRegion *submr;
2191 unsigned int i;
2192
2193 if (!mr) {
2194 return;
2195 }
2196
2197 for (i = 0; i < level; i++) {
2198 mon_printf(f, " ");
2199 }
2200
2201 if (mr->alias) {
2202 MemoryRegionList *ml;
2203 bool found = false;
2204
2205 /* check if the alias is already in the queue */
2206 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2207 if (ml->mr == mr->alias) {
2208 found = true;
2209 }
2210 }
2211
2212 if (!found) {
2213 ml = g_new(MemoryRegionList, 1);
2214 ml->mr = mr->alias;
2215 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2216 }
2217 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2218 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2219 "-" TARGET_FMT_plx "%s\n",
2220 base + mr->addr,
2221 base + mr->addr
2222 + (int128_nz(mr->size) ?
2223 (hwaddr)int128_get64(int128_sub(mr->size,
2224 int128_one())) : 0),
2225 mr->priority,
2226 mr->romd_mode ? 'R' : '-',
2227 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2228 : '-',
2229 memory_region_name(mr),
2230 memory_region_name(mr->alias),
2231 mr->alias_offset,
2232 mr->alias_offset
2233 + (int128_nz(mr->size) ?
2234 (hwaddr)int128_get64(int128_sub(mr->size,
2235 int128_one())) : 0),
2236 mr->enabled ? "" : " [disabled]");
2237 } else {
2238 mon_printf(f,
2239 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2240 base + mr->addr,
2241 base + mr->addr
2242 + (int128_nz(mr->size) ?
2243 (hwaddr)int128_get64(int128_sub(mr->size,
2244 int128_one())) : 0),
2245 mr->priority,
2246 mr->romd_mode ? 'R' : '-',
2247 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2248 : '-',
2249 memory_region_name(mr),
2250 mr->enabled ? "" : " [disabled]");
2251 }
2252
2253 QTAILQ_INIT(&submr_print_queue);
2254
2255 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2256 new_ml = g_new(MemoryRegionList, 1);
2257 new_ml->mr = submr;
2258 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2259 if (new_ml->mr->addr < ml->mr->addr ||
2260 (new_ml->mr->addr == ml->mr->addr &&
2261 new_ml->mr->priority > ml->mr->priority)) {
2262 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2263 new_ml = NULL;
2264 break;
2265 }
2266 }
2267 if (new_ml) {
2268 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2269 }
2270 }
2271
2272 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2273 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2274 alias_print_queue);
2275 }
2276
2277 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2278 g_free(ml);
2279 }
2280 }
2281
2282 void mtree_info(fprintf_function mon_printf, void *f)
2283 {
2284 MemoryRegionListHead ml_head;
2285 MemoryRegionList *ml, *ml2;
2286 AddressSpace *as;
2287
2288 QTAILQ_INIT(&ml_head);
2289
2290 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2291 mon_printf(f, "address-space: %s\n", as->name);
2292 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2293 mon_printf(f, "\n");
2294 }
2295
2296 /* print aliased regions */
2297 QTAILQ_FOREACH(ml, &ml_head, queue) {
2298 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2299 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2300 mon_printf(f, "\n");
2301 }
2302
2303 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2304 g_free(ml);
2305 }
2306 }
2307
2308 static const TypeInfo memory_region_info = {
2309 .parent = TYPE_OBJECT,
2310 .name = TYPE_MEMORY_REGION,
2311 .instance_size = sizeof(MemoryRegion),
2312 .instance_init = memory_region_initfn,
2313 .instance_finalize = memory_region_finalize,
2314 };
2315
2316 static void memory_register_types(void)
2317 {
2318 type_register_static(&memory_region_info);
2319 }
2320
2321 type_init(memory_register_types)
AR7 emulation for QEMU