tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "tcg.h"
  26 #include "exec/helper-proto.h"
  27 #include "exec/helper-gen.h"
  28
  29 /* Basic output routines.  Not for general consumption.  */
  30
  31 void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg);
  32 void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg);
  33 void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg);
  34 void tcg_gen_op4(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  35 void tcg_gen_op5(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  36                  TCGArg, TCGArg);
  37 void tcg_gen_op6(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  38                  TCGArg, TCGArg, TCGArg);
  39
  40
  41 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  42 {
  43     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I32(a1));
  44 }
  45
  46 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  47 {
  48     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I64(a1));
  49 }
  50
  51 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  52 {
  53     tcg_gen_op1(&tcg_ctx, opc, a1);
  54 }
  55
  56 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  57 {
  58     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2));
  59 }
  60
  61 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  62 {
  63     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2));
  64 }
  65
  66 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  67 {
  68     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), a2);
  69 }
  70
  71 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  72 {
  73     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), a2);
  74 }
  75
  76 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  77 {
  78     tcg_gen_op2(&tcg_ctx, opc, a1, a2);
  79 }
  80
  81 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  82                                    TCGv_i32 a2, TCGv_i32 a3)
  83 {
  84     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1),
  85                 GET_TCGV_I32(a2), GET_TCGV_I32(a3));
  86 }
  87
  88 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  89                                    TCGv_i64 a2, TCGv_i64 a3)
  90 {
  91     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1),
  92                 GET_TCGV_I64(a2), GET_TCGV_I64(a3));
  93 }
  94
  95 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  96                                     TCGv_i32 a2, TCGArg a3)
  97 {
  98     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3);
  99 }
 100
 101 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
 102                                     TCGv_i64 a2, TCGArg a3)
 103 {
 104     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3);
 105 }
 106
 107 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 108                                        TCGv_ptr base, TCGArg offset)
 109 {
 110     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset);
 111 }
 112
 113 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 114                                        TCGv_ptr base, TCGArg offset)
 115 {
 116     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset);
 117 }
 118
 119 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 120                                    TCGv_i32 a3, TCGv_i32 a4)
 121 {
 122     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 123                 GET_TCGV_I32(a3), GET_TCGV_I32(a4));
 124 }
 125
 126 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 127                                    TCGv_i64 a3, TCGv_i64 a4)
 128 {
 129     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 130                 GET_TCGV_I64(a3), GET_TCGV_I64(a4));
 131 }
 132
 133 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 134                                     TCGv_i32 a3, TCGArg a4)
 135 {
 136     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 137                 GET_TCGV_I32(a3), a4);
 138 }
 139
 140 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 141                                     TCGv_i64 a3, TCGArg a4)
 142 {
 143     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 144                 GET_TCGV_I64(a3), a4);
 145 }
 146
 147 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 148                                      TCGArg a3, TCGArg a4)
 149 {
 150     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4);
 151 }
 152
 153 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 154                                      TCGArg a3, TCGArg a4)
 155 {
 156     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4);
 157 }
 158
 159 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 160                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 161 {
 162     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 163                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5));
 164 }
 165
 166 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 167                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 168 {
 169     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 170                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5));
 171 }
 172
 173 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 174                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 175 {
 176     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 177                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5);
 178 }
 179
 180 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 181                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 182 {
 183     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 184                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5);
 185 }
 186
 187 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 188                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 189 {
 190     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 191                 GET_TCGV_I32(a3), a4, a5);
 192 }
 193
 194 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 195                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 196 {
 197     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 198                 GET_TCGV_I64(a3), a4, a5);
 199 }
 200
 201 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 202                                    TCGv_i32 a3, TCGv_i32 a4,
 203                                    TCGv_i32 a5, TCGv_i32 a6)
 204 {
 205     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 206                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5),
 207                 GET_TCGV_I32(a6));
 208 }
 209
 210 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 211                                    TCGv_i64 a3, TCGv_i64 a4,
 212                                    TCGv_i64 a5, TCGv_i64 a6)
 213 {
 214     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 215                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5),
 216                 GET_TCGV_I64(a6));
 217 }
 218
 219 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 220                                     TCGv_i32 a3, TCGv_i32 a4,
 221                                     TCGv_i32 a5, TCGArg a6)
 222 {
 223     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 224                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6);
 225 }
 226
 227 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 228                                     TCGv_i64 a3, TCGv_i64 a4,
 229                                     TCGv_i64 a5, TCGArg a6)
 230 {
 231     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 232                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6);
 233 }
 234
 235 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 236                                      TCGv_i32 a3, TCGv_i32 a4,
 237                                      TCGArg a5, TCGArg a6)
 238 {
 239     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 240                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6);
 241 }
 242
 243 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 244                                      TCGv_i64 a3, TCGv_i64 a4,
 245                                      TCGArg a5, TCGArg a6)
 246 {
 247     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 248                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6);
 249 }
 250
 251
 252 /* Generic ops.  */
 253
 254 int gen_new_label(void);
 255
 256 static inline void gen_set_label(int n)
 257 {
 258     tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, n);
 259 }
 260
 261 static inline void tcg_gen_br(int label)
 262 {
 263     tcg_gen_op1(&tcg_ctx, INDEX_op_br, label);
 264 }
 265
 266
 267 /* Helper calls. */
 268
 269 /* 32 bit ops */
 270
 271 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 272 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 273 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 274 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 275 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 276 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 277 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 278 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 279 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 280 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 281 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 282 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 283 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 284 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 287 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 288 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 289 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 290 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 291 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 292 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 293 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 294 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 295                          unsigned int ofs, unsigned int len);
 296 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label);
 297 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, int label);
 298 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 299                          TCGv_i32 arg1, TCGv_i32 arg2);
 300 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 301                           TCGv_i32 arg1, int32_t arg2);
 302 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 303                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 304 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 305                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 306 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 307                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 308 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 309 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 310 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 311 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 312 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 313 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 314 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 315 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 316
 317 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 318 {
 319     tcg_gen_op1_i32(INDEX_op_discard, arg);
 320 }
 321
 322 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 323 {
 324     if (!TCGV_EQUAL_I32(ret, arg)) {
 325         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 326     }
 327 }
 328
 329 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 330 {
 331     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 332 }
 333
 334 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 335                                     tcg_target_long offset)
 336 {
 337     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 338 }
 339
 340 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 341                                     tcg_target_long offset)
 342 {
 343     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 344 }
 345
 346 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 347                                      tcg_target_long offset)
 348 {
 349     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 350 }
 351
 352 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 353                                      tcg_target_long offset)
 354 {
 355     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 356 }
 357
 358 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 359                                   tcg_target_long offset)
 360 {
 361     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 362 }
 363
 364 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 365                                    tcg_target_long offset)
 366 {
 367     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 368 }
 369
 370 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 371                                     tcg_target_long offset)
 372 {
 373     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 374 }
 375
 376 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 377                                   tcg_target_long offset)
 378 {
 379     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 380 }
 381
 382 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 383 {
 384     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 385 }
 386
 387 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 388 {
 389     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 390 }
 391
 392 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 393 {
 394     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 395 }
 396
 397 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 398 {
 399     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 400 }
 401
 402 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 403 {
 404     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 405 }
 406
 407 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 408 {
 409     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 410 }
 411
 412 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 413 {
 414     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 415 }
 416
 417 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 418 {
 419     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 420 }
 421
 422 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 423 {
 424     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 425 }
 426
 427 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 428 {
 429     if (TCG_TARGET_HAS_neg_i32) {
 430         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 431     } else {
 432         tcg_gen_subfi_i32(ret, 0, arg);
 433     }
 434 }
 435
 436 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 437 {
 438     if (TCG_TARGET_HAS_not_i32) {
 439         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 440     } else {
 441         tcg_gen_xori_i32(ret, arg, -1);
 442     }
 443 }
 444
 445 /* 64 bit ops */
 446
 447 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 448 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 449 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 450 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 451 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 452 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 453 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 454 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 455 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 456 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 457 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 458 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 459 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 460 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 461 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 462 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 463 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 464 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 465 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 466 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 467 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 468 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 469 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 470 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 471                          unsigned int ofs, unsigned int len);
 472 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, int label);
 473 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, int label);
 474 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 475                          TCGv_i64 arg1, TCGv_i64 arg2);
 476 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 477                           TCGv_i64 arg1, int64_t arg2);
 478 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 479                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 480 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 481                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 482 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 483                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 484 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 485 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 486 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 487 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 488 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 489 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 490 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 491 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 492 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 493 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 494 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 495 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 496
 497 #if TCG_TARGET_REG_BITS == 64
 498 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 499 {
 500     tcg_gen_op1_i64(INDEX_op_discard, arg);
 501 }
 502
 503 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 504 {
 505     if (!TCGV_EQUAL_I64(ret, arg)) {
 506         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 507     }
 508 }
 509
 510 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 511 {
 512     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 513 }
 514
 515 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 516                                     tcg_target_long offset)
 517 {
 518     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 519 }
 520
 521 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 522                                     tcg_target_long offset)
 523 {
 524     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 525 }
 526
 527 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 528                                      tcg_target_long offset)
 529 {
 530     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 531 }
 532
 533 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 534                                      tcg_target_long offset)
 535 {
 536     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 537 }
 538
 539 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 540                                      tcg_target_long offset)
 541 {
 542     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 543 }
 544
 545 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 546                                      tcg_target_long offset)
 547 {
 548     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 549 }
 550
 551 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 552                                   tcg_target_long offset)
 553 {
 554     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 555 }
 556
 557 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 558                                    tcg_target_long offset)
 559 {
 560     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 561 }
 562
 563 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 564                                     tcg_target_long offset)
 565 {
 566     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 567 }
 568
 569 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 570                                     tcg_target_long offset)
 571 {
 572     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 573 }
 574
 575 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 576                                   tcg_target_long offset)
 577 {
 578     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 579 }
 580
 581 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 582 {
 583     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 584 }
 585
 586 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 587 {
 588     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 589 }
 590
 591 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 592 {
 593     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 594 }
 595
 596 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 597 {
 598     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 599 }
 600
 601 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 602 {
 603     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 604 }
 605
 606 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 607 {
 608     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 609 }
 610
 611 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 612 {
 613     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 614 }
 615
 616 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 617 {
 618     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 619 }
 620
 621 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 622 {
 623     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 624 }
 625 #else /* TCG_TARGET_REG_BITS == 32 */
 626 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 627                                    tcg_target_long offset)
 628 {
 629     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 630 }
 631
 632 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 633                                     tcg_target_long offset)
 634 {
 635     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 636 }
 637
 638 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 639                                     tcg_target_long offset)
 640 {
 641     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 642 }
 643
 644 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 645 {
 646     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 647                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 648 }
 649
 650 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 651 {
 652     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 653                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 654 }
 655
 656 void tcg_gen_discard_i64(TCGv_i64 arg);
 657 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 658 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 659 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 660 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 661 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 662 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 663 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 664 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 665 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 666 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 667 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 668 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 669 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 670 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 671 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 672 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 673 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 674 #endif /* TCG_TARGET_REG_BITS */
 675
 676 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 677 {
 678     if (TCG_TARGET_HAS_neg_i64) {
 679         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 680     } else {
 681         tcg_gen_subfi_i64(ret, 0, arg);
 682     }
 683 }
 684
 685 /* Size changing operations.  */
 686
 687 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 688 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 689 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 690 void tcg_gen_trunc_shr_i64_i32(TCGv_i32 ret, TCGv_i64 arg, unsigned int c);
 691 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 692 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 693
 694 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 695 {
 696     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 697 }
 698
 699 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
 700 {
 701     tcg_gen_trunc_shr_i64_i32(ret, arg, 0);
 702 }
 703
 704 /* QEMU specific operations.  */
 705
 706 #ifndef TARGET_LONG_BITS
 707 #error must include QEMU headers
 708 #endif
 709
 710 /* debug info: write the PC of the corresponding QEMU CPU instruction */
 711 static inline void tcg_gen_debug_insn_start(uint64_t pc)
 712 {
 713     /* XXX: must really use a 32 bit size for TCGArg in all cases */
 714 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
 715     tcg_gen_op2ii(INDEX_op_debug_insn_start,
 716                   (uint32_t)(pc), (uint32_t)(pc >> 32));
 717 #else
 718     tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
 719 #endif
 720 }
 721
 722 static inline void tcg_gen_exit_tb(uintptr_t val)
 723 {
 724     tcg_gen_op1i(INDEX_op_exit_tb, val);
 725 }
 726
 727 void tcg_gen_goto_tb(unsigned idx);
 728
 729 #if TARGET_LONG_BITS == 32
 730 #define TCGv TCGv_i32
 731 #define tcg_temp_new() tcg_temp_new_i32()
 732 #define tcg_global_reg_new tcg_global_reg_new_i32
 733 #define tcg_global_mem_new tcg_global_mem_new_i32
 734 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 735 #define tcg_temp_free tcg_temp_free_i32
 736 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
 737 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I32(x)
 738 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
 739 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 740 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 741 #else
 742 #define TCGv TCGv_i64
 743 #define tcg_temp_new() tcg_temp_new_i64()
 744 #define tcg_global_reg_new tcg_global_reg_new_i64
 745 #define tcg_global_mem_new tcg_global_mem_new_i64
 746 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 747 #define tcg_temp_free tcg_temp_free_i64
 748 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
 749 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I64(x)
 750 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
 751 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 752 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 753 #endif
 754
 755 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 756 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 757 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 758 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 759
 760 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 761 {
 762     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 763 }
 764
 765 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 766 {
 767     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 768 }
 769
 770 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 771 {
 772     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 773 }
 774
 775 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 776 {
 777     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 778 }
 779
 780 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 781 {
 782     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 783 }
 784
 785 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 786 {
 787     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 788 }
 789
 790 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 791 {
 792     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 793 }
 794
 795 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 796 {
 797     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 798 }
 799
 800 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 801 {
 802     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 803 }
 804
 805 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 806 {
 807     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 808 }
 809
 810 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 811 {
 812     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 813 }
 814
 815 #if TARGET_LONG_BITS == 64
 816 #define tcg_gen_movi_tl tcg_gen_movi_i64
 817 #define tcg_gen_mov_tl tcg_gen_mov_i64
 818 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 819 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 820 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 821 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 822 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 823 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
 824 #define tcg_gen_ld_tl tcg_gen_ld_i64
 825 #define tcg_gen_st8_tl tcg_gen_st8_i64
 826 #define tcg_gen_st16_tl tcg_gen_st16_i64
 827 #define tcg_gen_st32_tl tcg_gen_st32_i64
 828 #define tcg_gen_st_tl tcg_gen_st_i64
 829 #define tcg_gen_add_tl tcg_gen_add_i64
 830 #define tcg_gen_addi_tl tcg_gen_addi_i64
 831 #define tcg_gen_sub_tl tcg_gen_sub_i64
 832 #define tcg_gen_neg_tl tcg_gen_neg_i64
 833 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
 834 #define tcg_gen_subi_tl tcg_gen_subi_i64
 835 #define tcg_gen_and_tl tcg_gen_and_i64
 836 #define tcg_gen_andi_tl tcg_gen_andi_i64
 837 #define tcg_gen_or_tl tcg_gen_or_i64
 838 #define tcg_gen_ori_tl tcg_gen_ori_i64
 839 #define tcg_gen_xor_tl tcg_gen_xor_i64
 840 #define tcg_gen_xori_tl tcg_gen_xori_i64
 841 #define tcg_gen_not_tl tcg_gen_not_i64
 842 #define tcg_gen_shl_tl tcg_gen_shl_i64
 843 #define tcg_gen_shli_tl tcg_gen_shli_i64
 844 #define tcg_gen_shr_tl tcg_gen_shr_i64
 845 #define tcg_gen_shri_tl tcg_gen_shri_i64
 846 #define tcg_gen_sar_tl tcg_gen_sar_i64
 847 #define tcg_gen_sari_tl tcg_gen_sari_i64
 848 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
 849 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
 850 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
 851 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
 852 #define tcg_gen_mul_tl tcg_gen_mul_i64
 853 #define tcg_gen_muli_tl tcg_gen_muli_i64
 854 #define tcg_gen_div_tl tcg_gen_div_i64
 855 #define tcg_gen_rem_tl tcg_gen_rem_i64
 856 #define tcg_gen_divu_tl tcg_gen_divu_i64
 857 #define tcg_gen_remu_tl tcg_gen_remu_i64
 858 #define tcg_gen_discard_tl tcg_gen_discard_i64
 859 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
 860 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
 861 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
 862 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
 863 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
 864 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
 865 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
 866 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
 867 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
 868 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
 869 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
 870 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
 871 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
 872 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
 873 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
 874 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
 875 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
 876 #define tcg_gen_andc_tl tcg_gen_andc_i64
 877 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
 878 #define tcg_gen_nand_tl tcg_gen_nand_i64
 879 #define tcg_gen_nor_tl tcg_gen_nor_i64
 880 #define tcg_gen_orc_tl tcg_gen_orc_i64
 881 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
 882 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
 883 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
 884 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
 885 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
 886 #define tcg_const_tl tcg_const_i64
 887 #define tcg_const_local_tl tcg_const_local_i64
 888 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
 889 #define tcg_gen_add2_tl tcg_gen_add2_i64
 890 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
 891 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
 892 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
 893 #else
 894 #define tcg_gen_movi_tl tcg_gen_movi_i32
 895 #define tcg_gen_mov_tl tcg_gen_mov_i32
 896 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
 897 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
 898 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
 899 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
 900 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
 901 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
 902 #define tcg_gen_ld_tl tcg_gen_ld_i32
 903 #define tcg_gen_st8_tl tcg_gen_st8_i32
 904 #define tcg_gen_st16_tl tcg_gen_st16_i32
 905 #define tcg_gen_st32_tl tcg_gen_st_i32
 906 #define tcg_gen_st_tl tcg_gen_st_i32
 907 #define tcg_gen_add_tl tcg_gen_add_i32
 908 #define tcg_gen_addi_tl tcg_gen_addi_i32
 909 #define tcg_gen_sub_tl tcg_gen_sub_i32
 910 #define tcg_gen_neg_tl tcg_gen_neg_i32
 911 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
 912 #define tcg_gen_subi_tl tcg_gen_subi_i32
 913 #define tcg_gen_and_tl tcg_gen_and_i32
 914 #define tcg_gen_andi_tl tcg_gen_andi_i32
 915 #define tcg_gen_or_tl tcg_gen_or_i32
 916 #define tcg_gen_ori_tl tcg_gen_ori_i32
 917 #define tcg_gen_xor_tl tcg_gen_xor_i32
 918 #define tcg_gen_xori_tl tcg_gen_xori_i32
 919 #define tcg_gen_not_tl tcg_gen_not_i32
 920 #define tcg_gen_shl_tl tcg_gen_shl_i32
 921 #define tcg_gen_shli_tl tcg_gen_shli_i32
 922 #define tcg_gen_shr_tl tcg_gen_shr_i32
 923 #define tcg_gen_shri_tl tcg_gen_shri_i32
 924 #define tcg_gen_sar_tl tcg_gen_sar_i32
 925 #define tcg_gen_sari_tl tcg_gen_sari_i32
 926 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
 927 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
 928 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
 929 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
 930 #define tcg_gen_mul_tl tcg_gen_mul_i32
 931 #define tcg_gen_muli_tl tcg_gen_muli_i32
 932 #define tcg_gen_div_tl tcg_gen_div_i32
 933 #define tcg_gen_rem_tl tcg_gen_rem_i32
 934 #define tcg_gen_divu_tl tcg_gen_divu_i32
 935 #define tcg_gen_remu_tl tcg_gen_remu_i32
 936 #define tcg_gen_discard_tl tcg_gen_discard_i32
 937 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
 938 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
 939 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
 940 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
 941 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
 942 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
 943 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
 944 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
 945 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
 946 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
 947 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
 948 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
 949 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
 950 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
 951 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
 952 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
 953 #define tcg_gen_andc_tl tcg_gen_andc_i32
 954 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
 955 #define tcg_gen_nand_tl tcg_gen_nand_i32
 956 #define tcg_gen_nor_tl tcg_gen_nor_i32
 957 #define tcg_gen_orc_tl tcg_gen_orc_i32
 958 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
 959 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
 960 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
 961 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
 962 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
 963 #define tcg_const_tl tcg_const_i32
 964 #define tcg_const_local_tl tcg_const_local_i32
 965 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
 966 #define tcg_gen_add2_tl tcg_gen_add2_i32
 967 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
 968 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
 969 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
 970 #endif
 971
 972 #if UINTPTR_MAX == UINT32_MAX
 973 # define tcg_gen_ld_ptr(R, A, O) \
 974     tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
 975 # define tcg_gen_discard_ptr(A) \
 976     tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
 977 # define tcg_gen_add_ptr(R, A, B) \
 978     tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
 979 # define tcg_gen_addi_ptr(R, A, B) \
 980     tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
 981 # define tcg_gen_ext_i32_ptr(R, A) \
 982     tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
 983 #else
 984 # define tcg_gen_ld_ptr(R, A, O) \
 985     tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
 986 # define tcg_gen_discard_ptr(A) \
 987     tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
 988 # define tcg_gen_add_ptr(R, A, B) \
 989     tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
 990 # define tcg_gen_addi_ptr(R, A, B) \
 991     tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
 992 # define tcg_gen_ext_i32_ptr(R, A) \
 993     tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
 994 #endif /* UINTPTR_MAX == UINT32_MAX */