hw/mips/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include "qemu/units.h"
  13 #include "qapi/error.h"
  14 #include "qemu-common.h"
  15 #include "cpu.h"
  16 #include "hw/mips/mips.h"
  17 #include "hw/mips/cpudevs.h"
  18 #include "hw/intc/i8259.h"
  19 #include "hw/char/serial.h"
  20 #include "hw/isa/isa.h"
  21 #include "net/net.h"
  22 #include "hw/net/ne2000-isa.h"
  23 #include "sysemu/sysemu.h"
  24 #include "hw/boards.h"
  25 #include "hw/block/flash.h"
  26 #include "qemu/log.h"
  27 #include "hw/mips/bios.h"
  28 #include "hw/ide.h"
  29 #include "hw/ide/internal.h"
  30 #include "hw/loader.h"
  31 #include "elf.h"
  32 #include "hw/rtc/mc146818rtc.h"
  33 #include "hw/input/i8042.h"
  34 #include "hw/timer/i8254.h"
  35 #include "exec/address-spaces.h"
  36 #include "sysemu/qtest.h"
  37 #include "sysemu/reset.h"
  38 #include "sysemu/runstate.h"
  39 #include "qemu/error-report.h"
  40
  41 #define MAX_IDE_BUS 2
  42
  43 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  44 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  45 static const int ide_irq[2] = { 14, 15 };
  46
  47 static ISADevice *pit; /* PIT i8254 */
  48
  49 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  50
  51 static struct _loaderparams {
  52     int ram_size;
  53     const char *kernel_filename;
  54     const char *kernel_cmdline;
  55     const char *initrd_filename;
  56 } loaderparams;
  57
  58 static void mips_qemu_write(void *opaque, hwaddr addr,
  59                             uint64_t val, unsigned size)
  60 {
  61     if ((addr & 0xffff) == 0 && val == 42) {
  62         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
  63     } else if ((addr & 0xffff) == 4 && val == 42) {
  64         qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  65     }
  66 }
  67
  68 static uint64_t mips_qemu_read(void *opaque, hwaddr addr,
  69                                unsigned size)
  70 {
  71     return 0;
  72 }
  73
  74 static const MemoryRegionOps mips_qemu_ops = {
  75     .read = mips_qemu_read,
  76     .write = mips_qemu_write,
  77     .endianness = DEVICE_NATIVE_ENDIAN,
  78 };
  79
  80 typedef struct ResetData {
  81     MIPSCPU *cpu;
  82     uint64_t vector;
  83 } ResetData;
  84
  85 static int64_t load_kernel(void)
  86 {
  87     const size_t params_size = 264;
  88     int64_t entry, kernel_high, initrd_size;
  89     long kernel_size;
  90     ram_addr_t initrd_offset;
  91     uint32_t *params_buf;
  92     int big_endian;
  93
  94 #ifdef TARGET_WORDS_BIGENDIAN
  95     big_endian = 1;
  96 #else
  97     big_endian = 0;
  98 #endif
  99     kernel_size = load_elf(loaderparams.kernel_filename, NULL,
 100                            cpu_mips_kseg0_to_phys, NULL,
 101                            (uint64_t *)&entry, NULL,
 102                            (uint64_t *)&kernel_high, NULL, big_endian,
 103                            EM_MIPS, 1, 0);
 104     if (kernel_size >= 0) {
 105         if ((entry & ~0x7fffffffULL) == 0x80000000) {
 106             entry = (int32_t)entry;
 107         }
 108     } else {
 109         error_report("could not load kernel '%s': %s",
 110                      loaderparams.kernel_filename,
 111                      load_elf_strerror(kernel_size));
 112         exit(1);
 113     }
 114
 115     /* load initrd */
 116     initrd_size = 0;
 117     initrd_offset = 0;
 118     if (loaderparams.initrd_filename) {
 119         initrd_size = get_image_size(loaderparams.initrd_filename);
 120         if (initrd_size > 0) {
 121             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &
 122                              INITRD_PAGE_MASK;
 123             if (initrd_offset + initrd_size > ram_size) {
 124                 error_report("memory too small for initial ram disk '%s'",
 125                              loaderparams.initrd_filename);
 126                 exit(1);
 127             }
 128             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 129                                               initrd_offset,
 130                                               ram_size - initrd_offset);
 131         }
 132         if (initrd_size == (target_ulong) -1) {
 133             error_report("could not load initial ram disk '%s'",
 134                          loaderparams.initrd_filename);
 135             exit(1);
 136         }
 137     }
 138
 139     /* Store command line.  */
 140     params_buf = g_malloc(params_size);
 141
 142     params_buf[0] = tswap32(ram_size);
 143     params_buf[1] = tswap32(0x12345678);
 144
 145     if (initrd_size > 0) {
 146         snprintf((char *)params_buf + 8, 256,
 147                  "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
 148                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 149                  initrd_size, loaderparams.kernel_cmdline);
 150     } else {
 151         snprintf((char *)params_buf + 8, 256,
 152         "%s", loaderparams.kernel_cmdline);
 153     }
 154
 155     rom_add_blob_fixed("params", params_buf, params_size,
 156                        16 * MiB - params_size);
 157
 158     g_free(params_buf);
 159     return entry;
 160 }
 161
 162 static void main_cpu_reset(void *opaque)
 163 {
 164     ResetData *s = (ResetData *)opaque;
 165     CPUMIPSState *env = &s->cpu->env;
 166
 167     cpu_reset(CPU(s->cpu));
 168     env->active_tc.PC = s->vector;
 169 }
 170
 171 static const int sector_len = 32 * KiB;
 172 static
 173 void mips_r4k_init(MachineState *machine)
 174 {
 175     const char *kernel_filename = machine->kernel_filename;
 176     const char *kernel_cmdline = machine->kernel_cmdline;
 177     const char *initrd_filename = machine->initrd_filename;
 178     char *filename;
 179     MemoryRegion *address_space_mem = get_system_memory();
 180     MemoryRegion *bios;
 181     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 182     MemoryRegion *isa_io = g_new(MemoryRegion, 1);
 183     MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
 184     int bios_size;
 185     MIPSCPU *cpu;
 186     CPUMIPSState *env;
 187     ResetData *reset_info;
 188     int i;
 189     qemu_irq *i8259;
 190     ISABus *isa_bus;
 191     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 192     DriveInfo *dinfo;
 193     int be;
 194
 195     /* init CPUs */
 196     cpu = MIPS_CPU(cpu_create(machine->cpu_type));
 197     env = &cpu->env;
 198
 199     reset_info = g_malloc0(sizeof(ResetData));
 200     reset_info->cpu = cpu;
 201     reset_info->vector = env->active_tc.PC;
 202     qemu_register_reset(main_cpu_reset, reset_info);
 203
 204     /* allocate RAM */
 205     if (machine->ram_size > 256 * MiB) {
 206         error_report("Too much memory for this machine: %" PRId64 "MB,"
 207                      " maximum 256MB", ram_size / MiB);
 208         exit(1);
 209     }
 210     memory_region_add_subregion(address_space_mem, 0, machine->ram);
 211
 212     memory_region_init_io(iomem, NULL, &mips_qemu_ops,
 213                           NULL, "mips-qemu", 0x10000);
 214
 215     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 216
 217     /*
 218      * Try to load a BIOS image. If this fails, we continue regardless,
 219      * but initialize the hardware ourselves. When a kernel gets
 220      * preloaded we also initialize the hardware, since the BIOS wasn't
 221      * run.
 222      */
 223
 224     if (bios_name == NULL) {
 225         bios_name = BIOS_FILENAME;
 226     }
 227     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 228     if (filename) {
 229         bios_size = get_image_size(filename);
 230     } else {
 231         bios_size = -1;
 232     }
 233 #ifdef TARGET_WORDS_BIGENDIAN
 234     be = 1;
 235 #else
 236     be = 0;
 237 #endif
 238     dinfo = drive_get(IF_PFLASH, 0, 0);
 239     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 240         bios = g_new(MemoryRegion, 1);
 241         memory_region_init_rom(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 242                                &error_fatal);
 243         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 244
 245         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 246     } else if (dinfo != NULL) {
 247         uint32_t mips_rom = 0x00400000;
 248         if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
 249                                    blk_by_legacy_dinfo(dinfo),
 250                                    sector_len, 4, 0, 0, 0, 0, be)) {
 251             fprintf(stderr, "qemu: Error registering flash memory.\n");
 252         }
 253     } else if (!qtest_enabled()) {
 254         /* not fatal */
 255         warn_report("could not load MIPS bios '%s'", bios_name);
 256     }
 257     g_free(filename);
 258
 259     if (kernel_filename) {
 260         loaderparams.ram_size = machine->ram_size;
 261         loaderparams.kernel_filename = kernel_filename;
 262         loaderparams.kernel_cmdline = kernel_cmdline;
 263         loaderparams.initrd_filename = initrd_filename;
 264         reset_info->vector = load_kernel();
 265     }
 266
 267     /* Init CPU internal devices */
 268     cpu_mips_irq_init_cpu(cpu);
 269     cpu_mips_clock_init(cpu);
 270
 271     /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
 272     memory_region_init_alias(isa_io, NULL, "isa-io",
 273                              get_system_io(), 0, 0x00010000);
 274     memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
 275     memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
 276     memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
 277     isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
 278
 279     /* The PIC is attached to the MIPS CPU INT0 pin */
 280     i8259 = i8259_init(isa_bus, env->irq[2]);
 281     isa_bus_irqs(isa_bus, i8259);
 282
 283     mc146818_rtc_init(isa_bus, 2000, NULL);
 284
 285     pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
 286
 287     serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS);
 288
 289     isa_vga_init(isa_bus);
 290
 291     if (nd_table[0].used) {
 292         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 293     }
 294
 295     ide_drive_get(hd, ARRAY_SIZE(hd));
 296     for (i = 0; i < MAX_IDE_BUS; i++)
 297         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 298                      hd[MAX_IDE_DEVS * i],
 299                      hd[MAX_IDE_DEVS * i + 1]);
 300
 301     isa_create_simple(isa_bus, TYPE_I8042);
 302 }
 303
 304 static void mips_machine_init(MachineClass *mc)
 305 {
 306     mc->deprecation_reason = "use malta machine type instead";
 307     mc->desc = "mips r4k platform";
 308     mc->init = mips_r4k_init;
 309     mc->block_default_type = IF_IDE;
 310 #ifdef TARGET_MIPS64
 311     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
 312 #else
 313     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
 314 #endif
 315     mc->default_ram_id = "mips_r4k.ram";
 316 }
 317
 318 DEFINE_MACHINE("mips", mips_machine_init)