osdep: include glib-compat.h before other QEMU headers
[qemu/ar7.git] / include / hw / net / ftgmac100.h
blob765d1538a49f7e28709fa890f084c454a7f5ac94
1 /*
2 * Faraday FTGMAC100 Gigabit Ethernet
4 * Copyright (C) 2016-2017, IBM Corporation.
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
8 */
10 #ifndef FTGMAC100_H
11 #define FTGMAC100_H
12 #include "qom/object.h"
14 #define TYPE_FTGMAC100 "ftgmac100"
15 OBJECT_DECLARE_SIMPLE_TYPE(FTGMAC100State, FTGMAC100)
17 #include "hw/sysbus.h"
18 #include "net/net.h"
21 * Max frame size for the receiving buffer
23 #define FTGMAC100_MAX_FRAME_SIZE 9220
25 struct FTGMAC100State {
26 /*< private >*/
27 SysBusDevice parent_obj;
29 /*< public >*/
30 NICState *nic;
31 NICConf conf;
32 qemu_irq irq;
33 MemoryRegion iomem;
35 uint8_t frame[FTGMAC100_MAX_FRAME_SIZE];
37 uint32_t irq_state;
38 uint32_t isr;
39 uint32_t ier;
40 uint32_t rx_enabled;
41 uint32_t rx_ring;
42 uint32_t rx_descriptor;
43 uint32_t tx_ring;
44 uint32_t tx_descriptor;
45 uint32_t math[2];
46 uint32_t rbsr;
47 uint32_t itc;
48 uint32_t aptcr;
49 uint32_t dblac;
50 uint32_t revr;
51 uint32_t fear1;
52 uint32_t tpafcr;
53 uint32_t maccr;
54 uint32_t phycr;
55 uint32_t phydata;
56 uint32_t fcr;
59 uint32_t phy_status;
60 uint32_t phy_control;
61 uint32_t phy_advertise;
62 uint32_t phy_int;
63 uint32_t phy_int_mask;
65 bool aspeed;
66 uint32_t txdes0_edotr;
67 uint32_t rxdes0_edorr;
70 #define TYPE_ASPEED_MII "aspeed-mmi"
71 OBJECT_DECLARE_SIMPLE_TYPE(AspeedMiiState, ASPEED_MII)
74 * AST2600 MII controller
76 struct AspeedMiiState {
77 /*< private >*/
78 SysBusDevice parent_obj;
80 FTGMAC100State *nic;
82 MemoryRegion iomem;
83 uint32_t phycr;
84 uint32_t phydata;
87 #endif