2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
21 #include "qemu/osdep.h"
22 #include <linux/vfio.h>
23 #include <sys/ioctl.h>
26 #include "hw/pci/msi.h"
27 #include "hw/pci/msix.h"
28 #include "hw/pci/pci_bridge.h"
29 #include "hw/qdev-properties.h"
30 #include "migration/vmstate.h"
31 #include "qemu/error-report.h"
32 #include "qemu/main-loop.h"
33 #include "qemu/module.h"
34 #include "qemu/option.h"
35 #include "qemu/range.h"
36 #include "qemu/units.h"
37 #include "sysemu/kvm.h"
38 #include "sysemu/runstate.h"
39 #include "sysemu/sysemu.h"
42 #include "qapi/error.h"
43 #include "migration/blocker.h"
45 #define TYPE_VFIO_PCI "vfio-pci"
46 #define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI)
48 #define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
50 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
);
51 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
);
54 * Disabling BAR mmaping can be slow, but toggling it around INTx can
55 * also be a huge overhead. We try to get the best of both worlds by
56 * waiting until an interrupt to disable mmaps (subsequent transitions
57 * to the same state are effectively no overhead). If the interrupt has
58 * been serviced and the time gap is long enough, we re-enable mmaps for
59 * performance. This works well for things like graphics cards, which
60 * may not use their interrupt at all and are penalized to an unusable
61 * level by read/write BAR traps. Other devices, like NICs, have more
62 * regular interrupts and see much better latency by staying in non-mmap
63 * mode. We therefore set the default mmap_timeout such that a ping
64 * is just enough to keep the mmap disabled. Users can experiment with
65 * other options with the x-intx-mmap-timeout-ms parameter (a value of
66 * zero disables the timer).
68 static void vfio_intx_mmap_enable(void *opaque
)
70 VFIOPCIDevice
*vdev
= opaque
;
72 if (vdev
->intx
.pending
) {
73 timer_mod(vdev
->intx
.mmap_timer
,
74 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
78 vfio_mmap_set_enabled(vdev
, true);
81 static void vfio_intx_interrupt(void *opaque
)
83 VFIOPCIDevice
*vdev
= opaque
;
85 if (!event_notifier_test_and_clear(&vdev
->intx
.interrupt
)) {
89 trace_vfio_intx_interrupt(vdev
->vbasedev
.name
, 'A' + vdev
->intx
.pin
);
91 vdev
->intx
.pending
= true;
92 pci_irq_assert(&vdev
->pdev
);
93 vfio_mmap_set_enabled(vdev
, false);
94 if (vdev
->intx
.mmap_timeout
) {
95 timer_mod(vdev
->intx
.mmap_timer
,
96 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
100 static void vfio_intx_eoi(VFIODevice
*vbasedev
)
102 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
104 if (!vdev
->intx
.pending
) {
108 trace_vfio_intx_eoi(vbasedev
->name
);
110 vdev
->intx
.pending
= false;
111 pci_irq_deassert(&vdev
->pdev
);
112 vfio_unmask_single_irqindex(vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
115 static void vfio_intx_enable_kvm(VFIOPCIDevice
*vdev
, Error
**errp
)
118 struct kvm_irqfd irqfd
= {
119 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
120 .gsi
= vdev
->intx
.route
.irq
,
121 .flags
= KVM_IRQFD_FLAG_RESAMPLE
,
125 if (vdev
->no_kvm_intx
|| !kvm_irqfds_enabled() ||
126 vdev
->intx
.route
.mode
!= PCI_INTX_ENABLED
||
127 !kvm_resamplefds_enabled()) {
131 /* Get to a known interrupt state */
132 qemu_set_fd_handler(irqfd
.fd
, NULL
, NULL
, vdev
);
133 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
134 vdev
->intx
.pending
= false;
135 pci_irq_deassert(&vdev
->pdev
);
137 /* Get an eventfd for resample/unmask */
138 if (event_notifier_init(&vdev
->intx
.unmask
, 0)) {
139 error_setg(errp
, "event_notifier_init failed eoi");
143 /* KVM triggers it, VFIO listens for it */
144 irqfd
.resamplefd
= event_notifier_get_fd(&vdev
->intx
.unmask
);
146 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
147 error_setg_errno(errp
, errno
, "failed to setup resample irqfd");
151 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
, 0,
152 VFIO_IRQ_SET_ACTION_UNMASK
,
153 irqfd
.resamplefd
, &err
)) {
154 error_propagate(errp
, err
);
159 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
161 vdev
->intx
.kvm_accel
= true;
163 trace_vfio_intx_enable_kvm(vdev
->vbasedev
.name
);
168 irqfd
.flags
= KVM_IRQFD_FLAG_DEASSIGN
;
169 kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
);
171 event_notifier_cleanup(&vdev
->intx
.unmask
);
173 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
174 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
178 static void vfio_intx_disable_kvm(VFIOPCIDevice
*vdev
)
181 struct kvm_irqfd irqfd
= {
182 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
183 .gsi
= vdev
->intx
.route
.irq
,
184 .flags
= KVM_IRQFD_FLAG_DEASSIGN
,
187 if (!vdev
->intx
.kvm_accel
) {
192 * Get to a known state, hardware masked, QEMU ready to accept new
193 * interrupts, QEMU IRQ de-asserted.
195 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
196 vdev
->intx
.pending
= false;
197 pci_irq_deassert(&vdev
->pdev
);
199 /* Tell KVM to stop listening for an INTx irqfd */
200 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
201 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
204 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
205 event_notifier_cleanup(&vdev
->intx
.unmask
);
207 /* QEMU starts listening for interrupt events. */
208 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
210 vdev
->intx
.kvm_accel
= false;
212 /* If we've missed an event, let it re-fire through QEMU */
213 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
215 trace_vfio_intx_disable_kvm(vdev
->vbasedev
.name
);
219 static void vfio_intx_update(VFIOPCIDevice
*vdev
, PCIINTxRoute
*route
)
223 trace_vfio_intx_update(vdev
->vbasedev
.name
,
224 vdev
->intx
.route
.irq
, route
->irq
);
226 vfio_intx_disable_kvm(vdev
);
228 vdev
->intx
.route
= *route
;
230 if (route
->mode
!= PCI_INTX_ENABLED
) {
234 vfio_intx_enable_kvm(vdev
, &err
);
236 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
239 /* Re-enable the interrupt in cased we missed an EOI */
240 vfio_intx_eoi(&vdev
->vbasedev
);
243 static void vfio_intx_routing_notifier(PCIDevice
*pdev
)
245 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
248 if (vdev
->interrupt
!= VFIO_INT_INTx
) {
252 route
= pci_device_route_intx_to_irq(&vdev
->pdev
, vdev
->intx
.pin
);
254 if (pci_intx_route_changed(&vdev
->intx
.route
, &route
)) {
255 vfio_intx_update(vdev
, &route
);
259 static int vfio_intx_enable(VFIOPCIDevice
*vdev
, Error
**errp
)
261 uint8_t pin
= vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1);
271 vfio_disable_interrupts(vdev
);
273 vdev
->intx
.pin
= pin
- 1; /* Pin A (1) -> irq[0] */
274 pci_config_set_interrupt_pin(vdev
->pdev
.config
, pin
);
278 * Only conditional to avoid generating error messages on platforms
279 * where we won't actually use the result anyway.
281 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
282 vdev
->intx
.route
= pci_device_route_intx_to_irq(&vdev
->pdev
,
287 ret
= event_notifier_init(&vdev
->intx
.interrupt
, 0);
289 error_setg_errno(errp
, -ret
, "event_notifier_init failed");
292 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
293 qemu_set_fd_handler(fd
, vfio_intx_interrupt
, NULL
, vdev
);
295 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
, 0,
296 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
297 error_propagate(errp
, err
);
298 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
299 event_notifier_cleanup(&vdev
->intx
.interrupt
);
303 vfio_intx_enable_kvm(vdev
, &err
);
305 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
308 vdev
->interrupt
= VFIO_INT_INTx
;
310 trace_vfio_intx_enable(vdev
->vbasedev
.name
);
314 static void vfio_intx_disable(VFIOPCIDevice
*vdev
)
318 timer_del(vdev
->intx
.mmap_timer
);
319 vfio_intx_disable_kvm(vdev
);
320 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
321 vdev
->intx
.pending
= false;
322 pci_irq_deassert(&vdev
->pdev
);
323 vfio_mmap_set_enabled(vdev
, true);
325 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
326 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
327 event_notifier_cleanup(&vdev
->intx
.interrupt
);
329 vdev
->interrupt
= VFIO_INT_NONE
;
331 trace_vfio_intx_disable(vdev
->vbasedev
.name
);
337 static void vfio_msi_interrupt(void *opaque
)
339 VFIOMSIVector
*vector
= opaque
;
340 VFIOPCIDevice
*vdev
= vector
->vdev
;
341 MSIMessage (*get_msg
)(PCIDevice
*dev
, unsigned vector
);
342 void (*notify
)(PCIDevice
*dev
, unsigned vector
);
344 int nr
= vector
- vdev
->msi_vectors
;
346 if (!event_notifier_test_and_clear(&vector
->interrupt
)) {
350 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
351 get_msg
= msix_get_message
;
352 notify
= msix_notify
;
354 /* A masked vector firing needs to use the PBA, enable it */
355 if (msix_is_masked(&vdev
->pdev
, nr
)) {
356 set_bit(nr
, vdev
->msix
->pending
);
357 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, true);
358 trace_vfio_msix_pba_enable(vdev
->vbasedev
.name
);
360 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
361 get_msg
= msi_get_message
;
367 msg
= get_msg(&vdev
->pdev
, nr
);
368 trace_vfio_msi_interrupt(vdev
->vbasedev
.name
, nr
, msg
.address
, msg
.data
);
369 notify(&vdev
->pdev
, nr
);
372 static int vfio_enable_vectors(VFIOPCIDevice
*vdev
, bool msix
)
374 struct vfio_irq_set
*irq_set
;
375 int ret
= 0, i
, argsz
;
378 argsz
= sizeof(*irq_set
) + (vdev
->nr_vectors
* sizeof(*fds
));
380 irq_set
= g_malloc0(argsz
);
381 irq_set
->argsz
= argsz
;
382 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
383 irq_set
->index
= msix
? VFIO_PCI_MSIX_IRQ_INDEX
: VFIO_PCI_MSI_IRQ_INDEX
;
385 irq_set
->count
= vdev
->nr_vectors
;
386 fds
= (int32_t *)&irq_set
->data
;
388 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
392 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
393 * bits, therefore we always use the KVM signaling path when setup.
394 * MSI-X mask and pending bits are emulated, so we want to use the
395 * KVM signaling path only when configured and unmasked.
397 if (vdev
->msi_vectors
[i
].use
) {
398 if (vdev
->msi_vectors
[i
].virq
< 0 ||
399 (msix
&& msix_is_masked(&vdev
->pdev
, i
))) {
400 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].interrupt
);
402 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].kvm_interrupt
);
409 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
416 static void vfio_add_kvm_msi_virq(VFIOPCIDevice
*vdev
, VFIOMSIVector
*vector
,
417 int vector_n
, bool msix
)
421 if ((msix
&& vdev
->no_kvm_msix
) || (!msix
&& vdev
->no_kvm_msi
)) {
425 if (event_notifier_init(&vector
->kvm_interrupt
, 0)) {
429 virq
= kvm_irqchip_add_msi_route(kvm_state
, vector_n
, &vdev
->pdev
);
431 event_notifier_cleanup(&vector
->kvm_interrupt
);
435 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
437 kvm_irqchip_release_virq(kvm_state
, virq
);
438 event_notifier_cleanup(&vector
->kvm_interrupt
);
445 static void vfio_remove_kvm_msi_virq(VFIOMSIVector
*vector
)
447 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
449 kvm_irqchip_release_virq(kvm_state
, vector
->virq
);
451 event_notifier_cleanup(&vector
->kvm_interrupt
);
454 static void vfio_update_kvm_msi_virq(VFIOMSIVector
*vector
, MSIMessage msg
,
457 kvm_irqchip_update_msi_route(kvm_state
, vector
->virq
, msg
, pdev
);
458 kvm_irqchip_commit_routes(kvm_state
);
461 static int vfio_msix_vector_do_use(PCIDevice
*pdev
, unsigned int nr
,
462 MSIMessage
*msg
, IOHandler
*handler
)
464 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
465 VFIOMSIVector
*vector
;
468 trace_vfio_msix_vector_do_use(vdev
->vbasedev
.name
, nr
);
470 vector
= &vdev
->msi_vectors
[nr
];
475 if (event_notifier_init(&vector
->interrupt
, 0)) {
476 error_report("vfio: Error: event_notifier_init failed");
479 msix_vector_use(pdev
, nr
);
482 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
483 handler
, NULL
, vector
);
486 * Attempt to enable route through KVM irqchip,
487 * default to userspace handling if unavailable.
489 if (vector
->virq
>= 0) {
491 vfio_remove_kvm_msi_virq(vector
);
493 vfio_update_kvm_msi_virq(vector
, *msg
, pdev
);
497 vfio_add_kvm_msi_virq(vdev
, vector
, nr
, true);
502 * We don't want to have the host allocate all possible MSI vectors
503 * for a device if they're not in use, so we shutdown and incrementally
504 * increase them as needed.
506 if (vdev
->nr_vectors
< nr
+ 1) {
507 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
508 vdev
->nr_vectors
= nr
+ 1;
509 ret
= vfio_enable_vectors(vdev
, true);
511 error_report("vfio: failed to enable vectors, %d", ret
);
517 if (vector
->virq
>= 0) {
518 fd
= event_notifier_get_fd(&vector
->kvm_interrupt
);
520 fd
= event_notifier_get_fd(&vector
->interrupt
);
523 if (vfio_set_irq_signaling(&vdev
->vbasedev
,
524 VFIO_PCI_MSIX_IRQ_INDEX
, nr
,
525 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
526 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
530 /* Disable PBA emulation when nothing more is pending. */
531 clear_bit(nr
, vdev
->msix
->pending
);
532 if (find_first_bit(vdev
->msix
->pending
,
533 vdev
->nr_vectors
) == vdev
->nr_vectors
) {
534 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
535 trace_vfio_msix_pba_disable(vdev
->vbasedev
.name
);
541 static int vfio_msix_vector_use(PCIDevice
*pdev
,
542 unsigned int nr
, MSIMessage msg
)
544 return vfio_msix_vector_do_use(pdev
, nr
, &msg
, vfio_msi_interrupt
);
547 static void vfio_msix_vector_release(PCIDevice
*pdev
, unsigned int nr
)
549 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
550 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[nr
];
552 trace_vfio_msix_vector_release(vdev
->vbasedev
.name
, nr
);
555 * There are still old guests that mask and unmask vectors on every
556 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
557 * the KVM setup in place, simply switch VFIO to use the non-bypass
558 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
559 * core will mask the interrupt and set pending bits, allowing it to
560 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
562 if (vector
->virq
>= 0) {
563 int32_t fd
= event_notifier_get_fd(&vector
->interrupt
);
566 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
, nr
,
567 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
568 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
573 static void vfio_msix_enable(VFIOPCIDevice
*vdev
)
575 vfio_disable_interrupts(vdev
);
577 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->msix
->entries
);
579 vdev
->interrupt
= VFIO_INT_MSIX
;
582 * Some communication channels between VF & PF or PF & fw rely on the
583 * physical state of the device and expect that enabling MSI-X from the
584 * guest enables the same on the host. When our guest is Linux, the
585 * guest driver call to pci_enable_msix() sets the enabling bit in the
586 * MSI-X capability, but leaves the vector table masked. We therefore
587 * can't rely on a vector_use callback (from request_irq() in the guest)
588 * to switch the physical device into MSI-X mode because that may come a
589 * long time after pci_enable_msix(). This code enables vector 0 with
590 * triggering to userspace, then immediately release the vector, leaving
591 * the physical device with no vectors enabled, but MSI-X enabled, just
592 * like the guest view.
594 vfio_msix_vector_do_use(&vdev
->pdev
, 0, NULL
, NULL
);
595 vfio_msix_vector_release(&vdev
->pdev
, 0);
597 if (msix_set_vector_notifiers(&vdev
->pdev
, vfio_msix_vector_use
,
598 vfio_msix_vector_release
, NULL
)) {
599 error_report("vfio: msix_set_vector_notifiers failed");
602 trace_vfio_msix_enable(vdev
->vbasedev
.name
);
605 static void vfio_msi_enable(VFIOPCIDevice
*vdev
)
609 vfio_disable_interrupts(vdev
);
611 vdev
->nr_vectors
= msi_nr_vectors_allocated(&vdev
->pdev
);
613 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->nr_vectors
);
615 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
616 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
622 if (event_notifier_init(&vector
->interrupt
, 0)) {
623 error_report("vfio: Error: event_notifier_init failed");
626 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
627 vfio_msi_interrupt
, NULL
, vector
);
630 * Attempt to enable route through KVM irqchip,
631 * default to userspace handling if unavailable.
633 vfio_add_kvm_msi_virq(vdev
, vector
, i
, false);
636 /* Set interrupt type prior to possible interrupts */
637 vdev
->interrupt
= VFIO_INT_MSI
;
639 ret
= vfio_enable_vectors(vdev
, false);
642 error_report("vfio: Error: Failed to setup MSI fds: %m");
643 } else if (ret
!= vdev
->nr_vectors
) {
644 error_report("vfio: Error: Failed to enable %d "
645 "MSI vectors, retry with %d", vdev
->nr_vectors
, ret
);
648 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
649 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
650 if (vector
->virq
>= 0) {
651 vfio_remove_kvm_msi_virq(vector
);
653 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
655 event_notifier_cleanup(&vector
->interrupt
);
658 g_free(vdev
->msi_vectors
);
659 vdev
->msi_vectors
= NULL
;
661 if (ret
> 0 && ret
!= vdev
->nr_vectors
) {
662 vdev
->nr_vectors
= ret
;
665 vdev
->nr_vectors
= 0;
668 * Failing to setup MSI doesn't really fall within any specification.
669 * Let's try leaving interrupts disabled and hope the guest figures
670 * out to fall back to INTx for this device.
672 error_report("vfio: Error: Failed to enable MSI");
673 vdev
->interrupt
= VFIO_INT_NONE
;
678 trace_vfio_msi_enable(vdev
->vbasedev
.name
, vdev
->nr_vectors
);
681 static void vfio_msi_disable_common(VFIOPCIDevice
*vdev
)
686 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
687 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
688 if (vdev
->msi_vectors
[i
].use
) {
689 if (vector
->virq
>= 0) {
690 vfio_remove_kvm_msi_virq(vector
);
692 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
694 event_notifier_cleanup(&vector
->interrupt
);
698 g_free(vdev
->msi_vectors
);
699 vdev
->msi_vectors
= NULL
;
700 vdev
->nr_vectors
= 0;
701 vdev
->interrupt
= VFIO_INT_NONE
;
703 vfio_intx_enable(vdev
, &err
);
705 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
709 static void vfio_msix_disable(VFIOPCIDevice
*vdev
)
713 msix_unset_vector_notifiers(&vdev
->pdev
);
716 * MSI-X will only release vectors if MSI-X is still enabled on the
717 * device, check through the rest and release it ourselves if necessary.
719 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
720 if (vdev
->msi_vectors
[i
].use
) {
721 vfio_msix_vector_release(&vdev
->pdev
, i
);
722 msix_vector_unuse(&vdev
->pdev
, i
);
726 if (vdev
->nr_vectors
) {
727 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
730 vfio_msi_disable_common(vdev
);
732 memset(vdev
->msix
->pending
, 0,
733 BITS_TO_LONGS(vdev
->msix
->entries
) * sizeof(unsigned long));
735 trace_vfio_msix_disable(vdev
->vbasedev
.name
);
738 static void vfio_msi_disable(VFIOPCIDevice
*vdev
)
740 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSI_IRQ_INDEX
);
741 vfio_msi_disable_common(vdev
);
743 trace_vfio_msi_disable(vdev
->vbasedev
.name
);
746 static void vfio_update_msi(VFIOPCIDevice
*vdev
)
750 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
751 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
754 if (!vector
->use
|| vector
->virq
< 0) {
758 msg
= msi_get_message(&vdev
->pdev
, i
);
759 vfio_update_kvm_msi_virq(vector
, msg
, &vdev
->pdev
);
763 static void vfio_pci_load_rom(VFIOPCIDevice
*vdev
)
765 struct vfio_region_info
*reg_info
;
770 if (vfio_get_region_info(&vdev
->vbasedev
,
771 VFIO_PCI_ROM_REGION_INDEX
, ®_info
)) {
772 error_report("vfio: Error getting ROM info: %m");
776 trace_vfio_pci_load_rom(vdev
->vbasedev
.name
, (unsigned long)reg_info
->size
,
777 (unsigned long)reg_info
->offset
,
778 (unsigned long)reg_info
->flags
);
780 vdev
->rom_size
= size
= reg_info
->size
;
781 vdev
->rom_offset
= reg_info
->offset
;
785 if (!vdev
->rom_size
) {
786 vdev
->rom_read_failed
= true;
787 error_report("vfio-pci: Cannot read device rom at "
788 "%s", vdev
->vbasedev
.name
);
789 error_printf("Device option ROM contents are probably invalid "
790 "(check dmesg).\nSkip option ROM probe with rombar=0, "
791 "or load from file with romfile=\n");
795 vdev
->rom
= g_malloc(size
);
796 memset(vdev
->rom
, 0xff, size
);
799 bytes
= pread(vdev
->vbasedev
.fd
, vdev
->rom
+ off
,
800 size
, vdev
->rom_offset
+ off
);
803 } else if (bytes
> 0) {
807 if (errno
== EINTR
|| errno
== EAGAIN
) {
810 error_report("vfio: Error reading device ROM: %m");
816 * Test the ROM signature against our device, if the vendor is correct
817 * but the device ID doesn't match, store the correct device ID and
818 * recompute the checksum. Intel IGD devices need this and are known
819 * to have bogus checksums so we can't simply adjust the checksum.
821 if (pci_get_word(vdev
->rom
) == 0xaa55 &&
822 pci_get_word(vdev
->rom
+ 0x18) + 8 < vdev
->rom_size
&&
823 !memcmp(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18), "PCIR", 4)) {
826 vid
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 4);
827 did
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6);
829 if (vid
== vdev
->vendor_id
&& did
!= vdev
->device_id
) {
831 uint8_t csum
, *data
= vdev
->rom
;
833 pci_set_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6,
837 for (csum
= 0, i
= 0; i
< vdev
->rom_size
; i
++) {
846 static uint64_t vfio_rom_read(void *opaque
, hwaddr addr
, unsigned size
)
848 VFIOPCIDevice
*vdev
= opaque
;
857 /* Load the ROM lazily when the guest tries to read it */
858 if (unlikely(!vdev
->rom
&& !vdev
->rom_read_failed
)) {
859 vfio_pci_load_rom(vdev
);
862 memcpy(&val
, vdev
->rom
+ addr
,
863 (addr
< vdev
->rom_size
) ? MIN(size
, vdev
->rom_size
- addr
) : 0);
870 data
= le16_to_cpu(val
.word
);
873 data
= le32_to_cpu(val
.dword
);
876 hw_error("vfio: unsupported read size, %d bytes\n", size
);
880 trace_vfio_rom_read(vdev
->vbasedev
.name
, addr
, size
, data
);
885 static void vfio_rom_write(void *opaque
, hwaddr addr
,
886 uint64_t data
, unsigned size
)
890 static const MemoryRegionOps vfio_rom_ops
= {
891 .read
= vfio_rom_read
,
892 .write
= vfio_rom_write
,
893 .endianness
= DEVICE_LITTLE_ENDIAN
,
896 static void vfio_pci_size_rom(VFIOPCIDevice
*vdev
)
898 uint32_t orig
, size
= cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK
);
899 off_t offset
= vdev
->config_offset
+ PCI_ROM_ADDRESS
;
900 DeviceState
*dev
= DEVICE(vdev
);
902 int fd
= vdev
->vbasedev
.fd
;
904 if (vdev
->pdev
.romfile
|| !vdev
->pdev
.rom_bar
) {
905 /* Since pci handles romfile, just print a message and return */
906 if (vfio_blacklist_opt_rom(vdev
) && vdev
->pdev
.romfile
) {
907 warn_report("Device at %s is known to cause system instability"
908 " issues during option rom execution",
909 vdev
->vbasedev
.name
);
910 error_printf("Proceeding anyway since user specified romfile\n");
916 * Use the same size ROM BAR as the physical device. The contents
917 * will get filled in later when the guest tries to read it.
919 if (pread(fd
, &orig
, 4, offset
) != 4 ||
920 pwrite(fd
, &size
, 4, offset
) != 4 ||
921 pread(fd
, &size
, 4, offset
) != 4 ||
922 pwrite(fd
, &orig
, 4, offset
) != 4) {
923 error_report("%s(%s) failed: %m", __func__
, vdev
->vbasedev
.name
);
927 size
= ~(le32_to_cpu(size
) & PCI_ROM_ADDRESS_MASK
) + 1;
933 if (vfio_blacklist_opt_rom(vdev
)) {
934 if (dev
->opts
&& qemu_opt_get(dev
->opts
, "rombar")) {
935 warn_report("Device at %s is known to cause system instability"
936 " issues during option rom execution",
937 vdev
->vbasedev
.name
);
938 error_printf("Proceeding anyway since user specified"
939 " non zero value for rombar\n");
941 warn_report("Rom loading for device at %s has been disabled"
942 " due to system instability issues",
943 vdev
->vbasedev
.name
);
944 error_printf("Specify rombar=1 or romfile to force\n");
949 trace_vfio_pci_size_rom(vdev
->vbasedev
.name
, size
);
951 name
= g_strdup_printf("vfio[%s].rom", vdev
->vbasedev
.name
);
953 memory_region_init_io(&vdev
->pdev
.rom
, OBJECT(vdev
),
954 &vfio_rom_ops
, vdev
, name
, size
);
957 pci_register_bar(&vdev
->pdev
, PCI_ROM_SLOT
,
958 PCI_BASE_ADDRESS_SPACE_MEMORY
, &vdev
->pdev
.rom
);
960 vdev
->rom_read_failed
= false;
963 void vfio_vga_write(void *opaque
, hwaddr addr
,
964 uint64_t data
, unsigned size
)
966 VFIOVGARegion
*region
= opaque
;
967 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
974 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
981 buf
.word
= cpu_to_le16(data
);
984 buf
.dword
= cpu_to_le32(data
);
987 hw_error("vfio: unsupported write size, %d bytes", size
);
991 if (pwrite(vga
->fd
, &buf
, size
, offset
) != size
) {
992 error_report("%s(,0x%"HWADDR_PRIx
", 0x%"PRIx64
", %d) failed: %m",
993 __func__
, region
->offset
+ addr
, data
, size
);
996 trace_vfio_vga_write(region
->offset
+ addr
, data
, size
);
999 uint64_t vfio_vga_read(void *opaque
, hwaddr addr
, unsigned size
)
1001 VFIOVGARegion
*region
= opaque
;
1002 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1010 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1012 if (pread(vga
->fd
, &buf
, size
, offset
) != size
) {
1013 error_report("%s(,0x%"HWADDR_PRIx
", %d) failed: %m",
1014 __func__
, region
->offset
+ addr
, size
);
1015 return (uint64_t)-1;
1023 data
= le16_to_cpu(buf
.word
);
1026 data
= le32_to_cpu(buf
.dword
);
1029 hw_error("vfio: unsupported read size, %d bytes", size
);
1033 trace_vfio_vga_read(region
->offset
+ addr
, size
, data
);
1038 static const MemoryRegionOps vfio_vga_ops
= {
1039 .read
= vfio_vga_read
,
1040 .write
= vfio_vga_write
,
1041 .endianness
= DEVICE_LITTLE_ENDIAN
,
1045 * Expand memory region of sub-page(size < PAGE_SIZE) MMIO BAR to page
1046 * size if the BAR is in an exclusive page in host so that we could map
1047 * this BAR to guest. But this sub-page BAR may not occupy an exclusive
1048 * page in guest. So we should set the priority of the expanded memory
1049 * region to zero in case of overlap with BARs which share the same page
1050 * with the sub-page BAR in guest. Besides, we should also recover the
1051 * size of this sub-page BAR when its base address is changed in guest
1052 * and not page aligned any more.
1054 static void vfio_sub_page_bar_update_mapping(PCIDevice
*pdev
, int bar
)
1056 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1057 VFIORegion
*region
= &vdev
->bars
[bar
].region
;
1058 MemoryRegion
*mmap_mr
, *region_mr
, *base_mr
;
1061 uint64_t size
= region
->size
;
1063 /* Make sure that the whole region is allowed to be mmapped */
1064 if (region
->nr_mmaps
!= 1 || !region
->mmaps
[0].mmap
||
1065 region
->mmaps
[0].size
!= region
->size
) {
1069 r
= &pdev
->io_regions
[bar
];
1071 base_mr
= vdev
->bars
[bar
].mr
;
1072 region_mr
= region
->mem
;
1073 mmap_mr
= ®ion
->mmaps
[0].mem
;
1075 /* If BAR is mapped and page aligned, update to fill PAGE_SIZE */
1076 if (bar_addr
!= PCI_BAR_UNMAPPED
&&
1077 !(bar_addr
& ~qemu_real_host_page_mask
)) {
1078 size
= qemu_real_host_page_size
;
1081 memory_region_transaction_begin();
1083 if (vdev
->bars
[bar
].size
< size
) {
1084 memory_region_set_size(base_mr
, size
);
1086 memory_region_set_size(region_mr
, size
);
1087 memory_region_set_size(mmap_mr
, size
);
1088 if (size
!= vdev
->bars
[bar
].size
&& memory_region_is_mapped(base_mr
)) {
1089 memory_region_del_subregion(r
->address_space
, base_mr
);
1090 memory_region_add_subregion_overlap(r
->address_space
,
1091 bar_addr
, base_mr
, 0);
1094 memory_region_transaction_commit();
1100 uint32_t vfio_pci_read_config(PCIDevice
*pdev
, uint32_t addr
, int len
)
1102 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1103 uint32_t emu_bits
= 0, emu_val
= 0, phys_val
= 0, val
;
1105 memcpy(&emu_bits
, vdev
->emulated_config_bits
+ addr
, len
);
1106 emu_bits
= le32_to_cpu(emu_bits
);
1109 emu_val
= pci_default_read_config(pdev
, addr
, len
);
1112 if (~emu_bits
& (0xffffffffU
>> (32 - len
* 8))) {
1115 ret
= pread(vdev
->vbasedev
.fd
, &phys_val
, len
,
1116 vdev
->config_offset
+ addr
);
1118 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1119 __func__
, vdev
->vbasedev
.name
, addr
, len
);
1122 phys_val
= le32_to_cpu(phys_val
);
1125 val
= (emu_val
& emu_bits
) | (phys_val
& ~emu_bits
);
1127 trace_vfio_pci_read_config(vdev
->vbasedev
.name
, addr
, len
, val
);
1132 void vfio_pci_write_config(PCIDevice
*pdev
,
1133 uint32_t addr
, uint32_t val
, int len
)
1135 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
1136 uint32_t val_le
= cpu_to_le32(val
);
1138 trace_vfio_pci_write_config(vdev
->vbasedev
.name
, addr
, val
, len
);
1140 /* Write everything to VFIO, let it filter out what we can't write */
1141 if (pwrite(vdev
->vbasedev
.fd
, &val_le
, len
, vdev
->config_offset
+ addr
)
1143 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1144 __func__
, vdev
->vbasedev
.name
, addr
, val
, len
);
1147 /* MSI/MSI-X Enabling/Disabling */
1148 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
&&
1149 ranges_overlap(addr
, len
, pdev
->msi_cap
, vdev
->msi_cap_size
)) {
1150 int is_enabled
, was_enabled
= msi_enabled(pdev
);
1152 pci_default_write_config(pdev
, addr
, val
, len
);
1154 is_enabled
= msi_enabled(pdev
);
1158 vfio_msi_enable(vdev
);
1162 vfio_msi_disable(vdev
);
1164 vfio_update_msi(vdev
);
1167 } else if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
&&
1168 ranges_overlap(addr
, len
, pdev
->msix_cap
, MSIX_CAP_LENGTH
)) {
1169 int is_enabled
, was_enabled
= msix_enabled(pdev
);
1171 pci_default_write_config(pdev
, addr
, val
, len
);
1173 is_enabled
= msix_enabled(pdev
);
1175 if (!was_enabled
&& is_enabled
) {
1176 vfio_msix_enable(vdev
);
1177 } else if (was_enabled
&& !is_enabled
) {
1178 vfio_msix_disable(vdev
);
1180 } else if (ranges_overlap(addr
, len
, PCI_BASE_ADDRESS_0
, 24) ||
1181 range_covers_byte(addr
, len
, PCI_COMMAND
)) {
1182 pcibus_t old_addr
[PCI_NUM_REGIONS
- 1];
1185 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1186 old_addr
[bar
] = pdev
->io_regions
[bar
].addr
;
1189 pci_default_write_config(pdev
, addr
, val
, len
);
1191 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1192 if (old_addr
[bar
] != pdev
->io_regions
[bar
].addr
&&
1193 vdev
->bars
[bar
].region
.size
> 0 &&
1194 vdev
->bars
[bar
].region
.size
< qemu_real_host_page_size
) {
1195 vfio_sub_page_bar_update_mapping(pdev
, bar
);
1199 /* Write everything to QEMU to keep emulated bits correct */
1200 pci_default_write_config(pdev
, addr
, val
, len
);
1207 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
)
1210 * More complicated than it looks. Disabling MSI/X transitions the
1211 * device to INTx mode (if supported). Therefore we need to first
1212 * disable MSI/X and then cleanup by disabling INTx.
1214 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
1215 vfio_msix_disable(vdev
);
1216 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
1217 vfio_msi_disable(vdev
);
1220 if (vdev
->interrupt
== VFIO_INT_INTx
) {
1221 vfio_intx_disable(vdev
);
1225 static int vfio_msi_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1228 bool msi_64bit
, msi_maskbit
;
1232 if (pread(vdev
->vbasedev
.fd
, &ctrl
, sizeof(ctrl
),
1233 vdev
->config_offset
+ pos
+ PCI_CAP_FLAGS
) != sizeof(ctrl
)) {
1234 error_setg_errno(errp
, errno
, "failed reading MSI PCI_CAP_FLAGS");
1237 ctrl
= le16_to_cpu(ctrl
);
1239 msi_64bit
= !!(ctrl
& PCI_MSI_FLAGS_64BIT
);
1240 msi_maskbit
= !!(ctrl
& PCI_MSI_FLAGS_MASKBIT
);
1241 entries
= 1 << ((ctrl
& PCI_MSI_FLAGS_QMASK
) >> 1);
1243 trace_vfio_msi_setup(vdev
->vbasedev
.name
, pos
);
1245 ret
= msi_init(&vdev
->pdev
, pos
, entries
, msi_64bit
, msi_maskbit
, &err
);
1247 if (ret
== -ENOTSUP
) {
1250 error_propagate_prepend(errp
, err
, "msi_init failed: ");
1253 vdev
->msi_cap_size
= 0xa + (msi_maskbit
? 0xa : 0) + (msi_64bit
? 0x4 : 0);
1258 static void vfio_pci_fixup_msix_region(VFIOPCIDevice
*vdev
)
1261 VFIORegion
*region
= &vdev
->bars
[vdev
->msix
->table_bar
].region
;
1264 * If the host driver allows mapping of a MSIX data, we are going to
1265 * do map the entire BAR and emulate MSIX table on top of that.
1267 if (vfio_has_region_cap(&vdev
->vbasedev
, region
->nr
,
1268 VFIO_REGION_INFO_CAP_MSIX_MAPPABLE
)) {
1273 * We expect to find a single mmap covering the whole BAR, anything else
1274 * means it's either unsupported or already setup.
1276 if (region
->nr_mmaps
!= 1 || region
->mmaps
[0].offset
||
1277 region
->size
!= region
->mmaps
[0].size
) {
1281 /* MSI-X table start and end aligned to host page size */
1282 start
= vdev
->msix
->table_offset
& qemu_real_host_page_mask
;
1283 end
= REAL_HOST_PAGE_ALIGN((uint64_t)vdev
->msix
->table_offset
+
1284 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
));
1287 * Does the MSI-X table cover the beginning of the BAR? The whole BAR?
1288 * NB - Host page size is necessarily a power of two and so is the PCI
1289 * BAR (not counting EA yet), therefore if we have host page aligned
1290 * @start and @end, then any remainder of the BAR before or after those
1291 * must be at least host page sized and therefore mmap'able.
1294 if (end
>= region
->size
) {
1295 region
->nr_mmaps
= 0;
1296 g_free(region
->mmaps
);
1297 region
->mmaps
= NULL
;
1298 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1299 vdev
->msix
->table_bar
, 0, 0);
1301 region
->mmaps
[0].offset
= end
;
1302 region
->mmaps
[0].size
= region
->size
- end
;
1303 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1304 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1305 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1308 /* Maybe it's aligned at the end of the BAR */
1309 } else if (end
>= region
->size
) {
1310 region
->mmaps
[0].size
= start
;
1311 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1312 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1313 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1315 /* Otherwise it must split the BAR */
1317 region
->nr_mmaps
= 2;
1318 region
->mmaps
= g_renew(VFIOMmap
, region
->mmaps
, 2);
1320 memcpy(®ion
->mmaps
[1], ®ion
->mmaps
[0], sizeof(VFIOMmap
));
1322 region
->mmaps
[0].size
= start
;
1323 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1324 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1325 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1327 region
->mmaps
[1].offset
= end
;
1328 region
->mmaps
[1].size
= region
->size
- end
;
1329 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1330 vdev
->msix
->table_bar
, region
->mmaps
[1].offset
,
1331 region
->mmaps
[1].offset
+ region
->mmaps
[1].size
);
1335 static void vfio_pci_relocate_msix(VFIOPCIDevice
*vdev
, Error
**errp
)
1337 int target_bar
= -1;
1340 if (!vdev
->msix
|| vdev
->msix_relo
== OFF_AUTOPCIBAR_OFF
) {
1344 /* The actual minimum size of MSI-X structures */
1345 msix_sz
= (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
) +
1346 (QEMU_ALIGN_UP(vdev
->msix
->entries
, 64) / 8);
1347 /* Round up to host pages, we don't want to share a page */
1348 msix_sz
= REAL_HOST_PAGE_ALIGN(msix_sz
);
1349 /* PCI BARs must be a power of 2 */
1350 msix_sz
= pow2ceil(msix_sz
);
1352 if (vdev
->msix_relo
== OFF_AUTOPCIBAR_AUTO
) {
1354 * TODO: Lookup table for known devices.
1356 * Logically we might use an algorithm here to select the BAR adding
1357 * the least additional MMIO space, but we cannot programatically
1358 * predict the driver dependency on BAR ordering or sizing, therefore
1359 * 'auto' becomes a lookup for combinations reported to work.
1361 if (target_bar
< 0) {
1362 error_setg(errp
, "No automatic MSI-X relocation available for "
1363 "device %04x:%04x", vdev
->vendor_id
, vdev
->device_id
);
1367 target_bar
= (int)(vdev
->msix_relo
- OFF_AUTOPCIBAR_BAR0
);
1370 /* I/O port BARs cannot host MSI-X structures */
1371 if (vdev
->bars
[target_bar
].ioport
) {
1372 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1373 "I/O port BAR", target_bar
);
1377 /* Cannot use a BAR in the "shadow" of a 64-bit BAR */
1378 if (!vdev
->bars
[target_bar
].size
&&
1379 target_bar
> 0 && vdev
->bars
[target_bar
- 1].mem64
) {
1380 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1381 "consumed by 64-bit BAR %d", target_bar
, target_bar
- 1);
1385 /* 2GB max size for 32-bit BARs, cannot double if already > 1G */
1386 if (vdev
->bars
[target_bar
].size
> 1 * GiB
&&
1387 !vdev
->bars
[target_bar
].mem64
) {
1388 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1389 "no space to extend 32-bit BAR", target_bar
);
1394 * If adding a new BAR, test if we can make it 64bit. We make it
1395 * prefetchable since QEMU MSI-X emulation has no read side effects
1396 * and doing so makes mapping more flexible.
1398 if (!vdev
->bars
[target_bar
].size
) {
1399 if (target_bar
< (PCI_ROM_SLOT
- 1) &&
1400 !vdev
->bars
[target_bar
+ 1].size
) {
1401 vdev
->bars
[target_bar
].mem64
= true;
1402 vdev
->bars
[target_bar
].type
= PCI_BASE_ADDRESS_MEM_TYPE_64
;
1404 vdev
->bars
[target_bar
].type
|= PCI_BASE_ADDRESS_MEM_PREFETCH
;
1405 vdev
->bars
[target_bar
].size
= msix_sz
;
1406 vdev
->msix
->table_offset
= 0;
1408 vdev
->bars
[target_bar
].size
= MAX(vdev
->bars
[target_bar
].size
* 2,
1411 * Due to above size calc, MSI-X always starts halfway into the BAR,
1412 * which will always be a separate host page.
1414 vdev
->msix
->table_offset
= vdev
->bars
[target_bar
].size
/ 2;
1417 vdev
->msix
->table_bar
= target_bar
;
1418 vdev
->msix
->pba_bar
= target_bar
;
1419 /* Requires 8-byte alignment, but PCI_MSIX_ENTRY_SIZE guarantees that */
1420 vdev
->msix
->pba_offset
= vdev
->msix
->table_offset
+
1421 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
);
1423 trace_vfio_msix_relo(vdev
->vbasedev
.name
,
1424 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
);
1428 * We don't have any control over how pci_add_capability() inserts
1429 * capabilities into the chain. In order to setup MSI-X we need a
1430 * MemoryRegion for the BAR. In order to setup the BAR and not
1431 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1432 * need to first look for where the MSI-X table lives. So we
1433 * unfortunately split MSI-X setup across two functions.
1435 static void vfio_msix_early_setup(VFIOPCIDevice
*vdev
, Error
**errp
)
1439 uint32_t table
, pba
;
1440 int fd
= vdev
->vbasedev
.fd
;
1443 pos
= pci_find_capability(&vdev
->pdev
, PCI_CAP_ID_MSIX
);
1448 if (pread(fd
, &ctrl
, sizeof(ctrl
),
1449 vdev
->config_offset
+ pos
+ PCI_MSIX_FLAGS
) != sizeof(ctrl
)) {
1450 error_setg_errno(errp
, errno
, "failed to read PCI MSIX FLAGS");
1454 if (pread(fd
, &table
, sizeof(table
),
1455 vdev
->config_offset
+ pos
+ PCI_MSIX_TABLE
) != sizeof(table
)) {
1456 error_setg_errno(errp
, errno
, "failed to read PCI MSIX TABLE");
1460 if (pread(fd
, &pba
, sizeof(pba
),
1461 vdev
->config_offset
+ pos
+ PCI_MSIX_PBA
) != sizeof(pba
)) {
1462 error_setg_errno(errp
, errno
, "failed to read PCI MSIX PBA");
1466 ctrl
= le16_to_cpu(ctrl
);
1467 table
= le32_to_cpu(table
);
1468 pba
= le32_to_cpu(pba
);
1470 msix
= g_malloc0(sizeof(*msix
));
1471 msix
->table_bar
= table
& PCI_MSIX_FLAGS_BIRMASK
;
1472 msix
->table_offset
= table
& ~PCI_MSIX_FLAGS_BIRMASK
;
1473 msix
->pba_bar
= pba
& PCI_MSIX_FLAGS_BIRMASK
;
1474 msix
->pba_offset
= pba
& ~PCI_MSIX_FLAGS_BIRMASK
;
1475 msix
->entries
= (ctrl
& PCI_MSIX_FLAGS_QSIZE
) + 1;
1478 * Test the size of the pba_offset variable and catch if it extends outside
1479 * of the specified BAR. If it is the case, we need to apply a hardware
1480 * specific quirk if the device is known or we have a broken configuration.
1482 if (msix
->pba_offset
>= vdev
->bars
[msix
->pba_bar
].region
.size
) {
1484 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1485 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1486 * the VF PBA offset while the BAR itself is only 8k. The correct value
1487 * is 0x1000, so we hard code that here.
1489 if (vdev
->vendor_id
== PCI_VENDOR_ID_CHELSIO
&&
1490 (vdev
->device_id
& 0xff00) == 0x5800) {
1491 msix
->pba_offset
= 0x1000;
1492 } else if (vdev
->msix_relo
== OFF_AUTOPCIBAR_OFF
) {
1493 error_setg(errp
, "hardware reports invalid configuration, "
1494 "MSIX PBA outside of specified BAR");
1500 trace_vfio_msix_early_setup(vdev
->vbasedev
.name
, pos
, msix
->table_bar
,
1501 msix
->table_offset
, msix
->entries
);
1504 vfio_pci_fixup_msix_region(vdev
);
1506 vfio_pci_relocate_msix(vdev
, errp
);
1509 static int vfio_msix_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1514 vdev
->msix
->pending
= g_malloc0(BITS_TO_LONGS(vdev
->msix
->entries
) *
1515 sizeof(unsigned long));
1516 ret
= msix_init(&vdev
->pdev
, vdev
->msix
->entries
,
1517 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1518 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
,
1519 vdev
->bars
[vdev
->msix
->pba_bar
].mr
,
1520 vdev
->msix
->pba_bar
, vdev
->msix
->pba_offset
, pos
,
1523 if (ret
== -ENOTSUP
) {
1524 warn_report_err(err
);
1528 error_propagate(errp
, err
);
1533 * The PCI spec suggests that devices provide additional alignment for
1534 * MSI-X structures and avoid overlapping non-MSI-X related registers.
1535 * For an assigned device, this hopefully means that emulation of MSI-X
1536 * structures does not affect the performance of the device. If devices
1537 * fail to provide that alignment, a significant performance penalty may
1538 * result, for instance Mellanox MT27500 VFs:
1539 * http://www.spinics.net/lists/kvm/msg125881.html
1541 * The PBA is simply not that important for such a serious regression and
1542 * most drivers do not appear to look at it. The solution for this is to
1543 * disable the PBA MemoryRegion unless it's being used. We disable it
1544 * here and only enable it if a masked vector fires through QEMU. As the
1545 * vector-use notifier is called, which occurs on unmask, we test whether
1546 * PBA emulation is needed and again disable if not.
1548 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
1551 * The emulated machine may provide a paravirt interface for MSIX setup
1552 * so it is not strictly necessary to emulate MSIX here. This becomes
1553 * helpful when frequently accessed MMIO registers are located in
1554 * subpages adjacent to the MSIX table but the MSIX data containing page
1555 * cannot be mapped because of a host page size bigger than the MSIX table
1558 if (object_property_get_bool(OBJECT(qdev_get_machine()),
1559 "vfio-no-msix-emulation", NULL
)) {
1560 memory_region_set_enabled(&vdev
->pdev
.msix_table_mmio
, false);
1566 static void vfio_teardown_msi(VFIOPCIDevice
*vdev
)
1568 msi_uninit(&vdev
->pdev
);
1571 msix_uninit(&vdev
->pdev
,
1572 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1573 vdev
->bars
[vdev
->msix
->pba_bar
].mr
);
1574 g_free(vdev
->msix
->pending
);
1581 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
)
1585 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1586 vfio_region_mmaps_set_enabled(&vdev
->bars
[i
].region
, enabled
);
1590 static void vfio_bar_prepare(VFIOPCIDevice
*vdev
, int nr
)
1592 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1597 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1598 if (!bar
->region
.size
) {
1602 /* Determine what type of BAR this is for registration */
1603 ret
= pread(vdev
->vbasedev
.fd
, &pci_bar
, sizeof(pci_bar
),
1604 vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
));
1605 if (ret
!= sizeof(pci_bar
)) {
1606 error_report("vfio: Failed to read BAR %d (%m)", nr
);
1610 pci_bar
= le32_to_cpu(pci_bar
);
1611 bar
->ioport
= (pci_bar
& PCI_BASE_ADDRESS_SPACE_IO
);
1612 bar
->mem64
= bar
->ioport
? 0 : (pci_bar
& PCI_BASE_ADDRESS_MEM_TYPE_64
);
1613 bar
->type
= pci_bar
& (bar
->ioport
? ~PCI_BASE_ADDRESS_IO_MASK
:
1614 ~PCI_BASE_ADDRESS_MEM_MASK
);
1615 bar
->size
= bar
->region
.size
;
1618 static void vfio_bars_prepare(VFIOPCIDevice
*vdev
)
1622 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1623 vfio_bar_prepare(vdev
, i
);
1627 static void vfio_bar_register(VFIOPCIDevice
*vdev
, int nr
)
1629 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1636 bar
->mr
= g_new0(MemoryRegion
, 1);
1637 name
= g_strdup_printf("%s base BAR %d", vdev
->vbasedev
.name
, nr
);
1638 memory_region_init_io(bar
->mr
, OBJECT(vdev
), NULL
, NULL
, name
, bar
->size
);
1641 if (bar
->region
.size
) {
1642 memory_region_add_subregion(bar
->mr
, 0, bar
->region
.mem
);
1644 if (vfio_region_mmap(&bar
->region
)) {
1645 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1646 vdev
->vbasedev
.name
, nr
);
1650 pci_register_bar(&vdev
->pdev
, nr
, bar
->type
, bar
->mr
);
1653 static void vfio_bars_register(VFIOPCIDevice
*vdev
)
1657 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1658 vfio_bar_register(vdev
, i
);
1662 static void vfio_bars_exit(VFIOPCIDevice
*vdev
)
1666 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1667 VFIOBAR
*bar
= &vdev
->bars
[i
];
1669 vfio_bar_quirk_exit(vdev
, i
);
1670 vfio_region_exit(&bar
->region
);
1671 if (bar
->region
.size
) {
1672 memory_region_del_subregion(bar
->mr
, bar
->region
.mem
);
1677 pci_unregister_vga(&vdev
->pdev
);
1678 vfio_vga_quirk_exit(vdev
);
1682 static void vfio_bars_finalize(VFIOPCIDevice
*vdev
)
1686 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1687 VFIOBAR
*bar
= &vdev
->bars
[i
];
1689 vfio_bar_quirk_finalize(vdev
, i
);
1690 vfio_region_finalize(&bar
->region
);
1692 object_unparent(OBJECT(bar
->mr
));
1698 vfio_vga_quirk_finalize(vdev
);
1699 for (i
= 0; i
< ARRAY_SIZE(vdev
->vga
->region
); i
++) {
1700 object_unparent(OBJECT(&vdev
->vga
->region
[i
].mem
));
1709 static uint8_t vfio_std_cap_max_size(PCIDevice
*pdev
, uint8_t pos
)
1712 uint16_t next
= PCI_CONFIG_SPACE_SIZE
;
1714 for (tmp
= pdev
->config
[PCI_CAPABILITY_LIST
]; tmp
;
1715 tmp
= pdev
->config
[tmp
+ PCI_CAP_LIST_NEXT
]) {
1716 if (tmp
> pos
&& tmp
< next
) {
1725 static uint16_t vfio_ext_cap_max_size(const uint8_t *config
, uint16_t pos
)
1727 uint16_t tmp
, next
= PCIE_CONFIG_SPACE_SIZE
;
1729 for (tmp
= PCI_CONFIG_SPACE_SIZE
; tmp
;
1730 tmp
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ tmp
))) {
1731 if (tmp
> pos
&& tmp
< next
) {
1739 static void vfio_set_word_bits(uint8_t *buf
, uint16_t val
, uint16_t mask
)
1741 pci_set_word(buf
, (pci_get_word(buf
) & ~mask
) | val
);
1744 static void vfio_add_emulated_word(VFIOPCIDevice
*vdev
, int pos
,
1745 uint16_t val
, uint16_t mask
)
1747 vfio_set_word_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1748 vfio_set_word_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1749 vfio_set_word_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1752 static void vfio_set_long_bits(uint8_t *buf
, uint32_t val
, uint32_t mask
)
1754 pci_set_long(buf
, (pci_get_long(buf
) & ~mask
) | val
);
1757 static void vfio_add_emulated_long(VFIOPCIDevice
*vdev
, int pos
,
1758 uint32_t val
, uint32_t mask
)
1760 vfio_set_long_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1761 vfio_set_long_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1762 vfio_set_long_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1765 static int vfio_setup_pcie_cap(VFIOPCIDevice
*vdev
, int pos
, uint8_t size
,
1771 flags
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_CAP_FLAGS
);
1772 type
= (flags
& PCI_EXP_FLAGS_TYPE
) >> 4;
1774 if (type
!= PCI_EXP_TYPE_ENDPOINT
&&
1775 type
!= PCI_EXP_TYPE_LEG_END
&&
1776 type
!= PCI_EXP_TYPE_RC_END
) {
1778 error_setg(errp
, "assignment of PCIe type 0x%x "
1779 "devices is not currently supported", type
);
1783 if (!pci_bus_is_express(pci_get_bus(&vdev
->pdev
))) {
1784 PCIBus
*bus
= pci_get_bus(&vdev
->pdev
);
1788 * Traditionally PCI device assignment exposes the PCIe capability
1789 * as-is on non-express buses. The reason being that some drivers
1790 * simply assume that it's there, for example tg3. However when
1791 * we're running on a native PCIe machine type, like Q35, we need
1792 * to hide the PCIe capability. The reason for this is twofold;
1793 * first Windows guests get a Code 10 error when the PCIe capability
1794 * is exposed in this configuration. Therefore express devices won't
1795 * work at all unless they're attached to express buses in the VM.
1796 * Second, a native PCIe machine introduces the possibility of fine
1797 * granularity IOMMUs supporting both translation and isolation.
1798 * Guest code to discover the IOMMU visibility of a device, such as
1799 * IOMMU grouping code on Linux, is very aware of device types and
1800 * valid transitions between bus types. An express device on a non-
1801 * express bus is not a valid combination on bare metal systems.
1803 * Drivers that require a PCIe capability to make the device
1804 * functional are simply going to need to have their devices placed
1805 * on a PCIe bus in the VM.
1807 while (!pci_bus_is_root(bus
)) {
1808 bridge
= pci_bridge_get_device(bus
);
1809 bus
= pci_get_bus(bridge
);
1812 if (pci_bus_is_express(bus
)) {
1816 } else if (pci_bus_is_root(pci_get_bus(&vdev
->pdev
))) {
1818 * On a Root Complex bus Endpoints become Root Complex Integrated
1819 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1821 if (type
== PCI_EXP_TYPE_ENDPOINT
) {
1822 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1823 PCI_EXP_TYPE_RC_END
<< 4,
1824 PCI_EXP_FLAGS_TYPE
);
1826 /* Link Capabilities, Status, and Control goes away */
1827 if (size
> PCI_EXP_LNKCTL
) {
1828 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
, 0, ~0);
1829 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1830 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
, 0, ~0);
1832 #ifndef PCI_EXP_LNKCAP2
1833 #define PCI_EXP_LNKCAP2 44
1835 #ifndef PCI_EXP_LNKSTA2
1836 #define PCI_EXP_LNKSTA2 50
1838 /* Link 2 Capabilities, Status, and Control goes away */
1839 if (size
> PCI_EXP_LNKCAP2
) {
1840 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP2
, 0, ~0);
1841 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL2
, 0, ~0);
1842 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA2
, 0, ~0);
1846 } else if (type
== PCI_EXP_TYPE_LEG_END
) {
1848 * Legacy endpoints don't belong on the root complex. Windows
1849 * seems to be happier with devices if we skip the capability.
1856 * Convert Root Complex Integrated Endpoints to regular endpoints.
1857 * These devices don't support LNK/LNK2 capabilities, so make them up.
1859 if (type
== PCI_EXP_TYPE_RC_END
) {
1860 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1861 PCI_EXP_TYPE_ENDPOINT
<< 4,
1862 PCI_EXP_FLAGS_TYPE
);
1863 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
,
1864 QEMU_PCI_EXP_LNKCAP_MLW(QEMU_PCI_EXP_LNK_X1
) |
1865 QEMU_PCI_EXP_LNKCAP_MLS(QEMU_PCI_EXP_LNK_2_5GT
), ~0);
1866 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1871 * Intel 82599 SR-IOV VFs report an invalid PCIe capability version 0
1872 * (Niantic errate #35) causing Windows to error with a Code 10 for the
1873 * device on Q35. Fixup any such devices to report version 1. If we
1874 * were to remove the capability entirely the guest would lose extended
1877 if ((flags
& PCI_EXP_FLAGS_VERS
) == 0) {
1878 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1879 1, PCI_EXP_FLAGS_VERS
);
1882 pos
= pci_add_capability(&vdev
->pdev
, PCI_CAP_ID_EXP
, pos
, size
,
1888 vdev
->pdev
.exp
.exp_cap
= pos
;
1893 static void vfio_check_pcie_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1895 uint32_t cap
= pci_get_long(vdev
->pdev
.config
+ pos
+ PCI_EXP_DEVCAP
);
1897 if (cap
& PCI_EXP_DEVCAP_FLR
) {
1898 trace_vfio_check_pcie_flr(vdev
->vbasedev
.name
);
1899 vdev
->has_flr
= true;
1903 static void vfio_check_pm_reset(VFIOPCIDevice
*vdev
, uint8_t pos
)
1905 uint16_t csr
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_PM_CTRL
);
1907 if (!(csr
& PCI_PM_CTRL_NO_SOFT_RESET
)) {
1908 trace_vfio_check_pm_reset(vdev
->vbasedev
.name
);
1909 vdev
->has_pm_reset
= true;
1913 static void vfio_check_af_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1915 uint8_t cap
= pci_get_byte(vdev
->pdev
.config
+ pos
+ PCI_AF_CAP
);
1917 if ((cap
& PCI_AF_CAP_TP
) && (cap
& PCI_AF_CAP_FLR
)) {
1918 trace_vfio_check_af_flr(vdev
->vbasedev
.name
);
1919 vdev
->has_flr
= true;
1923 static int vfio_add_std_cap(VFIOPCIDevice
*vdev
, uint8_t pos
, Error
**errp
)
1925 PCIDevice
*pdev
= &vdev
->pdev
;
1926 uint8_t cap_id
, next
, size
;
1929 cap_id
= pdev
->config
[pos
];
1930 next
= pdev
->config
[pos
+ PCI_CAP_LIST_NEXT
];
1933 * If it becomes important to configure capabilities to their actual
1934 * size, use this as the default when it's something we don't recognize.
1935 * Since QEMU doesn't actually handle many of the config accesses,
1936 * exact size doesn't seem worthwhile.
1938 size
= vfio_std_cap_max_size(pdev
, pos
);
1941 * pci_add_capability always inserts the new capability at the head
1942 * of the chain. Therefore to end up with a chain that matches the
1943 * physical device, we insert from the end by making this recursive.
1944 * This is also why we pre-calculate size above as cached config space
1945 * will be changed as we unwind the stack.
1948 ret
= vfio_add_std_cap(vdev
, next
, errp
);
1953 /* Begin the rebuild, use QEMU emulated list bits */
1954 pdev
->config
[PCI_CAPABILITY_LIST
] = 0;
1955 vdev
->emulated_config_bits
[PCI_CAPABILITY_LIST
] = 0xff;
1956 vdev
->emulated_config_bits
[PCI_STATUS
] |= PCI_STATUS_CAP_LIST
;
1958 ret
= vfio_add_virt_caps(vdev
, errp
);
1964 /* Scale down size, esp in case virt caps were added above */
1965 size
= MIN(size
, vfio_std_cap_max_size(pdev
, pos
));
1967 /* Use emulated next pointer to allow dropping caps */
1968 pci_set_byte(vdev
->emulated_config_bits
+ pos
+ PCI_CAP_LIST_NEXT
, 0xff);
1971 case PCI_CAP_ID_MSI
:
1972 ret
= vfio_msi_setup(vdev
, pos
, errp
);
1974 case PCI_CAP_ID_EXP
:
1975 vfio_check_pcie_flr(vdev
, pos
);
1976 ret
= vfio_setup_pcie_cap(vdev
, pos
, size
, errp
);
1978 case PCI_CAP_ID_MSIX
:
1979 ret
= vfio_msix_setup(vdev
, pos
, errp
);
1982 vfio_check_pm_reset(vdev
, pos
);
1984 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1987 vfio_check_af_flr(vdev
, pos
);
1988 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1991 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
1997 "failed to add PCI capability 0x%x[0x%x]@0x%x: ",
2005 static void vfio_add_ext_cap(VFIOPCIDevice
*vdev
)
2007 PCIDevice
*pdev
= &vdev
->pdev
;
2009 uint16_t cap_id
, next
, size
;
2013 /* Only add extended caps if we have them and the guest can see them */
2014 if (!pci_is_express(pdev
) || !pci_bus_is_express(pci_get_bus(pdev
)) ||
2015 !pci_get_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
)) {
2020 * pcie_add_capability always inserts the new capability at the tail
2021 * of the chain. Therefore to end up with a chain that matches the
2022 * physical device, we cache the config space to avoid overwriting
2023 * the original config space when we parse the extended capabilities.
2025 config
= g_memdup(pdev
->config
, vdev
->config_size
);
2028 * Extended capabilities are chained with each pointing to the next, so we
2029 * can drop anything other than the head of the chain simply by modifying
2030 * the previous next pointer. Seed the head of the chain here such that
2031 * we can simply skip any capabilities we want to drop below, regardless
2032 * of their position in the chain. If this stub capability still exists
2033 * after we add the capabilities we want to expose, update the capability
2034 * ID to zero. Note that we cannot seed with the capability header being
2035 * zero as this conflicts with definition of an absent capability chain
2036 * and prevents capabilities beyond the head of the list from being added.
2037 * By replacing the dummy capability ID with zero after walking the device
2038 * chain, we also transparently mark extended capabilities as absent if
2039 * no capabilities were added. Note that the PCIe spec defines an absence
2040 * of extended capabilities to be determined by a value of zero for the
2041 * capability ID, version, AND next pointer. A non-zero next pointer
2042 * should be sufficient to indicate additional capabilities are present,
2043 * which will occur if we call pcie_add_capability() below. The entire
2044 * first dword is emulated to support this.
2046 * NB. The kernel side does similar masking, so be prepared that our
2047 * view of the device may also contain a capability ID zero in the head
2048 * of the chain. Skip it for the same reason that we cannot seed the
2049 * chain with a zero capability.
2051 pci_set_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
,
2052 PCI_EXT_CAP(0xFFFF, 0, 0));
2053 pci_set_long(pdev
->wmask
+ PCI_CONFIG_SPACE_SIZE
, 0);
2054 pci_set_long(vdev
->emulated_config_bits
+ PCI_CONFIG_SPACE_SIZE
, ~0);
2056 for (next
= PCI_CONFIG_SPACE_SIZE
; next
;
2057 next
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ next
))) {
2058 header
= pci_get_long(config
+ next
);
2059 cap_id
= PCI_EXT_CAP_ID(header
);
2060 cap_ver
= PCI_EXT_CAP_VER(header
);
2063 * If it becomes important to configure extended capabilities to their
2064 * actual size, use this as the default when it's something we don't
2065 * recognize. Since QEMU doesn't actually handle many of the config
2066 * accesses, exact size doesn't seem worthwhile.
2068 size
= vfio_ext_cap_max_size(config
, next
);
2070 /* Use emulated next pointer to allow dropping extended caps */
2071 pci_long_test_and_set_mask(vdev
->emulated_config_bits
+ next
,
2072 PCI_EXT_CAP_NEXT_MASK
);
2075 case 0: /* kernel masked capability */
2076 case PCI_EXT_CAP_ID_SRIOV
: /* Read-only VF BARs confuse OVMF */
2077 case PCI_EXT_CAP_ID_ARI
: /* XXX Needs next function virtualization */
2078 case PCI_EXT_CAP_ID_REBAR
: /* Can't expose read-only */
2079 trace_vfio_add_ext_cap_dropped(vdev
->vbasedev
.name
, cap_id
, next
);
2082 pcie_add_capability(pdev
, cap_id
, cap_ver
, next
, size
);
2087 /* Cleanup chain head ID if necessary */
2088 if (pci_get_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
) == 0xFFFF) {
2089 pci_set_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
, 0);
2096 static int vfio_add_capabilities(VFIOPCIDevice
*vdev
, Error
**errp
)
2098 PCIDevice
*pdev
= &vdev
->pdev
;
2101 if (!(pdev
->config
[PCI_STATUS
] & PCI_STATUS_CAP_LIST
) ||
2102 !pdev
->config
[PCI_CAPABILITY_LIST
]) {
2103 return 0; /* Nothing to add */
2106 ret
= vfio_add_std_cap(vdev
, pdev
->config
[PCI_CAPABILITY_LIST
], errp
);
2111 vfio_add_ext_cap(vdev
);
2115 static void vfio_pci_pre_reset(VFIOPCIDevice
*vdev
)
2117 PCIDevice
*pdev
= &vdev
->pdev
;
2120 vfio_disable_interrupts(vdev
);
2122 /* Make sure the device is in D0 */
2127 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2128 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2130 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
2131 vfio_pci_write_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, pmcsr
, 2);
2132 /* vfio handles the necessary delay here */
2133 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2134 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2136 error_report("vfio: Unable to power on device, stuck in D%d",
2143 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
2144 * Also put INTx Disable in known state.
2146 cmd
= vfio_pci_read_config(pdev
, PCI_COMMAND
, 2);
2147 cmd
&= ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
2148 PCI_COMMAND_INTX_DISABLE
);
2149 vfio_pci_write_config(pdev
, PCI_COMMAND
, cmd
, 2);
2152 static void vfio_pci_post_reset(VFIOPCIDevice
*vdev
)
2157 vfio_intx_enable(vdev
, &err
);
2159 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2162 for (nr
= 0; nr
< PCI_NUM_REGIONS
- 1; ++nr
) {
2163 off_t addr
= vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
);
2165 uint32_t len
= sizeof(val
);
2167 if (pwrite(vdev
->vbasedev
.fd
, &val
, len
, addr
) != len
) {
2168 error_report("%s(%s) reset bar %d failed: %m", __func__
,
2169 vdev
->vbasedev
.name
, nr
);
2173 vfio_quirk_reset(vdev
);
2176 static bool vfio_pci_host_match(PCIHostDeviceAddress
*addr
, const char *name
)
2180 sprintf(tmp
, "%04x:%02x:%02x.%1x", addr
->domain
,
2181 addr
->bus
, addr
->slot
, addr
->function
);
2183 return (strcmp(tmp
, name
) == 0);
2186 static int vfio_pci_hot_reset(VFIOPCIDevice
*vdev
, bool single
)
2189 struct vfio_pci_hot_reset_info
*info
;
2190 struct vfio_pci_dependent_device
*devices
;
2191 struct vfio_pci_hot_reset
*reset
;
2196 trace_vfio_pci_hot_reset(vdev
->vbasedev
.name
, single
? "one" : "multi");
2199 vfio_pci_pre_reset(vdev
);
2201 vdev
->vbasedev
.needs_reset
= false;
2203 info
= g_malloc0(sizeof(*info
));
2204 info
->argsz
= sizeof(*info
);
2206 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2207 if (ret
&& errno
!= ENOSPC
) {
2209 if (!vdev
->has_pm_reset
) {
2210 error_report("vfio: Cannot reset device %s, "
2211 "no available reset mechanism.", vdev
->vbasedev
.name
);
2216 count
= info
->count
;
2217 info
= g_realloc(info
, sizeof(*info
) + (count
* sizeof(*devices
)));
2218 info
->argsz
= sizeof(*info
) + (count
* sizeof(*devices
));
2219 devices
= &info
->devices
[0];
2221 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2224 error_report("vfio: hot reset info failed: %m");
2228 trace_vfio_pci_hot_reset_has_dep_devices(vdev
->vbasedev
.name
);
2230 /* Verify that we have all the groups required */
2231 for (i
= 0; i
< info
->count
; i
++) {
2232 PCIHostDeviceAddress host
;
2234 VFIODevice
*vbasedev_iter
;
2236 host
.domain
= devices
[i
].segment
;
2237 host
.bus
= devices
[i
].bus
;
2238 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2239 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2241 trace_vfio_pci_hot_reset_dep_devices(host
.domain
,
2242 host
.bus
, host
.slot
, host
.function
, devices
[i
].group_id
);
2244 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2248 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2249 if (group
->groupid
== devices
[i
].group_id
) {
2255 if (!vdev
->has_pm_reset
) {
2256 error_report("vfio: Cannot reset device %s, "
2257 "depends on group %d which is not owned.",
2258 vdev
->vbasedev
.name
, devices
[i
].group_id
);
2264 /* Prep dependent devices for reset and clear our marker. */
2265 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2266 if (!vbasedev_iter
->dev
->realized
||
2267 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2270 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2271 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2276 vfio_pci_pre_reset(tmp
);
2277 tmp
->vbasedev
.needs_reset
= false;
2284 if (!single
&& !multi
) {
2289 /* Determine how many group fds need to be passed */
2291 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2292 for (i
= 0; i
< info
->count
; i
++) {
2293 if (group
->groupid
== devices
[i
].group_id
) {
2300 reset
= g_malloc0(sizeof(*reset
) + (count
* sizeof(*fds
)));
2301 reset
->argsz
= sizeof(*reset
) + (count
* sizeof(*fds
));
2302 fds
= &reset
->group_fds
[0];
2304 /* Fill in group fds */
2305 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2306 for (i
= 0; i
< info
->count
; i
++) {
2307 if (group
->groupid
== devices
[i
].group_id
) {
2308 fds
[reset
->count
++] = group
->fd
;
2315 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_PCI_HOT_RESET
, reset
);
2318 trace_vfio_pci_hot_reset_result(vdev
->vbasedev
.name
,
2319 ret
? "%m" : "Success");
2322 /* Re-enable INTx on affected devices */
2323 for (i
= 0; i
< info
->count
; i
++) {
2324 PCIHostDeviceAddress host
;
2326 VFIODevice
*vbasedev_iter
;
2328 host
.domain
= devices
[i
].segment
;
2329 host
.bus
= devices
[i
].bus
;
2330 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2331 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2333 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2337 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2338 if (group
->groupid
== devices
[i
].group_id
) {
2347 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2348 if (!vbasedev_iter
->dev
->realized
||
2349 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2352 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2353 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2354 vfio_pci_post_reset(tmp
);
2361 vfio_pci_post_reset(vdev
);
2369 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
2370 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
2371 * of doing hot resets when there is only a single device per bus. The in-use
2372 * here refers to how many VFIODevices are affected. A hot reset that affects
2373 * multiple devices, but only a single in-use device, means that we can call
2374 * it from our bus ->reset() callback since the extent is effectively a single
2375 * device. This allows us to make use of it in the hotplug path. When there
2376 * are multiple in-use devices, we can only trigger the hot reset during a
2377 * system reset and thus from our reset handler. We separate _one vs _multi
2378 * here so that we don't overlap and do a double reset on the system reset
2379 * path where both our reset handler and ->reset() callback are used. Calling
2380 * _one() will only do a hot reset for the one in-use devices case, calling
2381 * _multi() will do nothing if a _one() would have been sufficient.
2383 static int vfio_pci_hot_reset_one(VFIOPCIDevice
*vdev
)
2385 return vfio_pci_hot_reset(vdev
, true);
2388 static int vfio_pci_hot_reset_multi(VFIODevice
*vbasedev
)
2390 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2391 return vfio_pci_hot_reset(vdev
, false);
2394 static void vfio_pci_compute_needs_reset(VFIODevice
*vbasedev
)
2396 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2397 if (!vbasedev
->reset_works
|| (!vdev
->has_flr
&& vdev
->has_pm_reset
)) {
2398 vbasedev
->needs_reset
= true;
2402 static VFIODeviceOps vfio_pci_ops
= {
2403 .vfio_compute_needs_reset
= vfio_pci_compute_needs_reset
,
2404 .vfio_hot_reset_multi
= vfio_pci_hot_reset_multi
,
2405 .vfio_eoi
= vfio_intx_eoi
,
2408 int vfio_populate_vga(VFIOPCIDevice
*vdev
, Error
**errp
)
2410 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2411 struct vfio_region_info
*reg_info
;
2414 ret
= vfio_get_region_info(vbasedev
, VFIO_PCI_VGA_REGION_INDEX
, ®_info
);
2416 error_setg_errno(errp
, -ret
,
2417 "failed getting region info for VGA region index %d",
2418 VFIO_PCI_VGA_REGION_INDEX
);
2422 if (!(reg_info
->flags
& VFIO_REGION_INFO_FLAG_READ
) ||
2423 !(reg_info
->flags
& VFIO_REGION_INFO_FLAG_WRITE
) ||
2424 reg_info
->size
< 0xbffff + 1) {
2425 error_setg(errp
, "unexpected VGA info, flags 0x%lx, size 0x%lx",
2426 (unsigned long)reg_info
->flags
,
2427 (unsigned long)reg_info
->size
);
2432 vdev
->vga
= g_new0(VFIOVGA
, 1);
2434 vdev
->vga
->fd_offset
= reg_info
->offset
;
2435 vdev
->vga
->fd
= vdev
->vbasedev
.fd
;
2439 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].offset
= QEMU_PCI_VGA_MEM_BASE
;
2440 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].nr
= QEMU_PCI_VGA_MEM
;
2441 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].quirks
);
2443 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2444 OBJECT(vdev
), &vfio_vga_ops
,
2445 &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
],
2446 "vfio-vga-mmio@0xa0000",
2447 QEMU_PCI_VGA_MEM_SIZE
);
2449 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].offset
= QEMU_PCI_VGA_IO_LO_BASE
;
2450 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].nr
= QEMU_PCI_VGA_IO_LO
;
2451 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].quirks
);
2453 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2454 OBJECT(vdev
), &vfio_vga_ops
,
2455 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
],
2456 "vfio-vga-io@0x3b0",
2457 QEMU_PCI_VGA_IO_LO_SIZE
);
2459 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].offset
= QEMU_PCI_VGA_IO_HI_BASE
;
2460 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].nr
= QEMU_PCI_VGA_IO_HI
;
2461 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].quirks
);
2463 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
,
2464 OBJECT(vdev
), &vfio_vga_ops
,
2465 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
],
2466 "vfio-vga-io@0x3c0",
2467 QEMU_PCI_VGA_IO_HI_SIZE
);
2469 pci_register_vga(&vdev
->pdev
, &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2470 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2471 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
);
2476 static void vfio_populate_device(VFIOPCIDevice
*vdev
, Error
**errp
)
2478 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2479 struct vfio_region_info
*reg_info
;
2480 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
) };
2483 /* Sanity check device */
2484 if (!(vbasedev
->flags
& VFIO_DEVICE_FLAGS_PCI
)) {
2485 error_setg(errp
, "this isn't a PCI device");
2489 if (vbasedev
->num_regions
< VFIO_PCI_CONFIG_REGION_INDEX
+ 1) {
2490 error_setg(errp
, "unexpected number of io regions %u",
2491 vbasedev
->num_regions
);
2495 if (vbasedev
->num_irqs
< VFIO_PCI_MSIX_IRQ_INDEX
+ 1) {
2496 error_setg(errp
, "unexpected number of irqs %u", vbasedev
->num_irqs
);
2500 for (i
= VFIO_PCI_BAR0_REGION_INDEX
; i
< VFIO_PCI_ROM_REGION_INDEX
; i
++) {
2501 char *name
= g_strdup_printf("%s BAR %d", vbasedev
->name
, i
);
2503 ret
= vfio_region_setup(OBJECT(vdev
), vbasedev
,
2504 &vdev
->bars
[i
].region
, i
, name
);
2508 error_setg_errno(errp
, -ret
, "failed to get region %d info", i
);
2512 QLIST_INIT(&vdev
->bars
[i
].quirks
);
2515 ret
= vfio_get_region_info(vbasedev
,
2516 VFIO_PCI_CONFIG_REGION_INDEX
, ®_info
);
2518 error_setg_errno(errp
, -ret
, "failed to get config info");
2522 trace_vfio_populate_device_config(vdev
->vbasedev
.name
,
2523 (unsigned long)reg_info
->size
,
2524 (unsigned long)reg_info
->offset
,
2525 (unsigned long)reg_info
->flags
);
2527 vdev
->config_size
= reg_info
->size
;
2528 if (vdev
->config_size
== PCI_CONFIG_SPACE_SIZE
) {
2529 vdev
->pdev
.cap_present
&= ~QEMU_PCI_CAP_EXPRESS
;
2531 vdev
->config_offset
= reg_info
->offset
;
2535 if (vdev
->features
& VFIO_FEATURE_ENABLE_VGA
) {
2536 ret
= vfio_populate_vga(vdev
, errp
);
2538 error_append_hint(errp
, "device does not support "
2539 "requested feature x-vga\n");
2544 irq_info
.index
= VFIO_PCI_ERR_IRQ_INDEX
;
2546 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
);
2548 /* This can fail for an old kernel or legacy PCI dev */
2549 trace_vfio_populate_device_get_irq_info_failure(strerror(errno
));
2550 } else if (irq_info
.count
== 1) {
2551 vdev
->pci_aer
= true;
2553 warn_report(VFIO_MSG_PREFIX
2554 "Could not enable error recovery for the device",
2559 static void vfio_put_device(VFIOPCIDevice
*vdev
)
2561 g_free(vdev
->vbasedev
.name
);
2564 vfio_put_base_device(&vdev
->vbasedev
);
2567 static void vfio_err_notifier_handler(void *opaque
)
2569 VFIOPCIDevice
*vdev
= opaque
;
2571 if (!event_notifier_test_and_clear(&vdev
->err_notifier
)) {
2576 * TBD. Retrieve the error details and decide what action
2577 * needs to be taken. One of the actions could be to pass
2578 * the error to the guest and have the guest driver recover
2579 * from the error. This requires that PCIe capabilities be
2580 * exposed to the guest. For now, we just terminate the
2581 * guest to contain the error.
2584 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__
, vdev
->vbasedev
.name
);
2586 vm_stop(RUN_STATE_INTERNAL_ERROR
);
2590 * Registers error notifier for devices supporting error recovery.
2591 * If we encounter a failure in this function, we report an error
2592 * and continue after disabling error recovery support for the
2595 static void vfio_register_err_notifier(VFIOPCIDevice
*vdev
)
2600 if (!vdev
->pci_aer
) {
2604 if (event_notifier_init(&vdev
->err_notifier
, 0)) {
2605 error_report("vfio: Unable to init event notifier for error detection");
2606 vdev
->pci_aer
= false;
2610 fd
= event_notifier_get_fd(&vdev
->err_notifier
);
2611 qemu_set_fd_handler(fd
, vfio_err_notifier_handler
, NULL
, vdev
);
2613 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_ERR_IRQ_INDEX
, 0,
2614 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
2615 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2616 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
2617 event_notifier_cleanup(&vdev
->err_notifier
);
2618 vdev
->pci_aer
= false;
2622 static void vfio_unregister_err_notifier(VFIOPCIDevice
*vdev
)
2626 if (!vdev
->pci_aer
) {
2630 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_ERR_IRQ_INDEX
, 0,
2631 VFIO_IRQ_SET_ACTION_TRIGGER
, -1, &err
)) {
2632 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2634 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->err_notifier
),
2636 event_notifier_cleanup(&vdev
->err_notifier
);
2639 static void vfio_req_notifier_handler(void *opaque
)
2641 VFIOPCIDevice
*vdev
= opaque
;
2644 if (!event_notifier_test_and_clear(&vdev
->req_notifier
)) {
2648 qdev_unplug(DEVICE(vdev
), &err
);
2650 warn_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2654 static void vfio_register_req_notifier(VFIOPCIDevice
*vdev
)
2656 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
),
2657 .index
= VFIO_PCI_REQ_IRQ_INDEX
};
2661 if (!(vdev
->features
& VFIO_FEATURE_ENABLE_REQ
)) {
2665 if (ioctl(vdev
->vbasedev
.fd
,
2666 VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
) < 0 || irq_info
.count
< 1) {
2670 if (event_notifier_init(&vdev
->req_notifier
, 0)) {
2671 error_report("vfio: Unable to init event notifier for device request");
2675 fd
= event_notifier_get_fd(&vdev
->req_notifier
);
2676 qemu_set_fd_handler(fd
, vfio_req_notifier_handler
, NULL
, vdev
);
2678 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_REQ_IRQ_INDEX
, 0,
2679 VFIO_IRQ_SET_ACTION_TRIGGER
, fd
, &err
)) {
2680 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2681 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
2682 event_notifier_cleanup(&vdev
->req_notifier
);
2684 vdev
->req_enabled
= true;
2688 static void vfio_unregister_req_notifier(VFIOPCIDevice
*vdev
)
2692 if (!vdev
->req_enabled
) {
2696 if (vfio_set_irq_signaling(&vdev
->vbasedev
, VFIO_PCI_REQ_IRQ_INDEX
, 0,
2697 VFIO_IRQ_SET_ACTION_TRIGGER
, -1, &err
)) {
2698 error_reportf_err(err
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
2700 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->req_notifier
),
2702 event_notifier_cleanup(&vdev
->req_notifier
);
2704 vdev
->req_enabled
= false;
2707 static void vfio_realize(PCIDevice
*pdev
, Error
**errp
)
2709 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
2710 VFIODevice
*vbasedev_iter
;
2712 char *tmp
, *subsys
, group_path
[PATH_MAX
], *group_name
;
2720 if (!vdev
->vbasedev
.sysfsdev
) {
2721 if (!(~vdev
->host
.domain
|| ~vdev
->host
.bus
||
2722 ~vdev
->host
.slot
|| ~vdev
->host
.function
)) {
2723 error_setg(errp
, "No provided host device");
2724 error_append_hint(errp
, "Use -device vfio-pci,host=DDDD:BB:DD.F "
2725 "or -device vfio-pci,sysfsdev=PATH_TO_DEVICE\n");
2728 vdev
->vbasedev
.sysfsdev
=
2729 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2730 vdev
->host
.domain
, vdev
->host
.bus
,
2731 vdev
->host
.slot
, vdev
->host
.function
);
2734 if (stat(vdev
->vbasedev
.sysfsdev
, &st
) < 0) {
2735 error_setg_errno(errp
, errno
, "no such host device");
2736 error_prepend(errp
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.sysfsdev
);
2740 if (!pdev
->failover_pair_id
) {
2741 error_setg(&vdev
->migration_blocker
,
2742 "VFIO device doesn't support migration");
2743 ret
= migrate_add_blocker(vdev
->migration_blocker
, &err
);
2745 error_propagate(errp
, err
);
2746 error_free(vdev
->migration_blocker
);
2747 vdev
->migration_blocker
= NULL
;
2752 vdev
->vbasedev
.name
= g_path_get_basename(vdev
->vbasedev
.sysfsdev
);
2753 vdev
->vbasedev
.ops
= &vfio_pci_ops
;
2754 vdev
->vbasedev
.type
= VFIO_DEVICE_TYPE_PCI
;
2755 vdev
->vbasedev
.dev
= DEVICE(vdev
);
2757 tmp
= g_strdup_printf("%s/iommu_group", vdev
->vbasedev
.sysfsdev
);
2758 len
= readlink(tmp
, group_path
, sizeof(group_path
));
2761 if (len
<= 0 || len
>= sizeof(group_path
)) {
2762 error_setg_errno(errp
, len
< 0 ? errno
: ENAMETOOLONG
,
2763 "no iommu_group found");
2767 group_path
[len
] = 0;
2769 group_name
= basename(group_path
);
2770 if (sscanf(group_name
, "%d", &groupid
) != 1) {
2771 error_setg_errno(errp
, errno
, "failed to read %s", group_path
);
2775 trace_vfio_realize(vdev
->vbasedev
.name
, groupid
);
2777 group
= vfio_get_group(groupid
, pci_device_iommu_address_space(pdev
), errp
);
2782 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2783 if (strcmp(vbasedev_iter
->name
, vdev
->vbasedev
.name
) == 0) {
2784 error_setg(errp
, "device is already attached");
2785 vfio_put_group(group
);
2791 * Mediated devices *might* operate compatibly with memory ballooning, but
2792 * we cannot know for certain, it depends on whether the mdev vendor driver
2793 * stays in sync with the active working set of the guest driver. Prevent
2794 * the x-balloon-allowed option unless this is minimally an mdev device.
2796 tmp
= g_strdup_printf("%s/subsystem", vdev
->vbasedev
.sysfsdev
);
2797 subsys
= realpath(tmp
, NULL
);
2799 is_mdev
= subsys
&& (strcmp(subsys
, "/sys/bus/mdev") == 0);
2802 trace_vfio_mdev(vdev
->vbasedev
.name
, is_mdev
);
2804 if (vdev
->vbasedev
.balloon_allowed
&& !is_mdev
) {
2805 error_setg(errp
, "x-balloon-allowed only potentially compatible "
2806 "with mdev devices");
2807 vfio_put_group(group
);
2811 ret
= vfio_get_device(group
, vdev
->vbasedev
.name
, &vdev
->vbasedev
, errp
);
2813 vfio_put_group(group
);
2817 vfio_populate_device(vdev
, &err
);
2819 error_propagate(errp
, err
);
2823 /* Get a copy of config space */
2824 ret
= pread(vdev
->vbasedev
.fd
, vdev
->pdev
.config
,
2825 MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
),
2826 vdev
->config_offset
);
2827 if (ret
< (int)MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
)) {
2828 ret
= ret
< 0 ? -errno
: -EFAULT
;
2829 error_setg_errno(errp
, -ret
, "failed to read device config space");
2833 /* vfio emulates a lot for us, but some bits need extra love */
2834 vdev
->emulated_config_bits
= g_malloc0(vdev
->config_size
);
2836 /* QEMU can choose to expose the ROM or not */
2837 memset(vdev
->emulated_config_bits
+ PCI_ROM_ADDRESS
, 0xff, 4);
2838 /* QEMU can also add or extend BARs */
2839 memset(vdev
->emulated_config_bits
+ PCI_BASE_ADDRESS_0
, 0xff, 6 * 4);
2842 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2843 * device ID is managed by the vendor and need only be a 16-bit value.
2844 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2846 if (vdev
->vendor_id
!= PCI_ANY_ID
) {
2847 if (vdev
->vendor_id
>= 0xffff) {
2848 error_setg(errp
, "invalid PCI vendor ID provided");
2851 vfio_add_emulated_word(vdev
, PCI_VENDOR_ID
, vdev
->vendor_id
, ~0);
2852 trace_vfio_pci_emulated_vendor_id(vdev
->vbasedev
.name
, vdev
->vendor_id
);
2854 vdev
->vendor_id
= pci_get_word(pdev
->config
+ PCI_VENDOR_ID
);
2857 if (vdev
->device_id
!= PCI_ANY_ID
) {
2858 if (vdev
->device_id
> 0xffff) {
2859 error_setg(errp
, "invalid PCI device ID provided");
2862 vfio_add_emulated_word(vdev
, PCI_DEVICE_ID
, vdev
->device_id
, ~0);
2863 trace_vfio_pci_emulated_device_id(vdev
->vbasedev
.name
, vdev
->device_id
);
2865 vdev
->device_id
= pci_get_word(pdev
->config
+ PCI_DEVICE_ID
);
2868 if (vdev
->sub_vendor_id
!= PCI_ANY_ID
) {
2869 if (vdev
->sub_vendor_id
> 0xffff) {
2870 error_setg(errp
, "invalid PCI subsystem vendor ID provided");
2873 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_VENDOR_ID
,
2874 vdev
->sub_vendor_id
, ~0);
2875 trace_vfio_pci_emulated_sub_vendor_id(vdev
->vbasedev
.name
,
2876 vdev
->sub_vendor_id
);
2879 if (vdev
->sub_device_id
!= PCI_ANY_ID
) {
2880 if (vdev
->sub_device_id
> 0xffff) {
2881 error_setg(errp
, "invalid PCI subsystem device ID provided");
2884 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_ID
, vdev
->sub_device_id
, ~0);
2885 trace_vfio_pci_emulated_sub_device_id(vdev
->vbasedev
.name
,
2886 vdev
->sub_device_id
);
2889 /* QEMU can change multi-function devices to single function, or reverse */
2890 vdev
->emulated_config_bits
[PCI_HEADER_TYPE
] =
2891 PCI_HEADER_TYPE_MULTI_FUNCTION
;
2893 /* Restore or clear multifunction, this is always controlled by QEMU */
2894 if (vdev
->pdev
.cap_present
& QEMU_PCI_CAP_MULTIFUNCTION
) {
2895 vdev
->pdev
.config
[PCI_HEADER_TYPE
] |= PCI_HEADER_TYPE_MULTI_FUNCTION
;
2897 vdev
->pdev
.config
[PCI_HEADER_TYPE
] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION
;
2901 * Clear host resource mapping info. If we choose not to register a
2902 * BAR, such as might be the case with the option ROM, we can get
2903 * confusing, unwritable, residual addresses from the host here.
2905 memset(&vdev
->pdev
.config
[PCI_BASE_ADDRESS_0
], 0, 24);
2906 memset(&vdev
->pdev
.config
[PCI_ROM_ADDRESS
], 0, 4);
2908 vfio_pci_size_rom(vdev
);
2910 vfio_bars_prepare(vdev
);
2912 vfio_msix_early_setup(vdev
, &err
);
2914 error_propagate(errp
, err
);
2918 vfio_bars_register(vdev
);
2920 ret
= vfio_add_capabilities(vdev
, errp
);
2926 vfio_vga_quirk_setup(vdev
);
2929 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
2930 vfio_bar_quirk_setup(vdev
, i
);
2933 if (!vdev
->igd_opregion
&&
2934 vdev
->features
& VFIO_FEATURE_ENABLE_IGD_OPREGION
) {
2935 struct vfio_region_info
*opregion
;
2937 if (vdev
->pdev
.qdev
.hotplugged
) {
2939 "cannot support IGD OpRegion feature on hotplugged "
2944 ret
= vfio_get_dev_region_info(&vdev
->vbasedev
,
2945 VFIO_REGION_TYPE_PCI_VENDOR_TYPE
| PCI_VENDOR_ID_INTEL
,
2946 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
, &opregion
);
2948 error_setg_errno(errp
, -ret
,
2949 "does not support requested IGD OpRegion feature");
2953 ret
= vfio_pci_igd_opregion_init(vdev
, opregion
, errp
);
2960 /* QEMU emulates all of MSI & MSIX */
2961 if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
) {
2962 memset(vdev
->emulated_config_bits
+ pdev
->msix_cap
, 0xff,
2966 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
) {
2967 memset(vdev
->emulated_config_bits
+ pdev
->msi_cap
, 0xff,
2968 vdev
->msi_cap_size
);
2971 if (vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1)) {
2972 vdev
->intx
.mmap_timer
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
2973 vfio_intx_mmap_enable
, vdev
);
2974 pci_device_set_intx_routing_notifier(&vdev
->pdev
,
2975 vfio_intx_routing_notifier
);
2976 ret
= vfio_intx_enable(vdev
, errp
);
2982 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
2983 ret
= vfio_display_probe(vdev
, errp
);
2988 if (vdev
->enable_ramfb
&& vdev
->dpy
== NULL
) {
2989 error_setg(errp
, "ramfb=on requires display=on");
2992 if (vdev
->display_xres
|| vdev
->display_yres
) {
2993 if (vdev
->dpy
== NULL
) {
2994 error_setg(errp
, "xres and yres properties require display=on");
2997 if (vdev
->dpy
->edid_regs
== NULL
) {
2998 error_setg(errp
, "xres and yres properties need edid support");
3003 if (vdev
->vendor_id
== PCI_VENDOR_ID_NVIDIA
) {
3004 ret
= vfio_pci_nvidia_v100_ram_init(vdev
, errp
);
3005 if (ret
&& ret
!= -ENODEV
) {
3006 error_report("Failed to setup NVIDIA V100 GPU RAM");
3010 if (vdev
->vendor_id
== PCI_VENDOR_ID_IBM
) {
3011 ret
= vfio_pci_nvlink2_init(vdev
, errp
);
3012 if (ret
&& ret
!= -ENODEV
) {
3013 error_report("Failed to setup NVlink2 bridge");
3017 vfio_register_err_notifier(vdev
);
3018 vfio_register_req_notifier(vdev
);
3019 vfio_setup_resetfn_quirk(vdev
);
3024 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3025 vfio_teardown_msi(vdev
);
3026 vfio_bars_exit(vdev
);
3028 error_prepend(errp
, VFIO_MSG_PREFIX
, vdev
->vbasedev
.name
);
3029 if (vdev
->migration_blocker
) {
3030 migrate_del_blocker(vdev
->migration_blocker
);
3031 error_free(vdev
->migration_blocker
);
3032 vdev
->migration_blocker
= NULL
;
3036 static void vfio_instance_finalize(Object
*obj
)
3038 VFIOPCIDevice
*vdev
= PCI_VFIO(obj
);
3039 VFIOGroup
*group
= vdev
->vbasedev
.group
;
3041 vfio_display_finalize(vdev
);
3042 vfio_bars_finalize(vdev
);
3043 g_free(vdev
->emulated_config_bits
);
3045 if (vdev
->migration_blocker
) {
3046 migrate_del_blocker(vdev
->migration_blocker
);
3047 error_free(vdev
->migration_blocker
);
3050 * XXX Leaking igd_opregion is not an oversight, we can't remove the
3051 * fw_cfg entry therefore leaking this allocation seems like the safest
3054 * g_free(vdev->igd_opregion);
3056 vfio_put_device(vdev
);
3057 vfio_put_group(group
);
3060 static void vfio_exitfn(PCIDevice
*pdev
)
3062 VFIOPCIDevice
*vdev
= PCI_VFIO(pdev
);
3064 vfio_unregister_req_notifier(vdev
);
3065 vfio_unregister_err_notifier(vdev
);
3066 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3067 vfio_disable_interrupts(vdev
);
3068 if (vdev
->intx
.mmap_timer
) {
3069 timer_free(vdev
->intx
.mmap_timer
);
3071 vfio_teardown_msi(vdev
);
3072 vfio_bars_exit(vdev
);
3075 static void vfio_pci_reset(DeviceState
*dev
)
3077 VFIOPCIDevice
*vdev
= PCI_VFIO(dev
);
3079 trace_vfio_pci_reset(vdev
->vbasedev
.name
);
3081 vfio_pci_pre_reset(vdev
);
3083 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
3084 vfio_display_reset(vdev
);
3087 if (vdev
->resetfn
&& !vdev
->resetfn(vdev
)) {
3091 if (vdev
->vbasedev
.reset_works
&&
3092 (vdev
->has_flr
|| !vdev
->has_pm_reset
) &&
3093 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3094 trace_vfio_pci_reset_flr(vdev
->vbasedev
.name
);
3098 /* See if we can do our own bus reset */
3099 if (!vfio_pci_hot_reset_one(vdev
)) {
3103 /* If nothing else works and the device supports PM reset, use it */
3104 if (vdev
->vbasedev
.reset_works
&& vdev
->has_pm_reset
&&
3105 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3106 trace_vfio_pci_reset_pm(vdev
->vbasedev
.name
);
3111 vfio_pci_post_reset(vdev
);
3114 static void vfio_instance_init(Object
*obj
)
3116 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
3117 VFIOPCIDevice
*vdev
= PCI_VFIO(obj
);
3119 device_add_bootindex_property(obj
, &vdev
->bootindex
,
3121 &pci_dev
->qdev
, NULL
);
3122 vdev
->host
.domain
= ~0U;
3123 vdev
->host
.bus
= ~0U;
3124 vdev
->host
.slot
= ~0U;
3125 vdev
->host
.function
= ~0U;
3127 vdev
->nv_gpudirect_clique
= 0xFF;
3129 /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command
3130 * line, therefore, no need to wait to realize like other devices */
3131 pci_dev
->cap_present
|= QEMU_PCI_CAP_EXPRESS
;
3134 static Property vfio_pci_dev_properties
[] = {
3135 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice
, host
),
3136 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice
, vbasedev
.sysfsdev
),
3137 DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice
,
3138 display
, ON_OFF_AUTO_OFF
),
3139 DEFINE_PROP_UINT32("xres", VFIOPCIDevice
, display_xres
, 0),
3140 DEFINE_PROP_UINT32("yres", VFIOPCIDevice
, display_yres
, 0),
3141 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice
,
3142 intx
.mmap_timeout
, 1100),
3143 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice
, features
,
3144 VFIO_FEATURE_ENABLE_VGA_BIT
, false),
3145 DEFINE_PROP_BIT("x-req", VFIOPCIDevice
, features
,
3146 VFIO_FEATURE_ENABLE_REQ_BIT
, true),
3147 DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice
, features
,
3148 VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT
, false),
3149 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice
, vbasedev
.no_mmap
, false),
3150 DEFINE_PROP_BOOL("x-balloon-allowed", VFIOPCIDevice
,
3151 vbasedev
.balloon_allowed
, false),
3152 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice
, no_kvm_intx
, false),
3153 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice
, no_kvm_msi
, false),
3154 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice
, no_kvm_msix
, false),
3155 DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice
,
3156 no_geforce_quirks
, false),
3157 DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice
, no_kvm_ioeventfd
,
3159 DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice
, no_vfio_ioeventfd
,
3161 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice
, vendor_id
, PCI_ANY_ID
),
3162 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice
, device_id
, PCI_ANY_ID
),
3163 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice
,
3164 sub_vendor_id
, PCI_ANY_ID
),
3165 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice
,
3166 sub_device_id
, PCI_ANY_ID
),
3167 DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice
, igd_gms
, 0),
3168 DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice
,
3169 nv_gpudirect_clique
,
3170 qdev_prop_nv_gpudirect_clique
, uint8_t),
3171 DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice
, msix_relo
,
3172 OFF_AUTOPCIBAR_OFF
),
3174 * TODO - support passed fds... is this necessary?
3175 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
3176 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
3178 DEFINE_PROP_END_OF_LIST(),
3181 static void vfio_pci_dev_class_init(ObjectClass
*klass
, void *data
)
3183 DeviceClass
*dc
= DEVICE_CLASS(klass
);
3184 PCIDeviceClass
*pdc
= PCI_DEVICE_CLASS(klass
);
3186 dc
->reset
= vfio_pci_reset
;
3187 dc
->props
= vfio_pci_dev_properties
;
3188 dc
->desc
= "VFIO-based PCI device assignment";
3189 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
3190 pdc
->realize
= vfio_realize
;
3191 pdc
->exit
= vfio_exitfn
;
3192 pdc
->config_read
= vfio_pci_read_config
;
3193 pdc
->config_write
= vfio_pci_write_config
;
3196 static const TypeInfo vfio_pci_dev_info
= {
3197 .name
= TYPE_VFIO_PCI
,
3198 .parent
= TYPE_PCI_DEVICE
,
3199 .instance_size
= sizeof(VFIOPCIDevice
),
3200 .class_init
= vfio_pci_dev_class_init
,
3201 .instance_init
= vfio_instance_init
,
3202 .instance_finalize
= vfio_instance_finalize
,
3203 .interfaces
= (InterfaceInfo
[]) {
3204 { INTERFACE_PCIE_DEVICE
},
3205 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
3210 static Property vfio_pci_dev_nohotplug_properties
[] = {
3211 DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice
, enable_ramfb
, false),
3212 DEFINE_PROP_END_OF_LIST(),
3215 static void vfio_pci_nohotplug_dev_class_init(ObjectClass
*klass
, void *data
)
3217 DeviceClass
*dc
= DEVICE_CLASS(klass
);
3219 dc
->props
= vfio_pci_dev_nohotplug_properties
;
3220 dc
->hotpluggable
= false;
3223 static const TypeInfo vfio_pci_nohotplug_dev_info
= {
3224 .name
= TYPE_VFIO_PCI_NOHOTPLUG
,
3225 .parent
= TYPE_VFIO_PCI
,
3226 .instance_size
= sizeof(VFIOPCIDevice
),
3227 .class_init
= vfio_pci_nohotplug_dev_class_init
,
3230 static void register_vfio_pci_dev_type(void)
3232 type_register_static(&vfio_pci_dev_info
);
3233 type_register_static(&vfio_pci_nohotplug_dev_info
);
3236 type_init(register_vfio_pci_dev_type
)