2 * QEMU PowerPC 405 evaluation boards emulation
4 * Copyright (c) 2007 Jocelyn Mayer
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qapi/error.h"
28 #include "qemu-common.h"
30 #include "hw/ppc/ppc.h"
32 #include "hw/rtc/m48t59.h"
33 #include "hw/block/flash.h"
34 #include "sysemu/sysemu.h"
35 #include "sysemu/qtest.h"
36 #include "sysemu/reset.h"
37 #include "sysemu/block-backend.h"
38 #include "hw/boards.h"
40 #include "qemu/error-report.h"
41 #include "hw/loader.h"
42 #include "exec/address-spaces.h"
44 #define BIOS_FILENAME "ppc405_rom.bin"
45 #define BIOS_SIZE (2 * MiB)
47 #define KERNEL_LOAD_ADDR 0x00000000
48 #define INITRD_LOAD_ADDR 0x01800000
50 #define USE_FLASH_BIOS
52 /*****************************************************************************/
53 /* PPC405EP reference board (IBM) */
54 /* Standalone board with:
56 * - SDRAM (0x00000000)
57 * - Flash (0xFFF80000)
59 * - NVRAM (0xF0000000)
62 typedef struct ref405ep_fpga_t ref405ep_fpga_t
;
63 struct ref405ep_fpga_t
{
68 static uint64_t ref405ep_fpga_readb(void *opaque
, hwaddr addr
, unsigned size
)
70 ref405ep_fpga_t
*fpga
;
89 static void ref405ep_fpga_writeb(void *opaque
, hwaddr addr
, uint64_t value
,
92 ref405ep_fpga_t
*fpga
;
107 static const MemoryRegionOps ref405ep_fpga_ops
= {
108 .read
= ref405ep_fpga_readb
,
109 .write
= ref405ep_fpga_writeb
,
110 .impl
.min_access_size
= 1,
111 .impl
.max_access_size
= 1,
112 .valid
.min_access_size
= 1,
113 .valid
.max_access_size
= 4,
114 .endianness
= DEVICE_BIG_ENDIAN
,
117 static void ref405ep_fpga_reset (void *opaque
)
119 ref405ep_fpga_t
*fpga
;
126 static void ref405ep_fpga_init(MemoryRegion
*sysmem
, uint32_t base
)
128 ref405ep_fpga_t
*fpga
;
129 MemoryRegion
*fpga_memory
= g_new(MemoryRegion
, 1);
131 fpga
= g_malloc0(sizeof(ref405ep_fpga_t
));
132 memory_region_init_io(fpga_memory
, NULL
, &ref405ep_fpga_ops
, fpga
,
134 memory_region_add_subregion(sysmem
, base
, fpga_memory
);
135 qemu_register_reset(&ref405ep_fpga_reset
, fpga
);
138 static void ref405ep_init(MachineState
*machine
)
140 ram_addr_t ram_size
= machine
->ram_size
;
141 const char *kernel_filename
= machine
->kernel_filename
;
142 const char *kernel_cmdline
= machine
->kernel_cmdline
;
143 const char *initrd_filename
= machine
->initrd_filename
;
149 MemoryRegion
*sram
= g_new(MemoryRegion
, 1);
151 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
152 hwaddr ram_bases
[2], ram_sizes
[2];
153 target_ulong sram_size
;
156 //static int phy_addr = 1;
157 target_ulong kernel_base
, initrd_base
;
158 long kernel_size
, initrd_size
;
162 MemoryRegion
*sysmem
= get_system_memory();
165 memory_region_allocate_system_memory(&ram_memories
[0], NULL
, "ef405ep.ram",
168 ram_sizes
[0] = 0x08000000;
169 memory_region_init(&ram_memories
[1], NULL
, "ef405ep.ram1", 0);
170 ram_bases
[1] = 0x00000000;
171 ram_sizes
[1] = 0x00000000;
172 ram_size
= 128 * MiB
;
173 env
= ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
174 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
176 sram_size
= 512 * KiB
;
177 memory_region_init_ram(sram
, NULL
, "ef405ep.sram", sram_size
,
179 memory_region_add_subregion(sysmem
, 0xFFF00000, sram
);
180 /* allocate and load BIOS */
181 #ifdef USE_FLASH_BIOS
182 dinfo
= drive_get(IF_PFLASH
, 0, 0);
185 pflash_cfi02_register((uint32_t)(-bios_size
),
186 "ef405ep.bios", bios_size
,
187 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
189 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
194 bios
= g_new(MemoryRegion
, 1);
195 memory_region_init_ram(bios
, NULL
, "ef405ep.bios", BIOS_SIZE
,
198 if (bios_name
== NULL
)
199 bios_name
= BIOS_FILENAME
;
200 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
202 bios_size
= load_image_size(filename
,
203 memory_region_get_ram_ptr(bios
),
207 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
210 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
211 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
212 } else if (!qtest_enabled() || kernel_filename
!= NULL
) {
213 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
216 /* Avoid an uninitialized variable warning */
219 memory_region_set_readonly(bios
, true);
222 ref405ep_fpga_init(sysmem
, 0xF0300000);
224 m48t59_init(NULL
, 0xF0000000, 0, 8192, 1968, 8);
226 linux_boot
= (kernel_filename
!= NULL
);
228 memset(&bd
, 0, sizeof(bd
));
229 bd
.bi_memstart
= 0x00000000;
230 bd
.bi_memsize
= ram_size
;
231 bd
.bi_flashstart
= -bios_size
;
232 bd
.bi_flashsize
= -bios_size
;
233 bd
.bi_flashoffset
= 0;
234 bd
.bi_sramstart
= 0xFFF00000;
235 bd
.bi_sramsize
= sram_size
;
237 bd
.bi_intfreq
= 133333333;
238 bd
.bi_busfreq
= 33333333;
239 bd
.bi_baudrate
= 115200;
240 bd
.bi_s_version
[0] = 'Q';
241 bd
.bi_s_version
[1] = 'M';
242 bd
.bi_s_version
[2] = 'U';
243 bd
.bi_s_version
[3] = '\0';
244 bd
.bi_r_version
[0] = 'Q';
245 bd
.bi_r_version
[1] = 'E';
246 bd
.bi_r_version
[2] = 'M';
247 bd
.bi_r_version
[3] = 'U';
248 bd
.bi_r_version
[4] = '\0';
249 bd
.bi_procfreq
= 133333333;
250 bd
.bi_plb_busfreq
= 33333333;
251 bd
.bi_pci_busfreq
= 33333333;
252 bd
.bi_opbfreq
= 33333333;
253 bdloc
= ppc405_set_bootinfo(env
, &bd
, 0x00000001);
255 kernel_base
= KERNEL_LOAD_ADDR
;
256 /* now we can load the kernel */
257 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
258 ram_size
- kernel_base
);
259 if (kernel_size
< 0) {
260 error_report("could not load kernel '%s'", kernel_filename
);
263 printf("Load kernel size %ld at " TARGET_FMT_lx
,
264 kernel_size
, kernel_base
);
266 if (initrd_filename
) {
267 initrd_base
= INITRD_LOAD_ADDR
;
268 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
269 ram_size
- initrd_base
);
270 if (initrd_size
< 0) {
271 error_report("could not load initial ram disk '%s'",
279 env
->gpr
[4] = initrd_base
;
280 env
->gpr
[5] = initrd_size
;
281 if (kernel_cmdline
!= NULL
) {
282 len
= strlen(kernel_cmdline
);
283 bdloc
-= ((len
+ 255) & ~255);
284 cpu_physical_memory_write(bdloc
, kernel_cmdline
, len
+ 1);
286 env
->gpr
[7] = bdloc
+ len
;
291 env
->nip
= KERNEL_LOAD_ADDR
;
301 static void ref405ep_class_init(ObjectClass
*oc
, void *data
)
303 MachineClass
*mc
= MACHINE_CLASS(oc
);
305 mc
->desc
= "ref405ep";
306 mc
->init
= ref405ep_init
;
309 static const TypeInfo ref405ep_type
= {
310 .name
= MACHINE_TYPE_NAME("ref405ep"),
311 .parent
= TYPE_MACHINE
,
312 .class_init
= ref405ep_class_init
,
315 /*****************************************************************************/
316 /* AMCC Taihu evaluation board */
317 /* - PowerPC 405EP processor
318 * - SDRAM 128 MB at 0x00000000
319 * - Boot flash 2 MB at 0xFFE00000
320 * - Application flash 32 MB at 0xFC000000
323 * - 1 USB 1.1 device 0x50000000
324 * - 1 LCD display 0x50100000
325 * - 1 CPLD 0x50100000
327 * - 1 I2C thermal sensor
329 * - bit-bang SPI port using GPIOs
330 * - 1 EBC interface connector 0 0x50200000
331 * - 1 cardbus controller + expansion slot.
332 * - 1 PCI expansion slot.
334 typedef struct taihu_cpld_t taihu_cpld_t
;
335 struct taihu_cpld_t
{
340 static uint64_t taihu_cpld_read(void *opaque
, hwaddr addr
, unsigned size
)
361 static void taihu_cpld_write(void *opaque
, hwaddr addr
,
362 uint64_t value
, unsigned size
)
379 static const MemoryRegionOps taihu_cpld_ops
= {
380 .read
= taihu_cpld_read
,
381 .write
= taihu_cpld_write
,
383 .min_access_size
= 1,
384 .max_access_size
= 1,
386 .endianness
= DEVICE_NATIVE_ENDIAN
,
389 static void taihu_cpld_reset (void *opaque
)
398 static void taihu_cpld_init(MemoryRegion
*sysmem
, uint32_t base
)
401 MemoryRegion
*cpld_memory
= g_new(MemoryRegion
, 1);
403 cpld
= g_malloc0(sizeof(taihu_cpld_t
));
404 memory_region_init_io(cpld_memory
, NULL
, &taihu_cpld_ops
, cpld
, "cpld", 0x100);
405 memory_region_add_subregion(sysmem
, base
, cpld_memory
);
406 qemu_register_reset(&taihu_cpld_reset
, cpld
);
409 static void taihu_405ep_init(MachineState
*machine
)
411 ram_addr_t ram_size
= machine
->ram_size
;
412 const char *kernel_filename
= machine
->kernel_filename
;
413 const char *initrd_filename
= machine
->initrd_filename
;
416 MemoryRegion
*sysmem
= get_system_memory();
418 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
419 MemoryRegion
*ram
= g_malloc0(sizeof(*ram
));
420 hwaddr ram_bases
[2], ram_sizes
[2];
422 target_ulong kernel_base
, initrd_base
;
423 long kernel_size
, initrd_size
;
428 /* RAM is soldered to the board so the size cannot be changed */
429 ram_size
= 0x08000000;
430 memory_region_allocate_system_memory(ram
, NULL
, "taihu_405ep.ram",
434 ram_sizes
[0] = 0x04000000;
435 memory_region_init_alias(&ram_memories
[0], NULL
,
436 "taihu_405ep.ram-0", ram
, ram_bases
[0],
438 ram_bases
[1] = 0x04000000;
439 ram_sizes
[1] = 0x04000000;
440 memory_region_init_alias(&ram_memories
[1], NULL
,
441 "taihu_405ep.ram-1", ram
, ram_bases
[1],
443 ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
444 33333333, &pic
, kernel_filename
== NULL
? 0 : 1);
445 /* allocate and load BIOS */
447 #if defined(USE_FLASH_BIOS)
448 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
451 pflash_cfi02_register(0xFFE00000,
452 "taihu_405ep.bios", bios_size
,
453 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
455 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
461 if (bios_name
== NULL
)
462 bios_name
= BIOS_FILENAME
;
463 bios
= g_new(MemoryRegion
, 1);
464 memory_region_init_ram(bios
, NULL
, "taihu_405ep.bios", BIOS_SIZE
,
466 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
468 bios_size
= load_image_size(filename
,
469 memory_region_get_ram_ptr(bios
),
473 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
476 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
477 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
478 } else if (!qtest_enabled()) {
479 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
482 memory_region_set_readonly(bios
, true);
484 /* Register Linux flash */
485 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
487 bios_size
= 32 * MiB
;
488 pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size
,
489 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
491 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
495 /* Register CLPD & LCD display */
496 taihu_cpld_init(sysmem
, 0x50100000);
498 linux_boot
= (kernel_filename
!= NULL
);
500 kernel_base
= KERNEL_LOAD_ADDR
;
501 /* now we can load the kernel */
502 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
503 ram_size
- kernel_base
);
504 if (kernel_size
< 0) {
505 error_report("could not load kernel '%s'", kernel_filename
);
509 if (initrd_filename
) {
510 initrd_base
= INITRD_LOAD_ADDR
;
511 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
512 ram_size
- initrd_base
);
513 if (initrd_size
< 0) {
514 error_report("could not load initial ram disk '%s'",
530 static void taihu_class_init(ObjectClass
*oc
, void *data
)
532 MachineClass
*mc
= MACHINE_CLASS(oc
);
535 mc
->init
= taihu_405ep_init
;
538 static const TypeInfo taihu_type
= {
539 .name
= MACHINE_TYPE_NAME("taihu"),
540 .parent
= TYPE_MACHINE
,
541 .class_init
= taihu_class_init
,
544 static void ppc405_machine_init(void)
546 type_register_static(&ref405ep_type
);
547 type_register_static(&taihu_type
);
550 type_init(ppc405_machine_init
)