4 * Andrew Jeffery <andrew@aj.id.au>
5 * Jeremy Kerr <jk@ozlabs.org>
7 * Copyright 2016 IBM Corp.
9 * This code is licensed under the GPL version 2 or later. See
10 * the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qapi/error.h"
16 #include "exec/address-spaces.h"
17 #include "hw/misc/unimp.h"
18 #include "hw/arm/aspeed_soc.h"
19 #include "hw/char/serial.h"
21 #include "qemu/module.h"
22 #include "qemu/error-report.h"
23 #include "hw/i2c/aspeed_i2c.h"
25 #include "sysemu/sysemu.h"
27 #define ASPEED_SOC_IOMEM_SIZE 0x00200000
29 static const hwaddr aspeed_soc_ast2400_memmap
[] = {
30 [ASPEED_IOMEM
] = 0x1E600000,
31 [ASPEED_FMC
] = 0x1E620000,
32 [ASPEED_SPI1
] = 0x1E630000,
33 [ASPEED_VIC
] = 0x1E6C0000,
34 [ASPEED_SDMC
] = 0x1E6E0000,
35 [ASPEED_SCU
] = 0x1E6E2000,
36 [ASPEED_XDMA
] = 0x1E6E7000,
37 [ASPEED_VIDEO
] = 0x1E700000,
38 [ASPEED_ADC
] = 0x1E6E9000,
39 [ASPEED_SRAM
] = 0x1E720000,
40 [ASPEED_SDHCI
] = 0x1E740000,
41 [ASPEED_GPIO
] = 0x1E780000,
42 [ASPEED_RTC
] = 0x1E781000,
43 [ASPEED_TIMER1
] = 0x1E782000,
44 [ASPEED_WDT
] = 0x1E785000,
45 [ASPEED_PWM
] = 0x1E786000,
46 [ASPEED_LPC
] = 0x1E789000,
47 [ASPEED_IBT
] = 0x1E789140,
48 [ASPEED_I2C
] = 0x1E78A000,
49 [ASPEED_ETH1
] = 0x1E660000,
50 [ASPEED_ETH2
] = 0x1E680000,
51 [ASPEED_UART1
] = 0x1E783000,
52 [ASPEED_UART5
] = 0x1E784000,
53 [ASPEED_VUART
] = 0x1E787000,
54 [ASPEED_SDRAM
] = 0x40000000,
57 static const hwaddr aspeed_soc_ast2500_memmap
[] = {
58 [ASPEED_IOMEM
] = 0x1E600000,
59 [ASPEED_FMC
] = 0x1E620000,
60 [ASPEED_SPI1
] = 0x1E630000,
61 [ASPEED_SPI2
] = 0x1E631000,
62 [ASPEED_VIC
] = 0x1E6C0000,
63 [ASPEED_SDMC
] = 0x1E6E0000,
64 [ASPEED_SCU
] = 0x1E6E2000,
65 [ASPEED_XDMA
] = 0x1E6E7000,
66 [ASPEED_ADC
] = 0x1E6E9000,
67 [ASPEED_VIDEO
] = 0x1E700000,
68 [ASPEED_SRAM
] = 0x1E720000,
69 [ASPEED_SDHCI
] = 0x1E740000,
70 [ASPEED_GPIO
] = 0x1E780000,
71 [ASPEED_RTC
] = 0x1E781000,
72 [ASPEED_TIMER1
] = 0x1E782000,
73 [ASPEED_WDT
] = 0x1E785000,
74 [ASPEED_PWM
] = 0x1E786000,
75 [ASPEED_LPC
] = 0x1E789000,
76 [ASPEED_IBT
] = 0x1E789140,
77 [ASPEED_I2C
] = 0x1E78A000,
78 [ASPEED_ETH1
] = 0x1E660000,
79 [ASPEED_ETH2
] = 0x1E680000,
80 [ASPEED_UART1
] = 0x1E783000,
81 [ASPEED_UART5
] = 0x1E784000,
82 [ASPEED_VUART
] = 0x1E787000,
83 [ASPEED_SDRAM
] = 0x80000000,
86 static const int aspeed_soc_ast2400_irqmap
[] = {
100 [ASPEED_TIMER2
] = 17,
101 [ASPEED_TIMER3
] = 18,
102 [ASPEED_TIMER4
] = 35,
103 [ASPEED_TIMER5
] = 36,
104 [ASPEED_TIMER6
] = 37,
105 [ASPEED_TIMER7
] = 38,
106 [ASPEED_TIMER8
] = 39,
110 [ASPEED_IBT
] = 8, /* LPC */
118 #define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap
120 static qemu_irq
aspeed_soc_get_irq(AspeedSoCState
*s
, int ctrl
)
122 AspeedSoCClass
*sc
= ASPEED_SOC_GET_CLASS(s
);
124 return qdev_get_gpio_in(DEVICE(&s
->vic
), sc
->irqmap
[ctrl
]);
127 static void aspeed_soc_init(Object
*obj
)
129 AspeedSoCState
*s
= ASPEED_SOC(obj
);
130 AspeedSoCClass
*sc
= ASPEED_SOC_GET_CLASS(s
);
135 if (sscanf(sc
->name
, "%7s", socname
) != 1) {
136 g_assert_not_reached();
139 for (i
= 0; i
< sc
->num_cpus
; i
++) {
140 object_initialize_child(obj
, "cpu[*]", OBJECT(&s
->cpu
[i
]),
141 sizeof(s
->cpu
[i
]), sc
->cpu_type
,
145 snprintf(typename
, sizeof(typename
), "aspeed.scu-%s", socname
);
146 sysbus_init_child_obj(obj
, "scu", OBJECT(&s
->scu
), sizeof(s
->scu
),
148 qdev_prop_set_uint32(DEVICE(&s
->scu
), "silicon-rev",
150 object_property_add_alias(obj
, "hw-strap1", OBJECT(&s
->scu
),
151 "hw-strap1", &error_abort
);
152 object_property_add_alias(obj
, "hw-strap2", OBJECT(&s
->scu
),
153 "hw-strap2", &error_abort
);
154 object_property_add_alias(obj
, "hw-prot-key", OBJECT(&s
->scu
),
155 "hw-prot-key", &error_abort
);
157 sysbus_init_child_obj(obj
, "vic", OBJECT(&s
->vic
), sizeof(s
->vic
),
160 sysbus_init_child_obj(obj
, "rtc", OBJECT(&s
->rtc
), sizeof(s
->rtc
),
163 snprintf(typename
, sizeof(typename
), "aspeed.timer-%s", socname
);
164 sysbus_init_child_obj(obj
, "timerctrl", OBJECT(&s
->timerctrl
),
165 sizeof(s
->timerctrl
), typename
);
167 snprintf(typename
, sizeof(typename
), "aspeed.i2c-%s", socname
);
168 sysbus_init_child_obj(obj
, "i2c", OBJECT(&s
->i2c
), sizeof(s
->i2c
),
171 snprintf(typename
, sizeof(typename
), "aspeed.fmc-%s", socname
);
172 sysbus_init_child_obj(obj
, "fmc", OBJECT(&s
->fmc
), sizeof(s
->fmc
),
174 object_property_add_alias(obj
, "num-cs", OBJECT(&s
->fmc
), "num-cs",
177 for (i
= 0; i
< sc
->spis_num
; i
++) {
178 snprintf(typename
, sizeof(typename
), "aspeed.spi%d-%s", i
+ 1, socname
);
179 sysbus_init_child_obj(obj
, "spi[*]", OBJECT(&s
->spi
[i
]),
180 sizeof(s
->spi
[i
]), typename
);
183 snprintf(typename
, sizeof(typename
), "aspeed.sdmc-%s", socname
);
184 sysbus_init_child_obj(obj
, "sdmc", OBJECT(&s
->sdmc
), sizeof(s
->sdmc
),
186 object_property_add_alias(obj
, "ram-size", OBJECT(&s
->sdmc
),
187 "ram-size", &error_abort
);
188 object_property_add_alias(obj
, "max-ram-size", OBJECT(&s
->sdmc
),
189 "max-ram-size", &error_abort
);
191 for (i
= 0; i
< sc
->wdts_num
; i
++) {
192 snprintf(typename
, sizeof(typename
), "aspeed.wdt-%s", socname
);
193 sysbus_init_child_obj(obj
, "wdt[*]", OBJECT(&s
->wdt
[i
]),
194 sizeof(s
->wdt
[i
]), typename
);
197 for (i
= 0; i
< sc
->macs_num
; i
++) {
198 sysbus_init_child_obj(obj
, "ftgmac100[*]", OBJECT(&s
->ftgmac100
[i
]),
199 sizeof(s
->ftgmac100
[i
]), TYPE_FTGMAC100
);
202 sysbus_init_child_obj(obj
, "xdma", OBJECT(&s
->xdma
), sizeof(s
->xdma
),
205 snprintf(typename
, sizeof(typename
), "aspeed.gpio-%s", socname
);
206 sysbus_init_child_obj(obj
, "gpio", OBJECT(&s
->gpio
), sizeof(s
->gpio
),
209 sysbus_init_child_obj(obj
, "sdc", OBJECT(&s
->sdhci
), sizeof(s
->sdhci
),
212 /* Init sd card slot class here so that they're under the correct parent */
213 for (i
= 0; i
< ASPEED_SDHCI_NUM_SLOTS
; ++i
) {
214 sysbus_init_child_obj(obj
, "sdhci[*]", OBJECT(&s
->sdhci
.slots
[i
]),
215 sizeof(s
->sdhci
.slots
[i
]), TYPE_SYSBUS_SDHCI
);
219 static void aspeed_soc_realize(DeviceState
*dev
, Error
**errp
)
222 AspeedSoCState
*s
= ASPEED_SOC(dev
);
223 AspeedSoCClass
*sc
= ASPEED_SOC_GET_CLASS(s
);
224 Error
*err
= NULL
, *local_err
= NULL
;
227 create_unimplemented_device("aspeed_soc.io", sc
->memmap
[ASPEED_IOMEM
],
228 ASPEED_SOC_IOMEM_SIZE
);
230 /* Video engine stub */
231 create_unimplemented_device("aspeed.video", sc
->memmap
[ASPEED_VIDEO
],
234 if (s
->num_cpus
> sc
->num_cpus
) {
235 warn_report("%s: invalid number of CPUs %d, using default %d",
236 sc
->name
, s
->num_cpus
, sc
->num_cpus
);
237 s
->num_cpus
= sc
->num_cpus
;
241 for (i
= 0; i
< s
->num_cpus
; i
++) {
242 object_property_set_bool(OBJECT(&s
->cpu
[i
]), true, "realized", &err
);
244 error_propagate(errp
, err
);
250 memory_region_init_ram(&s
->sram
, OBJECT(dev
), "aspeed.sram",
251 sc
->sram_size
, &err
);
253 error_propagate(errp
, err
);
256 memory_region_add_subregion(get_system_memory(),
257 sc
->memmap
[ASPEED_SRAM
], &s
->sram
);
260 object_property_set_bool(OBJECT(&s
->scu
), true, "realized", &err
);
262 error_propagate(errp
, err
);
265 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->scu
), 0, sc
->memmap
[ASPEED_SCU
]);
268 object_property_set_bool(OBJECT(&s
->vic
), true, "realized", &err
);
270 error_propagate(errp
, err
);
273 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->vic
), 0, sc
->memmap
[ASPEED_VIC
]);
274 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->vic
), 0,
275 qdev_get_gpio_in(DEVICE(&s
->cpu
), ARM_CPU_IRQ
));
276 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->vic
), 1,
277 qdev_get_gpio_in(DEVICE(&s
->cpu
), ARM_CPU_FIQ
));
280 object_property_set_bool(OBJECT(&s
->rtc
), true, "realized", &err
);
282 error_propagate(errp
, err
);
285 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->rtc
), 0, sc
->memmap
[ASPEED_RTC
]);
286 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->rtc
), 0,
287 aspeed_soc_get_irq(s
, ASPEED_RTC
));
290 object_property_set_link(OBJECT(&s
->timerctrl
),
291 OBJECT(&s
->scu
), "scu", &error_abort
);
292 object_property_set_bool(OBJECT(&s
->timerctrl
), true, "realized", &err
);
294 error_propagate(errp
, err
);
297 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->timerctrl
), 0,
298 sc
->memmap
[ASPEED_TIMER1
]);
299 for (i
= 0; i
< ASPEED_TIMER_NR_TIMERS
; i
++) {
300 qemu_irq irq
= aspeed_soc_get_irq(s
, ASPEED_TIMER1
+ i
);
301 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->timerctrl
), i
, irq
);
304 /* UART - attach an 8250 to the IO space as our UART5 */
306 qemu_irq uart5
= aspeed_soc_get_irq(s
, ASPEED_UART5
);
307 serial_mm_init(get_system_memory(), sc
->memmap
[ASPEED_UART5
], 2,
308 uart5
, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN
);
312 object_property_set_link(OBJECT(&s
->i2c
), OBJECT(s
->dram_mr
), "dram", &err
);
314 error_propagate(errp
, err
);
317 object_property_set_bool(OBJECT(&s
->i2c
), true, "realized", &err
);
319 error_propagate(errp
, err
);
322 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->i2c
), 0, sc
->memmap
[ASPEED_I2C
]);
323 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->i2c
), 0,
324 aspeed_soc_get_irq(s
, ASPEED_I2C
));
326 /* FMC, The number of CS is set at the board level */
327 object_property_set_link(OBJECT(&s
->fmc
), OBJECT(s
->dram_mr
), "dram", &err
);
329 error_propagate(errp
, err
);
332 object_property_set_int(OBJECT(&s
->fmc
), sc
->memmap
[ASPEED_SDRAM
],
335 error_propagate(errp
, err
);
338 object_property_set_bool(OBJECT(&s
->fmc
), true, "realized", &err
);
340 error_propagate(errp
, err
);
343 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->fmc
), 0, sc
->memmap
[ASPEED_FMC
]);
344 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->fmc
), 1,
345 s
->fmc
.ctrl
->flash_window_base
);
346 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->fmc
), 0,
347 aspeed_soc_get_irq(s
, ASPEED_FMC
));
350 for (i
= 0; i
< sc
->spis_num
; i
++) {
351 object_property_set_int(OBJECT(&s
->spi
[i
]), 1, "num-cs", &err
);
352 object_property_set_bool(OBJECT(&s
->spi
[i
]), true, "realized",
354 error_propagate(&err
, local_err
);
356 error_propagate(errp
, err
);
359 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->spi
[i
]), 0,
360 sc
->memmap
[ASPEED_SPI1
+ i
]);
361 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->spi
[i
]), 1,
362 s
->spi
[i
].ctrl
->flash_window_base
);
365 /* SDMC - SDRAM Memory Controller */
366 object_property_set_bool(OBJECT(&s
->sdmc
), true, "realized", &err
);
368 error_propagate(errp
, err
);
371 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->sdmc
), 0, sc
->memmap
[ASPEED_SDMC
]);
374 for (i
= 0; i
< sc
->wdts_num
; i
++) {
375 AspeedWDTClass
*awc
= ASPEED_WDT_GET_CLASS(&s
->wdt
[i
]);
377 object_property_set_link(OBJECT(&s
->wdt
[i
]),
378 OBJECT(&s
->scu
), "scu", &error_abort
);
379 object_property_set_bool(OBJECT(&s
->wdt
[i
]), true, "realized", &err
);
381 error_propagate(errp
, err
);
384 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->wdt
[i
]), 0,
385 sc
->memmap
[ASPEED_WDT
] + i
* awc
->offset
);
389 for (i
= 0; i
< nb_nics
&& i
< sc
->macs_num
; i
++) {
390 qdev_set_nic_properties(DEVICE(&s
->ftgmac100
[i
]), &nd_table
[i
]);
391 object_property_set_bool(OBJECT(&s
->ftgmac100
[i
]), true, "aspeed",
393 object_property_set_bool(OBJECT(&s
->ftgmac100
[i
]), true, "realized",
395 error_propagate(&err
, local_err
);
397 error_propagate(errp
, err
);
400 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->ftgmac100
[i
]), 0,
401 sc
->memmap
[ASPEED_ETH1
+ i
]);
402 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->ftgmac100
[i
]), 0,
403 aspeed_soc_get_irq(s
, ASPEED_ETH1
+ i
));
407 object_property_set_bool(OBJECT(&s
->xdma
), true, "realized", &err
);
409 error_propagate(errp
, err
);
412 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->xdma
), 0,
413 sc
->memmap
[ASPEED_XDMA
]);
414 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->xdma
), 0,
415 aspeed_soc_get_irq(s
, ASPEED_XDMA
));
418 object_property_set_bool(OBJECT(&s
->gpio
), true, "realized", &err
);
420 error_propagate(errp
, err
);
423 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->gpio
), 0, sc
->memmap
[ASPEED_GPIO
]);
424 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->gpio
), 0,
425 aspeed_soc_get_irq(s
, ASPEED_GPIO
));
428 object_property_set_bool(OBJECT(&s
->sdhci
), true, "realized", &err
);
430 error_propagate(errp
, err
);
433 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->sdhci
), 0,
434 sc
->memmap
[ASPEED_SDHCI
]);
435 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->sdhci
), 0,
436 aspeed_soc_get_irq(s
, ASPEED_SDHCI
));
438 static Property aspeed_soc_properties
[] = {
439 DEFINE_PROP_UINT32("num-cpus", AspeedSoCState
, num_cpus
, 0),
440 DEFINE_PROP_LINK("dram", AspeedSoCState
, dram_mr
, TYPE_MEMORY_REGION
,
442 DEFINE_PROP_END_OF_LIST(),
445 static void aspeed_soc_class_init(ObjectClass
*oc
, void *data
)
447 DeviceClass
*dc
= DEVICE_CLASS(oc
);
449 dc
->realize
= aspeed_soc_realize
;
450 /* Reason: Uses serial_hds and nd_table in realize() directly */
451 dc
->user_creatable
= false;
452 dc
->props
= aspeed_soc_properties
;
455 static const TypeInfo aspeed_soc_type_info
= {
456 .name
= TYPE_ASPEED_SOC
,
457 .parent
= TYPE_DEVICE
,
458 .instance_size
= sizeof(AspeedSoCState
),
459 .class_size
= sizeof(AspeedSoCClass
),
460 .class_init
= aspeed_soc_class_init
,
464 static void aspeed_soc_ast2400_class_init(ObjectClass
*oc
, void *data
)
466 AspeedSoCClass
*sc
= ASPEED_SOC_CLASS(oc
);
468 sc
->name
= "ast2400-a1";
469 sc
->cpu_type
= ARM_CPU_TYPE_NAME("arm926");
470 sc
->silicon_rev
= AST2400_A1_SILICON_REV
;
471 sc
->sram_size
= 0x8000;
475 sc
->irqmap
= aspeed_soc_ast2400_irqmap
;
476 sc
->memmap
= aspeed_soc_ast2400_memmap
;
480 static const TypeInfo aspeed_soc_ast2400_type_info
= {
481 .name
= "ast2400-a1",
482 .parent
= TYPE_ASPEED_SOC
,
483 .instance_init
= aspeed_soc_init
,
484 .instance_size
= sizeof(AspeedSoCState
),
485 .class_init
= aspeed_soc_ast2400_class_init
,
488 static void aspeed_soc_ast2500_class_init(ObjectClass
*oc
, void *data
)
490 AspeedSoCClass
*sc
= ASPEED_SOC_CLASS(oc
);
492 sc
->name
= "ast2500-a1";
493 sc
->cpu_type
= ARM_CPU_TYPE_NAME("arm1176");
494 sc
->silicon_rev
= AST2500_A1_SILICON_REV
;
495 sc
->sram_size
= 0x9000;
499 sc
->irqmap
= aspeed_soc_ast2500_irqmap
;
500 sc
->memmap
= aspeed_soc_ast2500_memmap
;
504 static const TypeInfo aspeed_soc_ast2500_type_info
= {
505 .name
= "ast2500-a1",
506 .parent
= TYPE_ASPEED_SOC
,
507 .instance_init
= aspeed_soc_init
,
508 .instance_size
= sizeof(AspeedSoCState
),
509 .class_init
= aspeed_soc_ast2500_class_init
,
511 static void aspeed_soc_register_types(void)
513 type_register_static(&aspeed_soc_type_info
);
514 type_register_static(&aspeed_soc_ast2400_type_info
);
515 type_register_static(&aspeed_soc_ast2500_type_info
);
518 type_init(aspeed_soc_register_types
)