target/moxie/helper.c

   1 /*
   2  *  Moxie helper routines.
   3  *
   4  *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21
  22 #include "cpu.h"
  23 #include "mmu.h"
  24 #include "exec/exec-all.h"
  25 #include "exec/cpu_ldst.h"
  26 #include "qemu/host-utils.h"
  27 #include "exec/helper-proto.h"
  28
  29 /* Try to fill the TLB and return an exception if error. If retaddr is
  30    NULL, it means that the function was called in C code (i.e. not
  31    from generated code or from helper.c) */
  32 void tlb_fill(CPUState *cs, target_ulong addr, int size,
  33               MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
  34 {
  35     int ret;
  36
  37     ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
  38     if (unlikely(ret)) {
  39         cpu_loop_exit_restore(cs, retaddr);
  40     }
  41 }
  42
  43 void helper_raise_exception(CPUMoxieState *env, int ex)
  44 {
  45     CPUState *cs = CPU(moxie_env_get_cpu(env));
  46
  47     cs->exception_index = ex;
  48     /* Stash the exception type.  */
  49     env->sregs[2] = ex;
  50     /* Stash the address where the exception occurred.  */
  51     cpu_restore_state(cs, GETPC());
  52     env->sregs[5] = env->pc;
  53     /* Jump to the exception handline routine.  */
  54     env->pc = env->sregs[1];
  55     cpu_loop_exit(cs);
  56 }
  57
  58 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  59 {
  60     if (unlikely(b == 0)) {
  61         helper_raise_exception(env, MOXIE_EX_DIV0);
  62         return 0;
  63     }
  64     if (unlikely(a == INT_MIN && b == -1)) {
  65         return INT_MIN;
  66     }
  67
  68     return (int32_t)a / (int32_t)b;
  69 }
  70
  71 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  72 {
  73     if (unlikely(b == 0)) {
  74         helper_raise_exception(env, MOXIE_EX_DIV0);
  75         return 0;
  76     }
  77     return a / b;
  78 }
  79
  80 void helper_debug(CPUMoxieState *env)
  81 {
  82     CPUState *cs = CPU(moxie_env_get_cpu(env));
  83
  84     cs->exception_index = EXCP_DEBUG;
  85     cpu_loop_exit(cs);
  86 }
  87
  88 #if defined(CONFIG_USER_ONLY)
  89
  90 void moxie_cpu_do_interrupt(CPUState *cs)
  91 {
  92     CPUState *cs = CPU(moxie_env_get_cpu(env));
  93
  94     cs->exception_index = -1;
  95 }
  96
  97 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
  98                                int rw, int mmu_idx)
  99 {
 100     MoxieCPU *cpu = MOXIE_CPU(cs);
 101
 102     cs->exception_index = 0xaa;
 103     cpu->env.debug1 = address;
 104     cpu_dump_state(cs, stderr, fprintf, 0);
 105     return 1;
 106 }
 107
 108 #else /* !CONFIG_USER_ONLY */
 109
 110 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
 111                                int rw, int mmu_idx)
 112 {
 113     MoxieCPU *cpu = MOXIE_CPU(cs);
 114     CPUMoxieState *env = &cpu->env;
 115     MoxieMMUResult res;
 116     int prot, miss;
 117     target_ulong phy;
 118     int r = 1;
 119
 120     address &= TARGET_PAGE_MASK;
 121     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 122     miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
 123     if (miss) {
 124         /* handle the miss.  */
 125         phy = 0;
 126         cs->exception_index = MOXIE_EX_MMU_MISS;
 127     } else {
 128         phy = res.phy;
 129         r = 0;
 130     }
 131     tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
 132     return r;
 133 }
 134
 135
 136 void moxie_cpu_do_interrupt(CPUState *cs)
 137 {
 138     switch (cs->exception_index) {
 139     case MOXIE_EX_BREAK:
 140         break;
 141     default:
 142         break;
 143     }
 144 }
 145
 146 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 147 {
 148     MoxieCPU *cpu = MOXIE_CPU(cs);
 149     uint32_t phy = addr;
 150     MoxieMMUResult res;
 151     int miss;
 152
 153     miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 154     if (!miss) {
 155         phy = res.phy;
 156     }
 157     return phy;
 158 }
 159 #endif