cpu.c

   1 /*
   2  * Target-specific parts of the CPU object
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qapi/error.h"
  22
  23 #include "exec/target_page.h"
  24 #include "hw/qdev-core.h"
  25 #include "hw/qdev-properties.h"
  26 #include "qemu/error-report.h"
  27 #include "migration/vmstate.h"
  28 #ifdef CONFIG_USER_ONLY
  29 #include "qemu.h"
  30 #else
  31 #include "hw/core/sysemu-cpu-ops.h"
  32 #include "exec/address-spaces.h"
  33 #endif
  34 #include "sysemu/tcg.h"
  35 #include "sysemu/kvm.h"
  36 #include "sysemu/replay.h"
  37 #include "exec/cpu-common.h"
  38 #include "exec/exec-all.h"
  39 #include "exec/translate-all.h"
  40 #include "exec/log.h"
  41 #include "hw/core/accel-cpu.h"
  42 #include "trace/trace-root.h"
  43 #include "qemu/accel.h"
  44
  45 uintptr_t qemu_host_page_size;
  46 intptr_t qemu_host_page_mask;
  47
  48 #ifndef CONFIG_USER_ONLY
  49 static int cpu_common_post_load(void *opaque, int version_id)
  50 {
  51     CPUState *cpu = opaque;
  52
  53     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  54        version_id is increased. */
  55     cpu->interrupt_request &= ~0x01;
  56     tlb_flush(cpu);
  57
  58     /* loadvm has just updated the content of RAM, bypassing the
  59      * usual mechanisms that ensure we flush TBs for writes to
  60      * memory we've translated code from. So we must flush all TBs,
  61      * which will now be stale.
  62      */
  63     tb_flush(cpu);
  64
  65     return 0;
  66 }
  67
  68 static int cpu_common_pre_load(void *opaque)
  69 {
  70     CPUState *cpu = opaque;
  71
  72     cpu->exception_index = -1;
  73
  74     return 0;
  75 }
  76
  77 static bool cpu_common_exception_index_needed(void *opaque)
  78 {
  79     CPUState *cpu = opaque;
  80
  81     return tcg_enabled() && cpu->exception_index != -1;
  82 }
  83
  84 static const VMStateDescription vmstate_cpu_common_exception_index = {
  85     .name = "cpu_common/exception_index",
  86     .version_id = 1,
  87     .minimum_version_id = 1,
  88     .needed = cpu_common_exception_index_needed,
  89     .fields = (VMStateField[]) {
  90         VMSTATE_INT32(exception_index, CPUState),
  91         VMSTATE_END_OF_LIST()
  92     }
  93 };
  94
  95 static bool cpu_common_crash_occurred_needed(void *opaque)
  96 {
  97     CPUState *cpu = opaque;
  98
  99     return cpu->crash_occurred;
 100 }
 101
 102 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
 103     .name = "cpu_common/crash_occurred",
 104     .version_id = 1,
 105     .minimum_version_id = 1,
 106     .needed = cpu_common_crash_occurred_needed,
 107     .fields = (VMStateField[]) {
 108         VMSTATE_BOOL(crash_occurred, CPUState),
 109         VMSTATE_END_OF_LIST()
 110     }
 111 };
 112
 113 const VMStateDescription vmstate_cpu_common = {
 114     .name = "cpu_common",
 115     .version_id = 1,
 116     .minimum_version_id = 1,
 117     .pre_load = cpu_common_pre_load,
 118     .post_load = cpu_common_post_load,
 119     .fields = (VMStateField[]) {
 120         VMSTATE_UINT32(halted, CPUState),
 121         VMSTATE_UINT32(interrupt_request, CPUState),
 122         VMSTATE_END_OF_LIST()
 123     },
 124     .subsections = (const VMStateDescription*[]) {
 125         &vmstate_cpu_common_exception_index,
 126         &vmstate_cpu_common_crash_occurred,
 127         NULL
 128     }
 129 };
 130 #endif
 131
 132 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 133 {
 134     /* cache the cpu class for the hotpath */
 135     cpu->cc = CPU_GET_CLASS(cpu);
 136
 137     cpu_list_add(cpu);
 138     if (!accel_cpu_realizefn(cpu, errp)) {
 139         return;
 140     }
 141     /* NB: errp parameter is unused currently */
 142     if (tcg_enabled()) {
 143         tcg_exec_realizefn(cpu, errp);
 144     }
 145
 146 #ifdef CONFIG_USER_ONLY
 147     assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
 148            qdev_get_vmsd(DEVICE(cpu))->unmigratable);
 149 #else
 150     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 151         vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
 152     }
 153     if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
 154         vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
 155     }
 156 #endif /* CONFIG_USER_ONLY */
 157 }
 158
 159 void cpu_exec_unrealizefn(CPUState *cpu)
 160 {
 161 #ifndef CONFIG_USER_ONLY
 162     CPUClass *cc = CPU_GET_CLASS(cpu);
 163
 164     if (cc->sysemu_ops->legacy_vmsd != NULL) {
 165         vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
 166     }
 167     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 168         vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
 169     }
 170 #endif
 171     if (tcg_enabled()) {
 172         tcg_exec_unrealizefn(cpu);
 173     }
 174
 175     cpu_list_remove(cpu);
 176 }
 177
 178 /*
 179  * This can't go in hw/core/cpu.c because that file is compiled only
 180  * once for both user-mode and system builds.
 181  */
 182 static Property cpu_common_props[] = {
 183 #ifdef CONFIG_USER_ONLY
 184     /*
 185      * Create a property for the user-only object, so users can
 186      * adjust prctl(PR_SET_UNALIGN) from the command-line.
 187      * Has no effect if the target does not support the feature.
 188      */
 189     DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
 190                      prctl_unalign_sigbus, false),
 191 #else
 192     /*
 193      * Create a memory property for softmmu CPU object, so users can
 194      * wire up its memory.  The default if no link is set up is to use
 195      * the system address space.
 196      */
 197     DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
 198                      MemoryRegion *),
 199 #endif
 200     DEFINE_PROP_END_OF_LIST(),
 201 };
 202
 203 static bool cpu_get_start_powered_off(Object *obj, Error **errp)
 204 {
 205     CPUState *cpu = CPU(obj);
 206     return cpu->start_powered_off;
 207 }
 208
 209 static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
 210 {
 211     CPUState *cpu = CPU(obj);
 212     cpu->start_powered_off = value;
 213 }
 214
 215 void cpu_class_init_props(DeviceClass *dc)
 216 {
 217     ObjectClass *oc = OBJECT_CLASS(dc);
 218
 219     device_class_set_props(dc, cpu_common_props);
 220     /*
 221      * We can't use DEFINE_PROP_BOOL in the Property array for this
 222      * property, because we want this to be settable after realize.
 223      */
 224     object_class_property_add_bool(oc, "start-powered-off",
 225                                    cpu_get_start_powered_off,
 226                                    cpu_set_start_powered_off);
 227 }
 228
 229 void cpu_exec_initfn(CPUState *cpu)
 230 {
 231     cpu->as = NULL;
 232     cpu->num_ases = 0;
 233
 234 #ifndef CONFIG_USER_ONLY
 235     cpu->thread_id = qemu_get_thread_id();
 236     cpu->memory = get_system_memory();
 237     object_ref(OBJECT(cpu->memory));
 238 #endif
 239 }
 240
 241 const char *parse_cpu_option(const char *cpu_option)
 242 {
 243     ObjectClass *oc;
 244     CPUClass *cc;
 245     gchar **model_pieces;
 246     const char *cpu_type;
 247
 248     model_pieces = g_strsplit(cpu_option, ",", 2);
 249     if (!model_pieces[0]) {
 250         error_report("-cpu option cannot be empty");
 251         exit(1);
 252     }
 253
 254     oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
 255     if (oc == NULL) {
 256         error_report("unable to find CPU model '%s'", model_pieces[0]);
 257         g_strfreev(model_pieces);
 258         exit(EXIT_FAILURE);
 259     }
 260
 261     cpu_type = object_class_get_name(oc);
 262     cc = CPU_CLASS(oc);
 263     cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
 264     g_strfreev(model_pieces);
 265     return cpu_type;
 266 }
 267
 268 void list_cpus(const char *optarg)
 269 {
 270     /* XXX: implement xxx_cpu_list for targets that still miss it */
 271 #if defined(cpu_list)
 272     cpu_list();
 273 #endif
 274 }
 275
 276 #if defined(CONFIG_USER_ONLY)
 277 void tb_invalidate_phys_addr(target_ulong addr)
 278 {
 279     mmap_lock();
 280     tb_invalidate_phys_page_range(addr, addr + 1);
 281     mmap_unlock();
 282 }
 283 #else
 284 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
 285 {
 286     ram_addr_t ram_addr;
 287     MemoryRegion *mr;
 288     hwaddr l = 1;
 289
 290     if (!tcg_enabled()) {
 291         return;
 292     }
 293
 294     RCU_READ_LOCK_GUARD();
 295     mr = address_space_translate(as, addr, &addr, &l, false, attrs);
 296     if (!(memory_region_is_ram(mr)
 297           || memory_region_is_romd(mr))) {
 298         return;
 299     }
 300     ram_addr = memory_region_get_ram_addr(mr) + addr;
 301     tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
 302 }
 303 #endif
 304
 305 /* Add a breakpoint.  */
 306 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 307                           CPUBreakpoint **breakpoint)
 308 {
 309     CPUClass *cc = CPU_GET_CLASS(cpu);
 310     CPUBreakpoint *bp;
 311
 312     if (cc->gdb_adjust_breakpoint) {
 313         pc = cc->gdb_adjust_breakpoint(cpu, pc);
 314     }
 315
 316     bp = g_malloc(sizeof(*bp));
 317
 318     bp->pc = pc;
 319     bp->flags = flags;
 320
 321     /* keep all GDB-injected breakpoints in front */
 322     if (flags & BP_GDB) {
 323         QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
 324     } else {
 325         QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
 326     }
 327
 328     if (breakpoint) {
 329         *breakpoint = bp;
 330     }
 331
 332     trace_breakpoint_insert(cpu->cpu_index, pc, flags);
 333     return 0;
 334 }
 335
 336 /* Remove a specific breakpoint.  */
 337 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
 338 {
 339     CPUClass *cc = CPU_GET_CLASS(cpu);
 340     CPUBreakpoint *bp;
 341
 342     if (cc->gdb_adjust_breakpoint) {
 343         pc = cc->gdb_adjust_breakpoint(cpu, pc);
 344     }
 345
 346     QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
 347         if (bp->pc == pc && bp->flags == flags) {
 348             cpu_breakpoint_remove_by_ref(cpu, bp);
 349             return 0;
 350         }
 351     }
 352     return -ENOENT;
 353 }
 354
 355 /* Remove a specific breakpoint by reference.  */
 356 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
 357 {
 358     QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
 359
 360     trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
 361     g_free(bp);
 362 }
 363
 364 /* Remove all matching breakpoints. */
 365 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
 366 {
 367     CPUBreakpoint *bp, *next;
 368
 369     QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
 370         if (bp->flags & mask) {
 371             cpu_breakpoint_remove_by_ref(cpu, bp);
 372         }
 373     }
 374 }
 375
 376 /* enable or disable single step mode. EXCP_DEBUG is returned by the
 377    CPU loop after each instruction */
 378 void cpu_single_step(CPUState *cpu, int enabled)
 379 {
 380     if (cpu->singlestep_enabled != enabled) {
 381         cpu->singlestep_enabled = enabled;
 382         if (kvm_enabled()) {
 383             kvm_update_guest_debug(cpu, 0);
 384         }
 385         trace_breakpoint_singlestep(cpu->cpu_index, enabled);
 386     }
 387 }
 388
 389 void cpu_abort(CPUState *cpu, const char *fmt, ...)
 390 {
 391     va_list ap;
 392     va_list ap2;
 393
 394     va_start(ap, fmt);
 395     va_copy(ap2, ap);
 396     fprintf(stderr, "qemu: fatal: ");
 397     vfprintf(stderr, fmt, ap);
 398     fprintf(stderr, "\n");
 399     cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 400     if (qemu_log_separate()) {
 401         FILE *logfile = qemu_log_trylock();
 402         if (logfile) {
 403             fprintf(logfile, "qemu: fatal: ");
 404             vfprintf(logfile, fmt, ap2);
 405             fprintf(logfile, "\n");
 406             cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 407             qemu_log_unlock(logfile);
 408         }
 409     }
 410     va_end(ap2);
 411     va_end(ap);
 412     replay_finish();
 413 #if defined(CONFIG_USER_ONLY)
 414     {
 415         struct sigaction act;
 416         sigfillset(&act.sa_mask);
 417         act.sa_handler = SIG_DFL;
 418         act.sa_flags = 0;
 419         sigaction(SIGABRT, &act, NULL);
 420     }
 421 #endif
 422     abort();
 423 }
 424
 425 /* physical memory access (slow version, mainly for debug) */
 426 #if defined(CONFIG_USER_ONLY)
 427 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
 428                         void *ptr, size_t len, bool is_write)
 429 {
 430     int flags;
 431     vaddr l, page;
 432     void * p;
 433     uint8_t *buf = ptr;
 434
 435     while (len > 0) {
 436         page = addr & TARGET_PAGE_MASK;
 437         l = (page + TARGET_PAGE_SIZE) - addr;
 438         if (l > len)
 439             l = len;
 440         flags = page_get_flags(page);
 441         if (!(flags & PAGE_VALID))
 442             return -1;
 443         if (is_write) {
 444             if (!(flags & PAGE_WRITE))
 445                 return -1;
 446             /* XXX: this code should not depend on lock_user */
 447             if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
 448                 return -1;
 449             memcpy(p, buf, l);
 450             unlock_user(p, addr, l);
 451         } else {
 452             if (!(flags & PAGE_READ))
 453                 return -1;
 454             /* XXX: this code should not depend on lock_user */
 455             if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
 456                 return -1;
 457             memcpy(buf, p, l);
 458             unlock_user(p, addr, 0);
 459         }
 460         len -= l;
 461         buf += l;
 462         addr += l;
 463     }
 464     return 0;
 465 }
 466 #endif
 467
 468 bool target_words_bigendian(void)
 469 {
 470 #if TARGET_BIG_ENDIAN
 471     return true;
 472 #else
 473     return false;
 474 #endif
 475 }
 476
 477 void page_size_init(void)
 478 {
 479     /* NOTE: we can always suppose that qemu_host_page_size >=
 480        TARGET_PAGE_SIZE */
 481     if (qemu_host_page_size == 0) {
 482         qemu_host_page_size = qemu_real_host_page_size();
 483     }
 484     if (qemu_host_page_size < TARGET_PAGE_SIZE) {
 485         qemu_host_page_size = TARGET_PAGE_SIZE;
 486     }
 487     qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
 488 }