hw/arm/virt: introduce DEFINE_VIRT_MACHINE
[qemu/ar7.git] / tests / tcg / mips / mips32-dsp / dpaq_sa_l_w.c
blobcbf900713f33ebff604fc6b49f1cbd7ee8d2f004
1 #include<stdio.h>
2 #include<assert.h>
4 int main()
6 int rs, rt, dsp;
7 int ach = 0, acl = 0;
8 int resulth, resultl, resultdsp;
10 rs = 0x80000000;
11 rt = 0x80000000;
12 resulth = 0x7FFFFFFF;
13 resultl = 0xFFFFFFFF;
14 resultdsp = 0x01;
15 __asm
16 ("mthi %0, $ac1\n\t"
17 "mtlo %1, $ac1\n\t"
18 "dpaq_sa.l.w $ac1, %3, %4\n\t"
19 "mfhi %0, $ac1\n\t"
20 "mflo %1, $ac1\n\t"
21 "rddsp %2\n\t"
22 : "+r"(ach), "+r"(acl), "=r"(dsp)
23 : "r"(rs), "r"(rt)
25 dsp = (dsp >> 17) & 0x01;
26 assert(dsp == resultdsp);
27 assert(ach == resulth);
28 assert(acl == resultl);
30 ach = 0x00000012;
31 acl = 0x00000048;
32 rs = 0x80000000;
33 rt = 0x80000000;
35 resulth = 0x7FFFFFFF;
36 resultl = 0xFFFFFFFF;
37 resultdsp = 0x01;
38 __asm
39 ("mthi %0, $ac1\n\t"
40 "mtlo %1, $ac1\n\t"
41 "dpaq_sa.l.w $ac1, %3, %4\n\t"
42 "mfhi %0, $ac1\n\t"
43 "mflo %1, $ac1\n\t"
44 "rddsp %2\n\t"
45 : "+r"(ach), "+r"(acl), "=r"(dsp)
46 : "r"(rs), "r"(rt)
48 dsp = (dsp >> 17) & 0x01;
49 assert(dsp == resultdsp);
50 assert(ach == resulth);
51 assert(acl == resultl);
53 ach = 0x741532A0;
54 acl = 0xFCEABB08;
55 rs = 0x80000000;
56 rt = 0x80000000;
58 resulth = 0x7FFFFFFF;
59 resultl = 0xFFFFFFFF;
60 resultdsp = 0x01;
61 __asm
62 ("mthi %0, $ac1\n\t"
63 "mtlo %1, $ac1\n\t"
64 "dpaq_sa.l.w $ac1, %3, %4\n\t"
65 "mfhi %0, $ac1\n\t"
66 "mflo %1, $ac1\n\t"
67 "rddsp %2\n\t"
68 : "+r"(ach), "+r"(acl), "=r"(dsp)
69 : "r"(rs), "r"(rt)
71 dsp = (dsp >> 17) & 0x01;
72 assert(dsp == resultdsp);
73 assert(ach == resulth);
74 assert(acl == resultl);
76 ach = 0;
77 acl = 0;
78 rs = 0xC0000000;
79 rt = 0x7FFFFFFF;
81 resulth = 0xC0000000;
82 resultl = 0x80000000;
83 resultdsp = 0;
84 __asm
85 ("wrdsp $0\n\t"
86 "mthi %0, $ac1\n\t"
87 "mtlo %1, $ac1\n\t"
88 "dpaq_sa.l.w $ac1, %3, %4\n\t"
89 "mfhi %0, $ac1\n\t"
90 "mflo %1, $ac1\n\t"
91 "rddsp %2\n\t"
92 : "+r"(ach), "+r"(acl), "=r"(dsp)
93 : "r"(rs), "r"(rt)
95 dsp = (dsp >> 17) & 0x01;
96 assert(dsp == resultdsp);
97 assert(ach == resulth);
98 assert(acl == resultl);
100 ach = 0x20000000;
101 acl = 0;
102 rs = 0xE0000000;
103 rt = 0x7FFFFFFF;
105 resulth = 0;
106 resultl = 0x40000000;
107 resultdsp = 0;
108 __asm
109 ("wrdsp $0\n\t"
110 "mthi %0, $ac1\n\t"
111 "mtlo %1, $ac1\n\t"
112 "dpaq_sa.l.w $ac1, %3, %4\n\t"
113 "mfhi %0, $ac1\n\t"
114 "mflo %1, $ac1\n\t"
115 "rddsp %2\n\t"
116 : "+r"(ach), "+r"(acl), "=r"(dsp)
117 : "r"(rs), "r"(rt)
119 dsp = (dsp >> 17) & 0x01;
120 assert(dsp == resultdsp);
121 assert(ach == resulth);
122 assert(acl == resultl);
124 return 0;