target/mips: Move translate.h to tcg/ sub directory
[qemu/ar7.git] / linux-headers / asm-x86 / kvm.h
blob0662f644aad9da71e25b9f7554d20d6981a5e7c7
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
5 /*
6 * KVM x86 specific structures and definitions
8 */
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
15 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
17 #define DE_VECTOR 0
18 #define DB_VECTOR 1
19 #define BP_VECTOR 3
20 #define OF_VECTOR 4
21 #define BR_VECTOR 5
22 #define UD_VECTOR 6
23 #define NM_VECTOR 7
24 #define DF_VECTOR 8
25 #define TS_VECTOR 10
26 #define NP_VECTOR 11
27 #define SS_VECTOR 12
28 #define GP_VECTOR 13
29 #define PF_VECTOR 14
30 #define MF_VECTOR 16
31 #define AC_VECTOR 17
32 #define MC_VECTOR 18
33 #define XM_VECTOR 19
34 #define VE_VECTOR 20
36 /* Select x86 specific features in <linux/kvm.h> */
37 #define __KVM_HAVE_PIT
38 #define __KVM_HAVE_IOAPIC
39 #define __KVM_HAVE_IRQ_LINE
40 #define __KVM_HAVE_MSI
41 #define __KVM_HAVE_USER_NMI
42 #define __KVM_HAVE_GUEST_DEBUG
43 #define __KVM_HAVE_MSIX
44 #define __KVM_HAVE_MCE
45 #define __KVM_HAVE_PIT_STATE2
46 #define __KVM_HAVE_XEN_HVM
47 #define __KVM_HAVE_VCPU_EVENTS
48 #define __KVM_HAVE_DEBUGREGS
49 #define __KVM_HAVE_XSAVE
50 #define __KVM_HAVE_XCRS
51 #define __KVM_HAVE_READONLY_MEM
53 /* Architectural interrupt line count. */
54 #define KVM_NR_INTERRUPTS 256
56 struct kvm_memory_alias {
57 __u32 slot; /* this has a different namespace than memory slots */
58 __u32 flags;
59 __u64 guest_phys_addr;
60 __u64 memory_size;
61 __u64 target_phys_addr;
64 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
65 struct kvm_pic_state {
66 __u8 last_irr; /* edge detection */
67 __u8 irr; /* interrupt request register */
68 __u8 imr; /* interrupt mask register */
69 __u8 isr; /* interrupt service register */
70 __u8 priority_add; /* highest irq priority */
71 __u8 irq_base;
72 __u8 read_reg_select;
73 __u8 poll;
74 __u8 special_mask;
75 __u8 init_state;
76 __u8 auto_eoi;
77 __u8 rotate_on_auto_eoi;
78 __u8 special_fully_nested_mode;
79 __u8 init4; /* true if 4 byte init */
80 __u8 elcr; /* PIIX edge/trigger selection */
81 __u8 elcr_mask;
84 #define KVM_IOAPIC_NUM_PINS 24
85 struct kvm_ioapic_state {
86 __u64 base_address;
87 __u32 ioregsel;
88 __u32 id;
89 __u32 irr;
90 __u32 pad;
91 union {
92 __u64 bits;
93 struct {
94 __u8 vector;
95 __u8 delivery_mode:3;
96 __u8 dest_mode:1;
97 __u8 delivery_status:1;
98 __u8 polarity:1;
99 __u8 remote_irr:1;
100 __u8 trig_mode:1;
101 __u8 mask:1;
102 __u8 reserve:7;
103 __u8 reserved[4];
104 __u8 dest_id;
105 } fields;
106 } redirtbl[KVM_IOAPIC_NUM_PINS];
109 #define KVM_IRQCHIP_PIC_MASTER 0
110 #define KVM_IRQCHIP_PIC_SLAVE 1
111 #define KVM_IRQCHIP_IOAPIC 2
112 #define KVM_NR_IRQCHIPS 3
114 #define KVM_RUN_X86_SMM (1 << 0)
115 #define KVM_RUN_X86_BUS_LOCK (1 << 1)
117 /* for KVM_GET_REGS and KVM_SET_REGS */
118 struct kvm_regs {
119 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
120 __u64 rax, rbx, rcx, rdx;
121 __u64 rsi, rdi, rsp, rbp;
122 __u64 r8, r9, r10, r11;
123 __u64 r12, r13, r14, r15;
124 __u64 rip, rflags;
127 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
128 #define KVM_APIC_REG_SIZE 0x400
129 struct kvm_lapic_state {
130 char regs[KVM_APIC_REG_SIZE];
133 struct kvm_segment {
134 __u64 base;
135 __u32 limit;
136 __u16 selector;
137 __u8 type;
138 __u8 present, dpl, db, s, l, g, avl;
139 __u8 unusable;
140 __u8 padding;
143 struct kvm_dtable {
144 __u64 base;
145 __u16 limit;
146 __u16 padding[3];
150 /* for KVM_GET_SREGS and KVM_SET_SREGS */
151 struct kvm_sregs {
152 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
153 struct kvm_segment cs, ds, es, fs, gs, ss;
154 struct kvm_segment tr, ldt;
155 struct kvm_dtable gdt, idt;
156 __u64 cr0, cr2, cr3, cr4, cr8;
157 __u64 efer;
158 __u64 apic_base;
159 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
162 /* for KVM_GET_FPU and KVM_SET_FPU */
163 struct kvm_fpu {
164 __u8 fpr[8][16];
165 __u16 fcw;
166 __u16 fsw;
167 __u8 ftwx; /* in fxsave format */
168 __u8 pad1;
169 __u16 last_opcode;
170 __u64 last_ip;
171 __u64 last_dp;
172 __u8 xmm[16][16];
173 __u32 mxcsr;
174 __u32 pad2;
177 struct kvm_msr_entry {
178 __u32 index;
179 __u32 reserved;
180 __u64 data;
183 /* for KVM_GET_MSRS and KVM_SET_MSRS */
184 struct kvm_msrs {
185 __u32 nmsrs; /* number of msrs in entries */
186 __u32 pad;
188 struct kvm_msr_entry entries[0];
191 /* for KVM_GET_MSR_INDEX_LIST */
192 struct kvm_msr_list {
193 __u32 nmsrs; /* number of msrs in entries */
194 __u32 indices[0];
197 /* Maximum size of any access bitmap in bytes */
198 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
200 /* for KVM_X86_SET_MSR_FILTER */
201 struct kvm_msr_filter_range {
202 #define KVM_MSR_FILTER_READ (1 << 0)
203 #define KVM_MSR_FILTER_WRITE (1 << 1)
204 __u32 flags;
205 __u32 nmsrs; /* number of msrs in bitmap */
206 __u32 base; /* MSR index the bitmap starts at */
207 __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
210 #define KVM_MSR_FILTER_MAX_RANGES 16
211 struct kvm_msr_filter {
212 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
213 #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
214 __u32 flags;
215 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
218 struct kvm_cpuid_entry {
219 __u32 function;
220 __u32 eax;
221 __u32 ebx;
222 __u32 ecx;
223 __u32 edx;
224 __u32 padding;
227 /* for KVM_SET_CPUID */
228 struct kvm_cpuid {
229 __u32 nent;
230 __u32 padding;
231 struct kvm_cpuid_entry entries[0];
234 struct kvm_cpuid_entry2 {
235 __u32 function;
236 __u32 index;
237 __u32 flags;
238 __u32 eax;
239 __u32 ebx;
240 __u32 ecx;
241 __u32 edx;
242 __u32 padding[3];
245 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
246 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
247 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
249 /* for KVM_SET_CPUID2 */
250 struct kvm_cpuid2 {
251 __u32 nent;
252 __u32 padding;
253 struct kvm_cpuid_entry2 entries[0];
256 /* for KVM_GET_PIT and KVM_SET_PIT */
257 struct kvm_pit_channel_state {
258 __u32 count; /* can be 65536 */
259 __u16 latched_count;
260 __u8 count_latched;
261 __u8 status_latched;
262 __u8 status;
263 __u8 read_state;
264 __u8 write_state;
265 __u8 write_latch;
266 __u8 rw_mode;
267 __u8 mode;
268 __u8 bcd;
269 __u8 gate;
270 __s64 count_load_time;
273 struct kvm_debug_exit_arch {
274 __u32 exception;
275 __u32 pad;
276 __u64 pc;
277 __u64 dr6;
278 __u64 dr7;
281 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
282 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
283 #define KVM_GUESTDBG_INJECT_DB 0x00040000
284 #define KVM_GUESTDBG_INJECT_BP 0x00080000
286 /* for KVM_SET_GUEST_DEBUG */
287 struct kvm_guest_debug_arch {
288 __u64 debugreg[8];
291 struct kvm_pit_state {
292 struct kvm_pit_channel_state channels[3];
295 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
297 struct kvm_pit_state2 {
298 struct kvm_pit_channel_state channels[3];
299 __u32 flags;
300 __u32 reserved[9];
303 struct kvm_reinject_control {
304 __u8 pit_reinject;
305 __u8 reserved[31];
308 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
309 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
310 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
311 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
312 #define KVM_VCPUEVENT_VALID_SMM 0x00000008
313 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
315 /* Interrupt shadow states */
316 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
317 #define KVM_X86_SHADOW_INT_STI 0x02
319 /* for KVM_GET/SET_VCPU_EVENTS */
320 struct kvm_vcpu_events {
321 struct {
322 __u8 injected;
323 __u8 nr;
324 __u8 has_error_code;
325 __u8 pending;
326 __u32 error_code;
327 } exception;
328 struct {
329 __u8 injected;
330 __u8 nr;
331 __u8 soft;
332 __u8 shadow;
333 } interrupt;
334 struct {
335 __u8 injected;
336 __u8 pending;
337 __u8 masked;
338 __u8 pad;
339 } nmi;
340 __u32 sipi_vector;
341 __u32 flags;
342 struct {
343 __u8 smm;
344 __u8 pending;
345 __u8 smm_inside_nmi;
346 __u8 latched_init;
347 } smi;
348 __u8 reserved[27];
349 __u8 exception_has_payload;
350 __u64 exception_payload;
353 /* for KVM_GET/SET_DEBUGREGS */
354 struct kvm_debugregs {
355 __u64 db[4];
356 __u64 dr6;
357 __u64 dr7;
358 __u64 flags;
359 __u64 reserved[9];
362 /* for KVM_CAP_XSAVE */
363 struct kvm_xsave {
364 __u32 region[1024];
367 #define KVM_MAX_XCRS 16
369 struct kvm_xcr {
370 __u32 xcr;
371 __u32 reserved;
372 __u64 value;
375 struct kvm_xcrs {
376 __u32 nr_xcrs;
377 __u32 flags;
378 struct kvm_xcr xcrs[KVM_MAX_XCRS];
379 __u64 padding[16];
382 #define KVM_SYNC_X86_REGS (1UL << 0)
383 #define KVM_SYNC_X86_SREGS (1UL << 1)
384 #define KVM_SYNC_X86_EVENTS (1UL << 2)
386 #define KVM_SYNC_X86_VALID_FIELDS \
387 (KVM_SYNC_X86_REGS| \
388 KVM_SYNC_X86_SREGS| \
389 KVM_SYNC_X86_EVENTS)
391 /* kvm_sync_regs struct included by kvm_run struct */
392 struct kvm_sync_regs {
393 /* Members of this structure are potentially malicious.
394 * Care must be taken by code reading, esp. interpreting,
395 * data fields from them inside KVM to prevent TOCTOU and
396 * double-fetch types of vulnerabilities.
398 struct kvm_regs regs;
399 struct kvm_sregs sregs;
400 struct kvm_vcpu_events events;
403 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
404 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
405 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
406 #define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
407 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
409 #define KVM_STATE_NESTED_FORMAT_VMX 0
410 #define KVM_STATE_NESTED_FORMAT_SVM 1
412 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001
413 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002
414 #define KVM_STATE_NESTED_EVMCS 0x00000004
415 #define KVM_STATE_NESTED_MTF_PENDING 0x00000008
416 #define KVM_STATE_NESTED_GIF_SET 0x00000100
418 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
419 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002
421 #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
423 #define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
425 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
427 struct kvm_vmx_nested_state_data {
428 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
429 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
432 struct kvm_vmx_nested_state_hdr {
433 __u64 vmxon_pa;
434 __u64 vmcs12_pa;
436 struct {
437 __u16 flags;
438 } smm;
440 __u16 pad;
442 __u32 flags;
443 __u64 preemption_timer_deadline;
446 struct kvm_svm_nested_state_data {
447 /* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */
448 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
451 struct kvm_svm_nested_state_hdr {
452 __u64 vmcb_pa;
455 /* for KVM_CAP_NESTED_STATE */
456 struct kvm_nested_state {
457 __u16 flags;
458 __u16 format;
459 __u32 size;
461 union {
462 struct kvm_vmx_nested_state_hdr vmx;
463 struct kvm_svm_nested_state_hdr svm;
465 /* Pad the header to 128 bytes. */
466 __u8 pad[120];
467 } hdr;
470 * Define data region as 0 bytes to preserve backwards-compatability
471 * to old definition of kvm_nested_state in order to avoid changing
472 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
474 union {
475 struct kvm_vmx_nested_state_data vmx[0];
476 struct kvm_svm_nested_state_data svm[0];
477 } data;
480 /* for KVM_CAP_PMU_EVENT_FILTER */
481 struct kvm_pmu_event_filter {
482 __u32 action;
483 __u32 nevents;
484 __u32 fixed_counter_bitmap;
485 __u32 flags;
486 __u32 pad[4];
487 __u64 events[0];
490 #define KVM_PMU_EVENT_ALLOW 0
491 #define KVM_PMU_EVENT_DENY 1
493 #endif /* _ASM_X86_KVM_H */