hw/arm/mcimx7d-sabre.c

   1 /*
   2  * Copyright (c) 2018, Impinj, Inc.
   3  *
   4  * MCIMX7D_SABRE Board System emulation.
   5  *
   6  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
   7  *
   8  * This code is licensed under the GPL, version 2 or later.
   9  * See the file `COPYING' in the top level directory.
  10  *
  11  * It (partially) emulates a mcimx7d_sabre board, with a Freescale
  12  * i.MX7 SoC
  13  */
  14
  15 #include "qemu/osdep.h"
  16 #include "qapi/error.h"
  17 #include "hw/arm/fsl-imx7.h"
  18 #include "hw/boards.h"
  19 #include "hw/qdev-properties.h"
  20 #include "sysemu/sysemu.h"
  21 #include "qemu/error-report.h"
  22 #include "sysemu/qtest.h"
  23
  24 typedef struct {
  25     FslIMX7State soc;
  26     MemoryRegion ram;
  27 } MCIMX7Sabre;
  28
  29 static void mcimx7d_sabre_init(MachineState *machine)
  30 {
  31     static struct arm_boot_info boot_info;
  32     MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1);
  33     Object *soc;
  34     int i;
  35
  36     if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
  37         error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
  38                      machine->ram_size, FSL_IMX7_MMDC_SIZE);
  39         exit(1);
  40     }
  41
  42     boot_info = (struct arm_boot_info) {
  43         .loader_start = FSL_IMX7_MMDC_ADDR,
  44         .board_id = -1,
  45         .ram_size = machine->ram_size,
  46         .kernel_filename = machine->kernel_filename,
  47         .kernel_cmdline = machine->kernel_cmdline,
  48         .initrd_filename = machine->initrd_filename,
  49         .nb_cpus = machine->smp.cpus,
  50     };
  51
  52     object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
  53     soc = OBJECT(&s->soc);
  54     object_property_add_child(OBJECT(machine), "soc", soc, &error_fatal);
  55     object_property_set_bool(soc, true, "realized", &error_fatal);
  56
  57     memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram",
  58                                          machine->ram_size);
  59     memory_region_add_subregion(get_system_memory(),
  60                                 FSL_IMX7_MMDC_ADDR, &s->ram);
  61
  62     for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
  63         BusState *bus;
  64         DeviceState *carddev;
  65         DriveInfo *di;
  66         BlockBackend *blk;
  67
  68         di = drive_get_next(IF_SD);
  69         blk = di ? blk_by_legacy_dinfo(di) : NULL;
  70         bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus");
  71         carddev = qdev_create(bus, TYPE_SD_CARD);
  72         qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
  73         object_property_set_bool(OBJECT(carddev), true,
  74                                  "realized", &error_fatal);
  75     }
  76
  77     if (!qtest_enabled()) {
  78         arm_load_kernel(&s->soc.cpu[0], &boot_info);
  79     }
  80 }
  81
  82 static void mcimx7d_sabre_machine_init(MachineClass *mc)
  83 {
  84     mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)";
  85     mc->init = mcimx7d_sabre_init;
  86     mc->max_cpus = FSL_IMX7_NUM_CPUS;
  87 }
  88 DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)