arm: Implement uniprocessor with MP config
[qemu/ar7.git] / cpu-exec.c
blob2ffeb6e40d228b56732004da68af726787cc7761
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "config.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "tcg.h"
24 #include "qemu/atomic.h"
25 #include "sysemu/qtest.h"
26 #include "qemu/timer.h"
27 #include "exec/address-spaces.h"
28 #include "exec/memory-internal.h"
29 #include "qemu/rcu.h"
31 /* -icount align implementation. */
33 typedef struct SyncClocks {
34 int64_t diff_clk;
35 int64_t last_cpu_icount;
36 int64_t realtime_clock;
37 } SyncClocks;
39 #if !defined(CONFIG_USER_ONLY)
40 /* Allow the guest to have a max 3ms advance.
41 * The difference between the 2 clocks could therefore
42 * oscillate around 0.
44 #define VM_CLOCK_ADVANCE 3000000
45 #define THRESHOLD_REDUCE 1.5
46 #define MAX_DELAY_PRINT_RATE 2000000000LL
47 #define MAX_NB_PRINTS 100
49 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
51 int64_t cpu_icount;
53 if (!icount_align_option) {
54 return;
57 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
58 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
59 sc->last_cpu_icount = cpu_icount;
61 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
62 #ifndef _WIN32
63 struct timespec sleep_delay, rem_delay;
64 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
65 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
66 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
67 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
68 } else {
69 sc->diff_clk = 0;
71 #else
72 Sleep(sc->diff_clk / SCALE_MS);
73 sc->diff_clk = 0;
74 #endif
78 static void print_delay(const SyncClocks *sc)
80 static float threshold_delay;
81 static int64_t last_realtime_clock;
82 static int nb_prints;
84 if (icount_align_option &&
85 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
86 nb_prints < MAX_NB_PRINTS) {
87 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
88 (-sc->diff_clk / (float)1000000000LL <
89 (threshold_delay - THRESHOLD_REDUCE))) {
90 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
91 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
92 threshold_delay - 1,
93 threshold_delay);
94 nb_prints++;
95 last_realtime_clock = sc->realtime_clock;
100 static void init_delay_params(SyncClocks *sc,
101 const CPUState *cpu)
103 if (!icount_align_option) {
104 return;
106 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
107 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
108 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
109 if (sc->diff_clk < max_delay) {
110 max_delay = sc->diff_clk;
112 if (sc->diff_clk > max_advance) {
113 max_advance = sc->diff_clk;
116 /* Print every 2s max if the guest is late. We limit the number
117 of printed messages to NB_PRINT_MAX(currently 100) */
118 print_delay(sc);
120 #else
121 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
125 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
128 #endif /* CONFIG USER ONLY */
130 void cpu_loop_exit(CPUState *cpu)
132 cpu->current_tb = NULL;
133 siglongjmp(cpu->jmp_env, 1);
136 /* exit the current TB from a signal handler. The host registers are
137 restored in a state compatible with the CPU emulator
139 #if defined(CONFIG_SOFTMMU)
140 void cpu_resume_from_signal(CPUState *cpu, void *puc)
142 /* XXX: restore cpu registers saved in host registers */
144 cpu->exception_index = -1;
145 siglongjmp(cpu->jmp_env, 1);
148 void cpu_reload_memory_map(CPUState *cpu)
150 AddressSpaceDispatch *d;
152 if (qemu_in_vcpu_thread()) {
153 /* Do not let the guest prolong the critical section as much as it
154 * as it desires.
156 * Currently, this is prevented by the I/O thread's periodinc kicking
157 * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
158 * but this will go away once TCG's execution moves out of the global
159 * mutex.
161 * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
162 * only protects cpu->as->dispatch. Since we reload it below, we can
163 * split the critical section.
165 rcu_read_unlock();
166 rcu_read_lock();
169 /* The CPU and TLB are protected by the iothread lock. */
170 d = atomic_rcu_read(&cpu->as->dispatch);
171 cpu->memory_dispatch = d;
172 tlb_flush(cpu, 1);
174 #endif
176 /* Execute a TB, and fix up the CPU state afterwards if necessary */
177 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
179 CPUArchState *env = cpu->env_ptr;
180 uintptr_t next_tb;
182 #if defined(DEBUG_DISAS)
183 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
184 #if defined(TARGET_I386)
185 log_cpu_state(cpu, CPU_DUMP_CCOP);
186 #elif defined(TARGET_M68K)
187 /* ??? Should not modify env state for dumping. */
188 cpu_m68k_flush_flags(env, env->cc_op);
189 env->cc_op = CC_OP_FLAGS;
190 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
191 log_cpu_state(cpu, 0);
192 #else
193 log_cpu_state(cpu, 0);
194 #endif
196 #endif /* DEBUG_DISAS */
198 cpu->can_do_io = 0;
199 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
200 cpu->can_do_io = 1;
201 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
202 next_tb & TB_EXIT_MASK);
204 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
205 /* We didn't start executing this TB (eg because the instruction
206 * counter hit zero); we must restore the guest PC to the address
207 * of the start of the TB.
209 CPUClass *cc = CPU_GET_CLASS(cpu);
210 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
211 if (cc->synchronize_from_tb) {
212 cc->synchronize_from_tb(cpu, tb);
213 } else {
214 assert(cc->set_pc);
215 cc->set_pc(cpu, tb->pc);
218 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
219 /* We were asked to stop executing TBs (probably a pending
220 * interrupt. We've now stopped, so clear the flag.
222 cpu->tcg_exit_req = 0;
224 return next_tb;
227 /* Execute the code without caching the generated code. An interpreter
228 could be used if available. */
229 static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
230 TranslationBlock *orig_tb)
232 CPUState *cpu = ENV_GET_CPU(env);
233 TranslationBlock *tb;
234 target_ulong pc = orig_tb->pc;
235 target_ulong cs_base = orig_tb->cs_base;
236 uint64_t flags = orig_tb->flags;
238 /* Should never happen.
239 We only end up here when an existing TB is too long. */
240 if (max_cycles > CF_COUNT_MASK)
241 max_cycles = CF_COUNT_MASK;
243 /* tb_gen_code can flush our orig_tb, invalidate it now */
244 tb_phys_invalidate(orig_tb, -1);
245 tb = tb_gen_code(cpu, pc, cs_base, flags,
246 max_cycles | CF_NOCACHE);
247 cpu->current_tb = tb;
248 /* execute the generated code */
249 trace_exec_tb_nocache(tb, tb->pc);
250 cpu_tb_exec(cpu, tb->tc_ptr);
251 cpu->current_tb = NULL;
252 tb_phys_invalidate(tb, -1);
253 tb_free(tb);
256 static TranslationBlock *tb_find_slow(CPUArchState *env,
257 target_ulong pc,
258 target_ulong cs_base,
259 uint64_t flags)
261 CPUState *cpu = ENV_GET_CPU(env);
262 TranslationBlock *tb, **ptb1;
263 unsigned int h;
264 tb_page_addr_t phys_pc, phys_page1;
265 target_ulong virt_page2;
267 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
269 /* find translated block using physical mappings */
270 phys_pc = get_page_addr_code(env, pc);
271 phys_page1 = phys_pc & TARGET_PAGE_MASK;
272 h = tb_phys_hash_func(phys_pc);
273 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
274 for(;;) {
275 tb = *ptb1;
276 if (!tb)
277 goto not_found;
278 if (tb->pc == pc &&
279 tb->page_addr[0] == phys_page1 &&
280 tb->cs_base == cs_base &&
281 tb->flags == flags) {
282 /* check next page if needed */
283 if (tb->page_addr[1] != -1) {
284 tb_page_addr_t phys_page2;
286 virt_page2 = (pc & TARGET_PAGE_MASK) +
287 TARGET_PAGE_SIZE;
288 phys_page2 = get_page_addr_code(env, virt_page2);
289 if (tb->page_addr[1] == phys_page2)
290 goto found;
291 } else {
292 goto found;
295 ptb1 = &tb->phys_hash_next;
297 not_found:
298 /* if no translated code available, then translate it now */
299 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
301 found:
302 /* Move the last found TB to the head of the list */
303 if (likely(*ptb1)) {
304 *ptb1 = tb->phys_hash_next;
305 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
306 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
308 /* we add the TB in the virtual pc hash table */
309 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
310 return tb;
313 static inline TranslationBlock *tb_find_fast(CPUArchState *env)
315 CPUState *cpu = ENV_GET_CPU(env);
316 TranslationBlock *tb;
317 target_ulong cs_base, pc;
318 int flags;
320 /* we record a subset of the CPU state. It will
321 always be the same before a given translated block
322 is executed. */
323 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
324 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
325 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
326 tb->flags != flags)) {
327 tb = tb_find_slow(env, pc, cs_base, flags);
329 return tb;
332 static void cpu_handle_debug_exception(CPUArchState *env)
334 CPUState *cpu = ENV_GET_CPU(env);
335 CPUClass *cc = CPU_GET_CLASS(cpu);
336 CPUWatchpoint *wp;
338 if (!cpu->watchpoint_hit) {
339 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
340 wp->flags &= ~BP_WATCHPOINT_HIT;
344 cc->debug_excp_handler(cpu);
347 /* main execution loop */
349 volatile sig_atomic_t exit_request;
351 int cpu_exec(CPUArchState *env)
353 CPUState *cpu = ENV_GET_CPU(env);
354 CPUClass *cc = CPU_GET_CLASS(cpu);
355 #ifdef TARGET_I386
356 X86CPU *x86_cpu = X86_CPU(cpu);
357 #endif
358 int ret, interrupt_request;
359 TranslationBlock *tb;
360 uint8_t *tc_ptr;
361 uintptr_t next_tb;
362 SyncClocks sc;
364 /* This must be volatile so it is not trashed by longjmp() */
365 volatile bool have_tb_lock = false;
367 if (cpu->halted) {
368 if (!cpu_has_work(cpu)) {
369 return EXCP_HALTED;
372 cpu->halted = 0;
375 current_cpu = cpu;
377 /* As long as current_cpu is null, up to the assignment just above,
378 * requests by other threads to exit the execution loop are expected to
379 * be issued using the exit_request global. We must make sure that our
380 * evaluation of the global value is performed past the current_cpu
381 * value transition point, which requires a memory barrier as well as
382 * an instruction scheduling constraint on modern architectures. */
383 smp_mb();
385 rcu_read_lock();
387 if (unlikely(exit_request)) {
388 cpu->exit_request = 1;
391 cc->cpu_exec_enter(cpu);
393 /* Calculate difference between guest clock and host clock.
394 * This delay includes the delay of the last cycle, so
395 * what we have to do is sleep until it is 0. As for the
396 * advance/delay we gain here, we try to fix it next time.
398 init_delay_params(&sc, cpu);
400 /* prepare setjmp context for exception handling */
401 for(;;) {
402 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
403 /* if an exception is pending, we execute it here */
404 if (cpu->exception_index >= 0) {
405 if (cpu->exception_index >= EXCP_INTERRUPT) {
406 /* exit request from the cpu execution loop */
407 ret = cpu->exception_index;
408 if (ret == EXCP_DEBUG) {
409 cpu_handle_debug_exception(env);
411 cpu->exception_index = -1;
412 break;
413 } else {
414 #if defined(CONFIG_USER_ONLY)
415 /* if user mode only, we simulate a fake exception
416 which will be handled outside the cpu execution
417 loop */
418 #if defined(TARGET_I386)
419 cc->do_interrupt(cpu);
420 #endif
421 ret = cpu->exception_index;
422 cpu->exception_index = -1;
423 break;
424 #else
425 cc->do_interrupt(cpu);
426 cpu->exception_index = -1;
427 #endif
431 next_tb = 0; /* force lookup of first TB */
432 for(;;) {
433 interrupt_request = cpu->interrupt_request;
434 if (unlikely(interrupt_request)) {
435 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
436 /* Mask out external interrupts for this step. */
437 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
439 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
440 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
441 cpu->exception_index = EXCP_DEBUG;
442 cpu_loop_exit(cpu);
444 if (interrupt_request & CPU_INTERRUPT_HALT) {
445 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
446 cpu->halted = 1;
447 cpu->exception_index = EXCP_HLT;
448 cpu_loop_exit(cpu);
450 #if defined(TARGET_I386)
451 if (interrupt_request & CPU_INTERRUPT_INIT) {
452 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
453 do_cpu_init(x86_cpu);
454 cpu->exception_index = EXCP_HALTED;
455 cpu_loop_exit(cpu);
457 #else
458 if (interrupt_request & CPU_INTERRUPT_RESET) {
459 cpu_reset(cpu);
461 #endif
462 /* The target hook has 3 exit conditions:
463 False when the interrupt isn't processed,
464 True when it is, and we should restart on a new TB,
465 and via longjmp via cpu_loop_exit. */
466 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
467 next_tb = 0;
469 /* Don't use the cached interrupt_request value,
470 do_interrupt may have updated the EXITTB flag. */
471 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
472 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
473 /* ensure that no TB jump will be modified as
474 the program flow was changed */
475 next_tb = 0;
478 if (unlikely(cpu->exit_request)) {
479 cpu->exit_request = 0;
480 cpu->exception_index = EXCP_INTERRUPT;
481 cpu_loop_exit(cpu);
483 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
484 have_tb_lock = true;
485 tb = tb_find_fast(env);
486 /* Note: we do it here to avoid a gcc bug on Mac OS X when
487 doing it in tb_find_slow */
488 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
489 /* as some TB could have been invalidated because
490 of memory exceptions while generating the code, we
491 must recompute the hash index here */
492 next_tb = 0;
493 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
495 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
496 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
497 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
499 /* see if we can patch the calling TB. When the TB
500 spans two pages, we cannot safely do a direct
501 jump. */
502 if (next_tb != 0 && tb->page_addr[1] == -1) {
503 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
504 next_tb & TB_EXIT_MASK, tb);
506 have_tb_lock = false;
507 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
509 /* cpu_interrupt might be called while translating the
510 TB, but before it is linked into a potentially
511 infinite loop and becomes env->current_tb. Avoid
512 starting execution if there is a pending interrupt. */
513 cpu->current_tb = tb;
514 barrier();
515 if (likely(!cpu->exit_request)) {
516 trace_exec_tb(tb, tb->pc);
517 tc_ptr = tb->tc_ptr;
518 /* execute the generated code */
519 next_tb = cpu_tb_exec(cpu, tc_ptr);
520 switch (next_tb & TB_EXIT_MASK) {
521 case TB_EXIT_REQUESTED:
522 /* Something asked us to stop executing
523 * chained TBs; just continue round the main
524 * loop. Whatever requested the exit will also
525 * have set something else (eg exit_request or
526 * interrupt_request) which we will handle
527 * next time around the loop.
529 next_tb = 0;
530 break;
531 case TB_EXIT_ICOUNT_EXPIRED:
533 /* Instruction counter expired. */
534 int insns_left = cpu->icount_decr.u32;
535 if (cpu->icount_extra && insns_left >= 0) {
536 /* Refill decrementer and continue execution. */
537 cpu->icount_extra += insns_left;
538 insns_left = MIN(0xffff, cpu->icount_extra);
539 cpu->icount_extra -= insns_left;
540 cpu->icount_decr.u16.low = insns_left;
541 } else {
542 if (insns_left > 0) {
543 /* Execute remaining instructions. */
544 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
545 cpu_exec_nocache(env, insns_left, tb);
546 align_clocks(&sc, cpu);
548 cpu->exception_index = EXCP_INTERRUPT;
549 next_tb = 0;
550 cpu_loop_exit(cpu);
552 break;
554 default:
555 break;
558 cpu->current_tb = NULL;
559 /* Try to align the host and virtual clocks
560 if the guest is in advance */
561 align_clocks(&sc, cpu);
562 /* reset soft MMU for next block (it can currently
563 only be set by a memory fault) */
564 } /* for(;;) */
565 } else {
566 /* Reload env after longjmp - the compiler may have smashed all
567 * local variables as longjmp is marked 'noreturn'. */
568 cpu = current_cpu;
569 env = cpu->env_ptr;
570 cc = CPU_GET_CLASS(cpu);
571 cpu->can_do_io = 1;
572 #ifdef TARGET_I386
573 x86_cpu = X86_CPU(cpu);
574 #endif
575 if (have_tb_lock) {
576 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
577 have_tb_lock = false;
580 } /* for(;;) */
582 cc->cpu_exec_exit(cpu);
583 rcu_read_unlock();
585 /* fail safe : never use current_cpu outside cpu_exec() */
586 current_cpu = NULL;
587 return ret;