lsi: implement I/O memory space for Memory Move instructions
[qemu/ar7.git] / tests / ivshmem-test.c
blob0957ee75556cf4fe17faf4f8a90116d594b7144d
1 /*
2 * QTest testcase for ivshmem
4 * Copyright (c) 2014 SUSE LINUX Products GmbH
5 * Copyright (c) 2015 Red Hat, Inc.
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.
9 */
11 #include "qemu/osdep.h"
12 #include <glib/gstdio.h>
13 #include "contrib/ivshmem-server/ivshmem-server.h"
14 #include "libqos/pci-pc.h"
15 #include "libqtest.h"
16 #include "qemu-common.h"
18 #define TMPSHMSIZE (1 << 20)
19 static char *tmpshm;
20 static void *tmpshmem;
21 static char *tmpdir;
22 static char *tmpserver;
24 static void save_fn(QPCIDevice *dev, int devfn, void *data)
26 QPCIDevice **pdev = (QPCIDevice **) data;
28 *pdev = dev;
31 static QPCIDevice *get_device(QPCIBus *pcibus)
33 QPCIDevice *dev;
35 dev = NULL;
36 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
37 g_assert(dev != NULL);
39 return dev;
42 typedef struct _IVState {
43 QTestState *qtest;
44 void *reg_base, *mem_base;
45 QPCIBus *pcibus;
46 QPCIDevice *dev;
47 } IVState;
49 enum Reg {
50 INTRMASK = 0,
51 INTRSTATUS = 4,
52 IVPOSITION = 8,
53 DOORBELL = 12,
56 static const char* reg2str(enum Reg reg) {
57 switch (reg) {
58 case INTRMASK:
59 return "IntrMask";
60 case INTRSTATUS:
61 return "IntrStatus";
62 case IVPOSITION:
63 return "IVPosition";
64 case DOORBELL:
65 return "DoorBell";
66 default:
67 return NULL;
71 static inline unsigned in_reg(IVState *s, enum Reg reg)
73 const char *name = reg2str(reg);
74 QTestState *qtest = global_qtest;
75 unsigned res;
77 global_qtest = s->qtest;
78 res = qpci_io_readl(s->dev, s->reg_base + reg);
79 g_test_message("*%s -> %x\n", name, res);
80 global_qtest = qtest;
82 return res;
85 static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
87 const char *name = reg2str(reg);
88 QTestState *qtest = global_qtest;
90 global_qtest = s->qtest;
91 g_test_message("%x -> *%s\n", v, name);
92 qpci_io_writel(s->dev, s->reg_base + reg, v);
93 global_qtest = qtest;
96 static void cleanup_vm(IVState *s)
98 g_free(s->dev);
99 qpci_free_pc(s->pcibus);
100 qtest_quit(s->qtest);
103 static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
105 uint64_t barsize;
107 s->qtest = qtest_start(cmd);
108 s->pcibus = qpci_init_pc();
109 s->dev = get_device(s->pcibus);
111 s->reg_base = qpci_iomap(s->dev, 0, &barsize);
112 g_assert_nonnull(s->reg_base);
113 g_assert_cmpuint(barsize, ==, 256);
115 if (msix) {
116 qpci_msix_enable(s->dev);
119 s->mem_base = qpci_iomap(s->dev, 2, &barsize);
120 g_assert_nonnull(s->mem_base);
121 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
123 qpci_device_enable(s->dev);
126 static void setup_vm(IVState *s)
128 char *cmd = g_strdup_printf("-object memory-backend-file"
129 ",id=mb1,size=1M,share,mem-path=/dev/shm%s"
130 " -device ivshmem-plain,memdev=mb1", tmpshm);
132 setup_vm_cmd(s, cmd, false);
134 g_free(cmd);
137 static void test_ivshmem_single(void)
139 IVState state, *s;
140 uint32_t data[1024];
141 int i;
143 setup_vm(&state);
144 s = &state;
146 /* initial state of readable registers */
147 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
148 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
149 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
151 /* trigger interrupt via registers */
152 out_reg(s, INTRMASK, 0xffffffff);
153 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
154 out_reg(s, INTRSTATUS, 1);
155 /* check interrupt status */
156 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
157 /* reading clears */
158 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
159 /* TODO intercept actual interrupt (needs qtest work) */
161 /* invalid register access */
162 out_reg(s, IVPOSITION, 1);
163 in_reg(s, DOORBELL);
165 /* ring the (non-functional) doorbell */
166 out_reg(s, DOORBELL, 8 << 16);
168 /* write shared memory */
169 for (i = 0; i < G_N_ELEMENTS(data); i++) {
170 data[i] = i;
172 qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
174 /* verify write */
175 for (i = 0; i < G_N_ELEMENTS(data); i++) {
176 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
179 /* read it back and verify read */
180 memset(data, 0, sizeof(data));
181 qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
182 for (i = 0; i < G_N_ELEMENTS(data); i++) {
183 g_assert_cmpuint(data[i], ==, i);
186 cleanup_vm(s);
189 static void test_ivshmem_pair(void)
191 IVState state1, state2, *s1, *s2;
192 char *data;
193 int i;
195 setup_vm(&state1);
196 s1 = &state1;
197 setup_vm(&state2);
198 s2 = &state2;
200 data = g_malloc0(TMPSHMSIZE);
202 /* host write, guest 1 & 2 read */
203 memset(tmpshmem, 0x42, TMPSHMSIZE);
204 qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
205 for (i = 0; i < TMPSHMSIZE; i++) {
206 g_assert_cmpuint(data[i], ==, 0x42);
208 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
209 for (i = 0; i < TMPSHMSIZE; i++) {
210 g_assert_cmpuint(data[i], ==, 0x42);
213 /* guest 1 write, guest 2 read */
214 memset(data, 0x43, TMPSHMSIZE);
215 qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
216 memset(data, 0, TMPSHMSIZE);
217 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
218 for (i = 0; i < TMPSHMSIZE; i++) {
219 g_assert_cmpuint(data[i], ==, 0x43);
222 /* guest 2 write, guest 1 read */
223 memset(data, 0x44, TMPSHMSIZE);
224 qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
225 memset(data, 0, TMPSHMSIZE);
226 qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
227 for (i = 0; i < TMPSHMSIZE; i++) {
228 g_assert_cmpuint(data[i], ==, 0x44);
231 cleanup_vm(s1);
232 cleanup_vm(s2);
233 g_free(data);
236 typedef struct ServerThread {
237 GThread *thread;
238 IvshmemServer *server;
239 int pipe[2]; /* to handle quit */
240 } ServerThread;
242 static void *server_thread(void *data)
244 ServerThread *t = data;
245 IvshmemServer *server = t->server;
247 while (true) {
248 fd_set fds;
249 int maxfd, ret;
251 FD_ZERO(&fds);
252 FD_SET(t->pipe[0], &fds);
253 maxfd = t->pipe[0] + 1;
255 ivshmem_server_get_fds(server, &fds, &maxfd);
257 ret = select(maxfd, &fds, NULL, NULL, NULL);
259 if (ret < 0) {
260 if (errno == EINTR) {
261 continue;
264 g_critical("select error: %s\n", strerror(errno));
265 break;
267 if (ret == 0) {
268 continue;
271 if (FD_ISSET(t->pipe[0], &fds)) {
272 break;
275 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
276 g_critical("ivshmem_server_handle_fds() failed\n");
277 break;
281 return NULL;
284 static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
286 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
287 "-device ivshmem%s,chardev=chr0,vectors=%d",
288 tmpserver,
289 msi ? "-doorbell" : ",size=1M,msi=off",
290 nvectors);
292 setup_vm_cmd(s, cmd, msi);
294 g_free(cmd);
297 static void test_ivshmem_server(bool msi)
299 IVState state1, state2, *s1, *s2;
300 ServerThread thread;
301 IvshmemServer server;
302 int ret, vm1, vm2;
303 int nvectors = 2;
304 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
306 ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
307 TMPSHMSIZE, nvectors,
308 g_test_verbose());
309 g_assert_cmpint(ret, ==, 0);
311 ret = ivshmem_server_start(&server);
312 g_assert_cmpint(ret, ==, 0);
314 thread.server = &server;
315 ret = pipe(thread.pipe);
316 g_assert_cmpint(ret, ==, 0);
317 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
318 g_assert(thread.thread != NULL);
320 setup_vm_with_server(&state1, nvectors, msi);
321 s1 = &state1;
322 setup_vm_with_server(&state2, nvectors, msi);
323 s2 = &state2;
325 /* check got different VM ids */
326 vm1 = in_reg(s1, IVPOSITION);
327 vm2 = in_reg(s2, IVPOSITION);
328 g_assert_cmpint(vm1, >=, 0);
329 g_assert_cmpint(vm2, >=, 0);
330 g_assert_cmpint(vm1, !=, vm2);
332 /* check number of MSI-X vectors */
333 global_qtest = s1->qtest;
334 if (msi) {
335 ret = qpci_msix_table_size(s1->dev);
336 g_assert_cmpuint(ret, ==, nvectors);
339 /* TODO test behavior before MSI-X is enabled */
341 /* ping vm2 -> vm1 on vector 0 */
342 if (msi) {
343 ret = qpci_msix_pending(s1->dev, 0);
344 g_assert_cmpuint(ret, ==, 0);
345 } else {
346 g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
348 out_reg(s2, DOORBELL, vm1 << 16);
349 do {
350 g_usleep(10000);
351 ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
352 } while (ret == 0 && g_get_monotonic_time() < end_time);
353 g_assert_cmpuint(ret, !=, 0);
355 /* ping vm1 -> vm2 on vector 1 */
356 global_qtest = s2->qtest;
357 if (msi) {
358 ret = qpci_msix_pending(s2->dev, 1);
359 g_assert_cmpuint(ret, ==, 0);
360 } else {
361 g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
363 out_reg(s1, DOORBELL, vm2 << 16 | 1);
364 do {
365 g_usleep(10000);
366 ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
367 } while (ret == 0 && g_get_monotonic_time() < end_time);
368 g_assert_cmpuint(ret, !=, 0);
370 cleanup_vm(s2);
371 cleanup_vm(s1);
373 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
374 g_error("qemu_write_full: %s", g_strerror(errno));
377 g_thread_join(thread.thread);
379 ivshmem_server_close(&server);
380 close(thread.pipe[1]);
381 close(thread.pipe[0]);
384 static void test_ivshmem_server_msi(void)
386 test_ivshmem_server(true);
389 static void test_ivshmem_server_irq(void)
391 test_ivshmem_server(false);
394 #define PCI_SLOT_HP 0x06
396 static void test_ivshmem_hotplug(void)
398 gchar *opts;
400 qtest_start("");
402 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
404 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
405 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
407 qtest_end();
408 g_free(opts);
411 static void test_ivshmem_memdev(void)
413 IVState state;
415 /* just for the sake of checking memory-backend property */
416 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
417 " -device ivshmem-plain,memdev=mb1", false);
419 cleanup_vm(&state);
422 static void cleanup(void)
424 if (tmpshmem) {
425 munmap(tmpshmem, TMPSHMSIZE);
426 tmpshmem = NULL;
429 if (tmpshm) {
430 shm_unlink(tmpshm);
431 g_free(tmpshm);
432 tmpshm = NULL;
435 if (tmpserver) {
436 g_unlink(tmpserver);
437 g_free(tmpserver);
438 tmpserver = NULL;
441 if (tmpdir) {
442 g_rmdir(tmpdir);
443 tmpdir = NULL;
447 static void abrt_handler(void *data)
449 cleanup();
452 static gchar *mktempshm(int size, int *fd)
454 while (true) {
455 gchar *name;
457 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
458 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
459 S_IRWXU|S_IRWXG|S_IRWXO);
460 if (*fd > 0) {
461 g_assert(ftruncate(*fd, size) == 0);
462 return name;
465 g_free(name);
467 if (errno != EEXIST) {
468 perror("shm_open");
469 return NULL;
474 int main(int argc, char **argv)
476 int ret, fd;
477 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
479 #if !GLIB_CHECK_VERSION(2, 31, 0)
480 if (!g_thread_supported()) {
481 g_thread_init(NULL);
483 #endif
485 g_test_init(&argc, &argv, NULL);
487 qtest_add_abrt_handler(abrt_handler, NULL);
488 /* shm */
489 tmpshm = mktempshm(TMPSHMSIZE, &fd);
490 if (!tmpshm) {
491 return 0;
493 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
494 g_assert(tmpshmem != MAP_FAILED);
495 /* server */
496 if (mkdtemp(dir) == NULL) {
497 g_error("mkdtemp: %s", g_strerror(errno));
499 tmpdir = dir;
500 tmpserver = g_strconcat(tmpdir, "/server", NULL);
502 qtest_add_func("/ivshmem/single", test_ivshmem_single);
503 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
504 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
505 if (g_test_slow()) {
506 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
507 qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
508 qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
511 ret = g_test_run();
513 cleanup();
515 return ret;