4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
24 #include "exec/helper-proto.h"
25 #include "qemu/host-utils.h"
26 #include "exec/exec-all.h"
28 //#define CRIS_OP_HELPER_DEBUG
31 #ifdef CRIS_OP_HELPER_DEBUG
33 #define D_LOG(...) qemu_log(__VA_ARGS__)
36 #define D_LOG(...) do { } while (0)
39 void helper_raise_exception(CPUCRISState
*env
, uint32_t index
)
41 CPUState
*cs
= env_cpu(env
);
43 cs
->exception_index
= index
;
47 void helper_tlb_flush_pid(CPUCRISState
*env
, uint32_t pid
)
49 #if !defined(CONFIG_USER_ONLY)
51 if (pid
!= (env
->pregs
[PR_PID
] & 0xff)) {
52 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
57 void helper_spc_write(CPUCRISState
*env
, uint32_t new_spc
)
59 #if !defined(CONFIG_USER_ONLY)
60 CPUState
*cs
= env_cpu(env
);
62 tlb_flush_page(cs
, env
->pregs
[PR_SPC
]);
63 tlb_flush_page(cs
, new_spc
);
67 /* Used by the tlb decoder. */
68 #define EXTRACT_FIELD(src, start, end) \
69 (((src) >> start) & ((1 << (end - start + 1)) - 1))
71 void helper_movl_sreg_reg(CPUCRISState
*env
, uint32_t sreg
, uint32_t reg
)
74 srs
= env
->pregs
[PR_SRS
];
76 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
78 #if !defined(CONFIG_USER_ONLY)
79 if (srs
== 1 || srs
== 2) {
81 /* Writes to tlb-hi write to mm_cause as a side effect. */
82 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
83 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
84 } else if (sreg
== 5) {
91 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
96 /* We've just made a write to tlb_lo. */
97 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
98 /* Writes are done via r_mm_cause. */
99 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
101 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
- 1][set
][idx
].hi
, 13, 31);
102 vaddr
<<= TARGET_PAGE_BITS
;
103 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
- 1][set
][idx
].lo
, 3, 3);
104 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
105 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
107 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
108 vaddr
, tlb_v
, env
->pc
);
110 tlb_flush_page(env_cpu(env
), vaddr
);
117 void helper_movl_reg_sreg(CPUCRISState
*env
, uint32_t reg
, uint32_t sreg
)
120 env
->pregs
[PR_SRS
] &= 3;
121 srs
= env
->pregs
[PR_SRS
];
123 #if !defined(CONFIG_USER_ONLY)
124 if (srs
== 1 || srs
== 2) {
129 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
134 /* Update the mirror regs. */
135 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
136 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
137 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
138 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
141 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
144 static void cris_ccs_rshift(CPUCRISState
*env
)
148 /* Apply the ccs shift. */
149 ccs
= env
->pregs
[PR_CCS
];
150 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
152 /* Enter user mode. */
153 env
->ksp
= env
->regs
[R_SP
];
154 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
157 env
->pregs
[PR_CCS
] = ccs
;
160 void helper_rfe(CPUCRISState
*env
)
162 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
164 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
165 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
169 cris_ccs_rshift(env
);
171 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
173 env
->pregs
[PR_CCS
] |= P_FLAG
;
177 void helper_rfn(CPUCRISState
*env
)
179 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
181 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
182 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
186 cris_ccs_rshift(env
);
188 /* Set the P_FLAG only if the R_FLAG is not set. */
190 env
->pregs
[PR_CCS
] |= P_FLAG
;
193 /* Always set the M flag. */
194 env
->pregs
[PR_CCS
] |= M_FLAG_V32
;
197 uint32_t helper_btst(CPUCRISState
*env
, uint32_t t0
, uint32_t t1
, uint32_t ccs
)
199 /* FIXME: clean this up. */
203 * The N flag is set according to the selected bit in the dest reg.
204 * The Z flag is set if the selected bit and all bits to the right are
206 * The X flag is cleared.
207 * Other flags are left untouched.
208 * The destination reg is not affected.
210 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
213 bset
= !!(t0
& (1 << sbit
));
214 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
215 masked_t0
= t0
& mask
;
216 fz
= !(masked_t0
| bset
);
218 /* Clear the X, N and Z flags. */
219 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
220 if (env
->pregs
[PR_VR
] < 32) {
221 ccs
&= ~(V_FLAG
| C_FLAG
);
223 /* Set the N and Z flags accordingly. */
224 ccs
|= (bset
<< 3) | (fz
<< 2);
228 static inline uint32_t evaluate_flags_writeback(CPUCRISState
*env
,
229 uint32_t flags
, uint32_t ccs
)
231 unsigned int x
, z
, mask
;
233 /* Extended arithmetic, leave the z flag alone. */
235 mask
= env
->cc_mask
| X_FLAG
;
242 /* all insn clear the x-flag except setf or clrf. */
248 uint32_t helper_evaluate_flags_muls(CPUCRISState
*env
,
249 uint32_t ccs
, uint32_t res
, uint32_t mof
)
255 dneg
= ((int32_t)res
) < 0;
262 } else if (tmp
< 0) {
265 if ((dneg
&& mof
!= -1) || (!dneg
&& mof
!= 0)) {
268 return evaluate_flags_writeback(env
, flags
, ccs
);
271 uint32_t helper_evaluate_flags_mulu(CPUCRISState
*env
,
272 uint32_t ccs
, uint32_t res
, uint32_t mof
)
282 } else if (tmp
>> 63) {
289 return evaluate_flags_writeback(env
, flags
, ccs
);
292 uint32_t helper_evaluate_flags_mcp(CPUCRISState
*env
, uint32_t ccs
,
293 uint32_t src
, uint32_t dst
, uint32_t res
)
297 src
= src
& 0x80000000;
298 dst
= dst
& 0x80000000;
300 if ((res
& 0x80000000L
) != 0L) {
304 } else if (src
& dst
) {
319 return evaluate_flags_writeback(env
, flags
, ccs
);
322 uint32_t helper_evaluate_flags_alu_4(CPUCRISState
*env
, uint32_t ccs
,
323 uint32_t src
, uint32_t dst
, uint32_t res
)
327 src
= src
& 0x80000000;
328 dst
= dst
& 0x80000000;
330 if ((res
& 0x80000000L
) != 0L) {
334 } else if (src
& dst
) {
349 return evaluate_flags_writeback(env
, flags
, ccs
);
352 uint32_t helper_evaluate_flags_sub_4(CPUCRISState
*env
, uint32_t ccs
,
353 uint32_t src
, uint32_t dst
, uint32_t res
)
357 src
= (~src
) & 0x80000000;
358 dst
= dst
& 0x80000000;
360 if ((res
& 0x80000000L
) != 0L) {
364 } else if (src
& dst
) {
380 return evaluate_flags_writeback(env
, flags
, ccs
);
383 uint32_t helper_evaluate_flags_move_4(CPUCRISState
*env
,
384 uint32_t ccs
, uint32_t res
)
388 if ((int32_t)res
< 0) {
390 } else if (res
== 0L) {
394 return evaluate_flags_writeback(env
, flags
, ccs
);
397 uint32_t helper_evaluate_flags_move_2(CPUCRISState
*env
,
398 uint32_t ccs
, uint32_t res
)
402 if ((int16_t)res
< 0L) {
404 } else if (res
== 0) {
408 return evaluate_flags_writeback(env
, flags
, ccs
);
412 * TODO: This is expensive. We could split things up and only evaluate part of
413 * CCR on a need to know basis. For now, we simply re-evaluate everything.
415 void helper_evaluate_flags(CPUCRISState
*env
)
417 uint32_t src
, dst
, res
;
422 res
= env
->cc_result
;
424 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
) {
429 * Now, evaluate the flags. This stuff is based on
430 * Per Zander's CRISv10 simulator.
432 switch (env
->cc_size
) {
434 if ((res
& 0x80L
) != 0L) {
436 if (((src
& 0x80L
) == 0L) && ((dst
& 0x80L
) == 0L)) {
438 } else if (((src
& 0x80L
) != 0L) && ((dst
& 0x80L
) != 0L)) {
442 if ((res
& 0xFFL
) == 0L) {
445 if (((src
& 0x80L
) != 0L) && ((dst
& 0x80L
) != 0L)) {
448 if ((dst
& 0x80L
) != 0L || (src
& 0x80L
) != 0L) {
454 if ((res
& 0x8000L
) != 0L) {
456 if (((src
& 0x8000L
) == 0L) && ((dst
& 0x8000L
) == 0L)) {
458 } else if (((src
& 0x8000L
) != 0L) && ((dst
& 0x8000L
) != 0L)) {
462 if ((res
& 0xFFFFL
) == 0L) {
465 if (((src
& 0x8000L
) != 0L) && ((dst
& 0x8000L
) != 0L)) {
468 if ((dst
& 0x8000L
) != 0L || (src
& 0x8000L
) != 0L) {
474 if ((res
& 0x80000000L
) != 0L) {
476 if (((src
& 0x80000000L
) == 0L) && ((dst
& 0x80000000L
) == 0L)) {
478 } else if (((src
& 0x80000000L
) != 0L) &&
479 ((dst
& 0x80000000L
) != 0L)) {
486 if (((src
& 0x80000000L
) != 0L) && ((dst
& 0x80000000L
) != 0L)) {
489 if ((dst
& 0x80000000L
) != 0L || (src
& 0x80000000L
) != 0L) {
498 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
) {
502 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(env
, flags
,
506 void helper_top_evaluate_flags(CPUCRISState
*env
)
508 switch (env
->cc_op
) {
511 = helper_evaluate_flags_mcp(env
, env
->pregs
[PR_CCS
],
512 env
->cc_src
, env
->cc_dest
,
517 = helper_evaluate_flags_muls(env
, env
->pregs
[PR_CCS
],
518 env
->cc_result
, env
->pregs
[PR_MOF
]);
522 = helper_evaluate_flags_mulu(env
, env
->pregs
[PR_CCS
],
523 env
->cc_result
, env
->pregs
[PR_MOF
]);
532 switch (env
->cc_size
) {
535 helper_evaluate_flags_move_4(env
,
541 helper_evaluate_flags_move_2(env
,
546 helper_evaluate_flags(env
);
555 if (env
->cc_size
== 4) {
557 helper_evaluate_flags_sub_4(env
,
559 env
->cc_src
, env
->cc_dest
,
562 helper_evaluate_flags(env
);
566 switch (env
->cc_size
) {
569 helper_evaluate_flags_alu_4(env
,
571 env
->cc_src
, env
->cc_dest
,
575 helper_evaluate_flags(env
);