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qapi: pad GenericList value fields to 64 bits
[qemu/ar7.git] / memory.c
blob99f046d8bbc4e5f4750e4a4ba6e4247d4c143773
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 static unsigned memory_region_transaction_depth;
26 static bool memory_region_update_pending;
27 static bool global_dirty_log = false;
28
29 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
30 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
31
32 static QTAILQ_HEAD(, AddressSpace) address_spaces
33 = QTAILQ_HEAD_INITIALIZER(address_spaces);
34
35 typedef struct AddrRange AddrRange;
36
37 /*
38 * Note using signed integers limits us to physical addresses at most
39 * 63 bits wide. They are needed for negative offsetting in aliases
40 * (large MemoryRegion::alias_offset).
41 */
42 struct AddrRange {
43 Int128 start;
44 Int128 size;
45 };
46
47 static AddrRange addrrange_make(Int128 start, Int128 size)
48 {
49 return (AddrRange) { start, size };
50 }
51
52 static bool addrrange_equal(AddrRange r1, AddrRange r2)
53 {
54 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
55 }
56
57 static Int128 addrrange_end(AddrRange r)
58 {
59 return int128_add(r.start, r.size);
60 }
61
62 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
63 {
64 int128_addto(&range.start, delta);
65 return range;
66 }
67
68 static bool addrrange_contains(AddrRange range, Int128 addr)
69 {
70 return int128_ge(addr, range.start)
71 && int128_lt(addr, addrrange_end(range));
72 }
73
74 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
75 {
76 return addrrange_contains(r1, r2.start)
77 || addrrange_contains(r2, r1.start);
78 }
79
80 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
81 {
82 Int128 start = int128_max(r1.start, r2.start);
83 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
84 return addrrange_make(start, int128_sub(end, start));
85 }
86
87 enum ListenerDirection { Forward, Reverse };
88
89 static bool memory_listener_match(MemoryListener *listener,
90 MemoryRegionSection *section)
91 {
92 return !listener->address_space_filter
93 || listener->address_space_filter == section->address_space;
94 }
95
96 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
97 do { \
98 MemoryListener *_listener; \
99 \
100 switch (_direction) { \
101 case Forward: \
102 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
103 if (_listener->_callback) { \
104 _listener->_callback(_listener, ##_args); \
105 } \
106 } \
107 break; \
108 case Reverse: \
109 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
110 memory_listeners, link) { \
111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
114 } \
115 break; \
116 default: \
117 abort(); \
118 } \
119 } while (0)
120
121 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
122 do { \
123 MemoryListener *_listener; \
124 \
125 switch (_direction) { \
126 case Forward: \
127 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
128 if (_listener->_callback \
129 && memory_listener_match(_listener, _section)) { \
130 _listener->_callback(_listener, _section, ##_args); \
131 } \
132 } \
133 break; \
134 case Reverse: \
135 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
136 memory_listeners, link) { \
137 if (_listener->_callback \
138 && memory_listener_match(_listener, _section)) { \
139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 default: \
144 abort(); \
145 } \
146 } while (0)
147
148 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
149 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
150 .mr = (fr)->mr, \
151 .address_space = (as), \
152 .offset_within_region = (fr)->offset_in_region, \
153 .size = int128_get64((fr)->addr.size), \
154 .offset_within_address_space = int128_get64((fr)->addr.start), \
155 .readonly = (fr)->readonly, \
156 }))
157
158 struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161 };
162
163 struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
167 EventNotifier *e;
168 };
169
170 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172 {
173 if (int128_lt(a.addr.start, b.addr.start)) {
174 return true;
175 } else if (int128_gt(a.addr.start, b.addr.start)) {
176 return false;
177 } else if (int128_lt(a.addr.size, b.addr.size)) {
178 return true;
179 } else if (int128_gt(a.addr.size, b.addr.size)) {
180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
192 if (a.e < b.e) {
193 return true;
194 } else if (a.e > b.e) {
195 return false;
196 }
197 return false;
198 }
199
200 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202 {
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205 }
206
207 typedef struct FlatRange FlatRange;
208 typedef struct FlatView FlatView;
209
210 /* Range of memory in the global map. Addresses are absolute. */
211 struct FlatRange {
212 MemoryRegion *mr;
213 hwaddr offset_in_region;
214 AddrRange addr;
215 uint8_t dirty_log_mask;
216 bool romd_mode;
217 bool readonly;
218 };
219
220 /* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223 struct FlatView {
224 FlatRange *ranges;
225 unsigned nr;
226 unsigned nr_allocated;
227 };
228
229 typedef struct AddressSpaceOps AddressSpaceOps;
230
231 #define FOR_EACH_FLAT_RANGE(var, view) \
232 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
233
234 static bool flatrange_equal(FlatRange *a, FlatRange *b)
235 {
236 return a->mr == b->mr
237 && addrrange_equal(a->addr, b->addr)
238 && a->offset_in_region == b->offset_in_region
239 && a->romd_mode == b->romd_mode
240 && a->readonly == b->readonly;
241 }
242
243 static void flatview_init(FlatView *view)
244 {
245 view->ranges = NULL;
246 view->nr = 0;
247 view->nr_allocated = 0;
248 }
249
250 /* Insert a range into a given position. Caller is responsible for maintaining
251 * sorting order.
252 */
253 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
254 {
255 if (view->nr == view->nr_allocated) {
256 view->nr_allocated = MAX(2 * view->nr, 10);
257 view->ranges = g_realloc(view->ranges,
258 view->nr_allocated * sizeof(*view->ranges));
259 }
260 memmove(view->ranges + pos + 1, view->ranges + pos,
261 (view->nr - pos) * sizeof(FlatRange));
262 view->ranges[pos] = *range;
263 ++view->nr;
264 }
265
266 static void flatview_destroy(FlatView *view)
267 {
268 g_free(view->ranges);
269 }
270
271 static bool can_merge(FlatRange *r1, FlatRange *r2)
272 {
273 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
274 && r1->mr == r2->mr
275 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
276 r1->addr.size),
277 int128_make64(r2->offset_in_region))
278 && r1->dirty_log_mask == r2->dirty_log_mask
279 && r1->romd_mode == r2->romd_mode
280 && r1->readonly == r2->readonly;
281 }
282
283 /* Attempt to simplify a view by merging ajacent ranges */
284 static void flatview_simplify(FlatView *view)
285 {
286 unsigned i, j;
287
288 i = 0;
289 while (i < view->nr) {
290 j = i + 1;
291 while (j < view->nr
292 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
293 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
294 ++j;
295 }
296 ++i;
297 memmove(&view->ranges[i], &view->ranges[j],
298 (view->nr - j) * sizeof(view->ranges[j]));
299 view->nr -= j - i;
300 }
301 }
302
303 static void memory_region_read_accessor(void *opaque,
304 hwaddr addr,
305 uint64_t *value,
306 unsigned size,
307 unsigned shift,
308 uint64_t mask)
309 {
310 MemoryRegion *mr = opaque;
311 uint64_t tmp;
312
313 if (mr->flush_coalesced_mmio) {
314 qemu_flush_coalesced_mmio_buffer();
315 }
316 tmp = mr->ops->read(mr->opaque, addr, size);
317 *value |= (tmp & mask) << shift;
318 }
319
320 static void memory_region_write_accessor(void *opaque,
321 hwaddr addr,
322 uint64_t *value,
323 unsigned size,
324 unsigned shift,
325 uint64_t mask)
326 {
327 MemoryRegion *mr = opaque;
328 uint64_t tmp;
329
330 if (mr->flush_coalesced_mmio) {
331 qemu_flush_coalesced_mmio_buffer();
332 }
333 tmp = (*value >> shift) & mask;
334 mr->ops->write(mr->opaque, addr, tmp, size);
335 }
336
337 static void access_with_adjusted_size(hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned access_size_min,
341 unsigned access_size_max,
342 void (*access)(void *opaque,
343 hwaddr addr,
344 uint64_t *value,
345 unsigned size,
346 unsigned shift,
347 uint64_t mask),
348 void *opaque)
349 {
350 uint64_t access_mask;
351 unsigned access_size;
352 unsigned i;
353
354 if (!access_size_min) {
355 access_size_min = 1;
356 }
357 if (!access_size_max) {
358 access_size_max = 4;
359 }
360 access_size = MAX(MIN(size, access_size_max), access_size_min);
361 access_mask = -1ULL >> (64 - access_size * 8);
362 for (i = 0; i < size; i += access_size) {
363 /* FIXME: big-endian support */
364 access(opaque, addr + i, value, access_size, i * 8, access_mask);
365 }
366 }
367
368 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
369 unsigned width, bool write)
370 {
371 const MemoryRegionPortio *mrp;
372
373 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
374 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
375 && width == mrp->size
376 && (write ? (bool)mrp->write : (bool)mrp->read)) {
377 return mrp;
378 }
379 }
380 return NULL;
381 }
382
383 static void memory_region_iorange_read(IORange *iorange,
384 uint64_t offset,
385 unsigned width,
386 uint64_t *data)
387 {
388 MemoryRegionIORange *mrio
389 = container_of(iorange, MemoryRegionIORange, iorange);
390 MemoryRegion *mr = mrio->mr;
391
392 offset += mrio->offset;
393 if (mr->ops->old_portio) {
394 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
395 width, false);
396
397 *data = ((uint64_t)1 << (width * 8)) - 1;
398 if (mrp) {
399 *data = mrp->read(mr->opaque, offset);
400 } else if (width == 2) {
401 mrp = find_portio(mr, offset - mrio->offset, 1, false);
402 assert(mrp);
403 *data = mrp->read(mr->opaque, offset) |
404 (mrp->read(mr->opaque, offset + 1) << 8);
405 }
406 return;
407 }
408 *data = 0;
409 access_with_adjusted_size(offset, data, width,
410 mr->ops->impl.min_access_size,
411 mr->ops->impl.max_access_size,
412 memory_region_read_accessor, mr);
413 }
414
415 static void memory_region_iorange_write(IORange *iorange,
416 uint64_t offset,
417 unsigned width,
418 uint64_t data)
419 {
420 MemoryRegionIORange *mrio
421 = container_of(iorange, MemoryRegionIORange, iorange);
422 MemoryRegion *mr = mrio->mr;
423
424 offset += mrio->offset;
425 if (mr->ops->old_portio) {
426 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
427 width, true);
428
429 if (mrp) {
430 mrp->write(mr->opaque, offset, data);
431 } else if (width == 2) {
432 mrp = find_portio(mr, offset - mrio->offset, 1, true);
433 assert(mrp);
434 mrp->write(mr->opaque, offset, data & 0xff);
435 mrp->write(mr->opaque, offset + 1, data >> 8);
436 }
437 return;
438 }
439 access_with_adjusted_size(offset, &data, width,
440 mr->ops->impl.min_access_size,
441 mr->ops->impl.max_access_size,
442 memory_region_write_accessor, mr);
443 }
444
445 static void memory_region_iorange_destructor(IORange *iorange)
446 {
447 g_free(container_of(iorange, MemoryRegionIORange, iorange));
448 }
449
450 const IORangeOps memory_region_iorange_ops = {
451 .read = memory_region_iorange_read,
452 .write = memory_region_iorange_write,
453 .destructor = memory_region_iorange_destructor,
454 };
455
456 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
457 {
458 AddressSpace *as;
459
460 while (mr->parent) {
461 mr = mr->parent;
462 }
463 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
464 if (mr == as->root) {
465 return as;
466 }
467 }
468 abort();
469 }
470
471 /* Render a memory region into the global view. Ranges in @view obscure
472 * ranges in @mr.
473 */
474 static void render_memory_region(FlatView *view,
475 MemoryRegion *mr,
476 Int128 base,
477 AddrRange clip,
478 bool readonly)
479 {
480 MemoryRegion *subregion;
481 unsigned i;
482 hwaddr offset_in_region;
483 Int128 remain;
484 Int128 now;
485 FlatRange fr;
486 AddrRange tmp;
487
488 if (!mr->enabled) {
489 return;
490 }
491
492 int128_addto(&base, int128_make64(mr->addr));
493 readonly |= mr->readonly;
494
495 tmp = addrrange_make(base, mr->size);
496
497 if (!addrrange_intersects(tmp, clip)) {
498 return;
499 }
500
501 clip = addrrange_intersection(tmp, clip);
502
503 if (mr->alias) {
504 int128_subfrom(&base, int128_make64(mr->alias->addr));
505 int128_subfrom(&base, int128_make64(mr->alias_offset));
506 render_memory_region(view, mr->alias, base, clip, readonly);
507 return;
508 }
509
510 /* Render subregions in priority order. */
511 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
512 render_memory_region(view, subregion, base, clip, readonly);
513 }
514
515 if (!mr->terminates) {
516 return;
517 }
518
519 offset_in_region = int128_get64(int128_sub(clip.start, base));
520 base = clip.start;
521 remain = clip.size;
522
523 /* Render the region itself into any gaps left by the current view. */
524 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
525 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
526 continue;
527 }
528 if (int128_lt(base, view->ranges[i].addr.start)) {
529 now = int128_min(remain,
530 int128_sub(view->ranges[i].addr.start, base));
531 fr.mr = mr;
532 fr.offset_in_region = offset_in_region;
533 fr.addr = addrrange_make(base, now);
534 fr.dirty_log_mask = mr->dirty_log_mask;
535 fr.romd_mode = mr->romd_mode;
536 fr.readonly = readonly;
537 flatview_insert(view, i, &fr);
538 ++i;
539 int128_addto(&base, now);
540 offset_in_region += int128_get64(now);
541 int128_subfrom(&remain, now);
542 }
543 now = int128_sub(int128_min(int128_add(base, remain),
544 addrrange_end(view->ranges[i].addr)),
545 base);
546 int128_addto(&base, now);
547 offset_in_region += int128_get64(now);
548 int128_subfrom(&remain, now);
549 }
550 if (int128_nz(remain)) {
551 fr.mr = mr;
552 fr.offset_in_region = offset_in_region;
553 fr.addr = addrrange_make(base, remain);
554 fr.dirty_log_mask = mr->dirty_log_mask;
555 fr.romd_mode = mr->romd_mode;
556 fr.readonly = readonly;
557 flatview_insert(view, i, &fr);
558 }
559 }
560
561 /* Render a memory topology into a list of disjoint absolute ranges. */
562 static FlatView generate_memory_topology(MemoryRegion *mr)
563 {
564 FlatView view;
565
566 flatview_init(&view);
567
568 if (mr) {
569 render_memory_region(&view, mr, int128_zero(),
570 addrrange_make(int128_zero(), int128_2_64()), false);
571 }
572 flatview_simplify(&view);
573
574 return view;
575 }
576
577 static void address_space_add_del_ioeventfds(AddressSpace *as,
578 MemoryRegionIoeventfd *fds_new,
579 unsigned fds_new_nb,
580 MemoryRegionIoeventfd *fds_old,
581 unsigned fds_old_nb)
582 {
583 unsigned iold, inew;
584 MemoryRegionIoeventfd *fd;
585 MemoryRegionSection section;
586
587 /* Generate a symmetric difference of the old and new fd sets, adding
588 * and deleting as necessary.
589 */
590
591 iold = inew = 0;
592 while (iold < fds_old_nb || inew < fds_new_nb) {
593 if (iold < fds_old_nb
594 && (inew == fds_new_nb
595 || memory_region_ioeventfd_before(fds_old[iold],
596 fds_new[inew]))) {
597 fd = &fds_old[iold];
598 section = (MemoryRegionSection) {
599 .address_space = as,
600 .offset_within_address_space = int128_get64(fd->addr.start),
601 .size = int128_get64(fd->addr.size),
602 };
603 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
604 fd->match_data, fd->data, fd->e);
605 ++iold;
606 } else if (inew < fds_new_nb
607 && (iold == fds_old_nb
608 || memory_region_ioeventfd_before(fds_new[inew],
609 fds_old[iold]))) {
610 fd = &fds_new[inew];
611 section = (MemoryRegionSection) {
612 .address_space = as,
613 .offset_within_address_space = int128_get64(fd->addr.start),
614 .size = int128_get64(fd->addr.size),
615 };
616 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
617 fd->match_data, fd->data, fd->e);
618 ++inew;
619 } else {
620 ++iold;
621 ++inew;
622 }
623 }
624 }
625
626 static void address_space_update_ioeventfds(AddressSpace *as)
627 {
628 FlatRange *fr;
629 unsigned ioeventfd_nb = 0;
630 MemoryRegionIoeventfd *ioeventfds = NULL;
631 AddrRange tmp;
632 unsigned i;
633
634 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
635 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
636 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
637 int128_sub(fr->addr.start,
638 int128_make64(fr->offset_in_region)));
639 if (addrrange_intersects(fr->addr, tmp)) {
640 ++ioeventfd_nb;
641 ioeventfds = g_realloc(ioeventfds,
642 ioeventfd_nb * sizeof(*ioeventfds));
643 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
644 ioeventfds[ioeventfd_nb-1].addr = tmp;
645 }
646 }
647 }
648
649 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
650 as->ioeventfds, as->ioeventfd_nb);
651
652 g_free(as->ioeventfds);
653 as->ioeventfds = ioeventfds;
654 as->ioeventfd_nb = ioeventfd_nb;
655 }
656
657 static void address_space_update_topology_pass(AddressSpace *as,
658 FlatView old_view,
659 FlatView new_view,
660 bool adding)
661 {
662 unsigned iold, inew;
663 FlatRange *frold, *frnew;
664
665 /* Generate a symmetric difference of the old and new memory maps.
666 * Kill ranges in the old map, and instantiate ranges in the new map.
667 */
668 iold = inew = 0;
669 while (iold < old_view.nr || inew < new_view.nr) {
670 if (iold < old_view.nr) {
671 frold = &old_view.ranges[iold];
672 } else {
673 frold = NULL;
674 }
675 if (inew < new_view.nr) {
676 frnew = &new_view.ranges[inew];
677 } else {
678 frnew = NULL;
679 }
680
681 if (frold
682 && (!frnew
683 || int128_lt(frold->addr.start, frnew->addr.start)
684 || (int128_eq(frold->addr.start, frnew->addr.start)
685 && !flatrange_equal(frold, frnew)))) {
686 /* In old, but (not in new, or in new but attributes changed). */
687
688 if (!adding) {
689 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
690 }
691
692 ++iold;
693 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
694 /* In both (logging may have changed) */
695
696 if (adding) {
697 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
698 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
699 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
700 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
701 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
702 }
703 }
704
705 ++iold;
706 ++inew;
707 } else {
708 /* In new */
709
710 if (adding) {
711 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
712 }
713
714 ++inew;
715 }
716 }
717 }
718
719
720 static void address_space_update_topology(AddressSpace *as)
721 {
722 FlatView old_view = *as->current_map;
723 FlatView new_view = generate_memory_topology(as->root);
724
725 address_space_update_topology_pass(as, old_view, new_view, false);
726 address_space_update_topology_pass(as, old_view, new_view, true);
727
728 *as->current_map = new_view;
729 flatview_destroy(&old_view);
730 address_space_update_ioeventfds(as);
731 }
732
733 void memory_region_transaction_begin(void)
734 {
735 qemu_flush_coalesced_mmio_buffer();
736 ++memory_region_transaction_depth;
737 }
738
739 void memory_region_transaction_commit(void)
740 {
741 AddressSpace *as;
742
743 assert(memory_region_transaction_depth);
744 --memory_region_transaction_depth;
745 if (!memory_region_transaction_depth && memory_region_update_pending) {
746 memory_region_update_pending = false;
747 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
748
749 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
750 address_space_update_topology(as);
751 }
752
753 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
754 }
755 }
756
757 static void memory_region_destructor_none(MemoryRegion *mr)
758 {
759 }
760
761 static void memory_region_destructor_ram(MemoryRegion *mr)
762 {
763 qemu_ram_free(mr->ram_addr);
764 }
765
766 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
767 {
768 qemu_ram_free_from_ptr(mr->ram_addr);
769 }
770
771 static void memory_region_destructor_rom_device(MemoryRegion *mr)
772 {
773 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
774 }
775
776 static bool memory_region_wrong_endianness(MemoryRegion *mr)
777 {
778 #ifdef TARGET_WORDS_BIGENDIAN
779 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
780 #else
781 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
782 #endif
783 }
784
785 void memory_region_init(MemoryRegion *mr,
786 const char *name,
787 uint64_t size)
788 {
789 mr->ops = NULL;
790 mr->parent = NULL;
791 mr->size = int128_make64(size);
792 if (size == UINT64_MAX) {
793 mr->size = int128_2_64();
794 }
795 mr->addr = 0;
796 mr->subpage = false;
797 mr->enabled = true;
798 mr->terminates = false;
799 mr->ram = false;
800 mr->romd_mode = true;
801 mr->readonly = false;
802 mr->rom_device = false;
803 mr->destructor = memory_region_destructor_none;
804 mr->priority = 0;
805 mr->may_overlap = false;
806 mr->alias = NULL;
807 QTAILQ_INIT(&mr->subregions);
808 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
809 QTAILQ_INIT(&mr->coalesced);
810 mr->name = g_strdup(name);
811 mr->dirty_log_mask = 0;
812 mr->ioeventfd_nb = 0;
813 mr->ioeventfds = NULL;
814 mr->flush_coalesced_mmio = false;
815 }
816
817 static bool memory_region_access_valid(MemoryRegion *mr,
818 hwaddr addr,
819 unsigned size,
820 bool is_write)
821 {
822 if (mr->ops->valid.accepts
823 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
824 return false;
825 }
826
827 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
828 return false;
829 }
830
831 /* Treat zero as compatibility all valid */
832 if (!mr->ops->valid.max_access_size) {
833 return true;
834 }
835
836 if (size > mr->ops->valid.max_access_size
837 || size < mr->ops->valid.min_access_size) {
838 return false;
839 }
840 return true;
841 }
842
843 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
844 hwaddr addr,
845 unsigned size)
846 {
847 uint64_t data = 0;
848
849 if (!memory_region_access_valid(mr, addr, size, false)) {
850 return -1U; /* FIXME: better signalling */
851 }
852
853 if (!mr->ops->read) {
854 return mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
855 }
856
857 /* FIXME: support unaligned access */
858 access_with_adjusted_size(addr, &data, size,
859 mr->ops->impl.min_access_size,
860 mr->ops->impl.max_access_size,
861 memory_region_read_accessor, mr);
862
863 return data;
864 }
865
866 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
867 {
868 if (memory_region_wrong_endianness(mr)) {
869 switch (size) {
870 case 1:
871 break;
872 case 2:
873 *data = bswap16(*data);
874 break;
875 case 4:
876 *data = bswap32(*data);
877 break;
878 default:
879 abort();
880 }
881 }
882 }
883
884 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
885 hwaddr addr,
886 unsigned size)
887 {
888 uint64_t ret;
889
890 ret = memory_region_dispatch_read1(mr, addr, size);
891 adjust_endianness(mr, &ret, size);
892 return ret;
893 }
894
895 static void memory_region_dispatch_write(MemoryRegion *mr,
896 hwaddr addr,
897 uint64_t data,
898 unsigned size)
899 {
900 if (!memory_region_access_valid(mr, addr, size, true)) {
901 return; /* FIXME: better signalling */
902 }
903
904 adjust_endianness(mr, &data, size);
905
906 if (!mr->ops->write) {
907 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data);
908 return;
909 }
910
911 /* FIXME: support unaligned access */
912 access_with_adjusted_size(addr, &data, size,
913 mr->ops->impl.min_access_size,
914 mr->ops->impl.max_access_size,
915 memory_region_write_accessor, mr);
916 }
917
918 void memory_region_init_io(MemoryRegion *mr,
919 const MemoryRegionOps *ops,
920 void *opaque,
921 const char *name,
922 uint64_t size)
923 {
924 memory_region_init(mr, name, size);
925 mr->ops = ops;
926 mr->opaque = opaque;
927 mr->terminates = true;
928 mr->ram_addr = ~(ram_addr_t)0;
929 }
930
931 void memory_region_init_ram(MemoryRegion *mr,
932 const char *name,
933 uint64_t size)
934 {
935 memory_region_init(mr, name, size);
936 mr->ram = true;
937 mr->terminates = true;
938 mr->destructor = memory_region_destructor_ram;
939 mr->ram_addr = qemu_ram_alloc(size, mr);
940 }
941
942 void memory_region_init_ram_ptr(MemoryRegion *mr,
943 const char *name,
944 uint64_t size,
945 void *ptr)
946 {
947 memory_region_init(mr, name, size);
948 mr->ram = true;
949 mr->terminates = true;
950 mr->destructor = memory_region_destructor_ram_from_ptr;
951 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
952 }
953
954 void memory_region_init_alias(MemoryRegion *mr,
955 const char *name,
956 MemoryRegion *orig,
957 hwaddr offset,
958 uint64_t size)
959 {
960 memory_region_init(mr, name, size);
961 mr->alias = orig;
962 mr->alias_offset = offset;
963 }
964
965 void memory_region_init_rom_device(MemoryRegion *mr,
966 const MemoryRegionOps *ops,
967 void *opaque,
968 const char *name,
969 uint64_t size)
970 {
971 memory_region_init(mr, name, size);
972 mr->ops = ops;
973 mr->opaque = opaque;
974 mr->terminates = true;
975 mr->rom_device = true;
976 mr->destructor = memory_region_destructor_rom_device;
977 mr->ram_addr = qemu_ram_alloc(size, mr);
978 }
979
980 static uint64_t invalid_read(void *opaque, hwaddr addr,
981 unsigned size)
982 {
983 MemoryRegion *mr = opaque;
984
985 if (!mr->warning_printed) {
986 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
987 mr->warning_printed = true;
988 }
989 return -1U;
990 }
991
992 static void invalid_write(void *opaque, hwaddr addr, uint64_t data,
993 unsigned size)
994 {
995 MemoryRegion *mr = opaque;
996
997 if (!mr->warning_printed) {
998 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
999 mr->warning_printed = true;
1000 }
1001 }
1002
1003 static const MemoryRegionOps reservation_ops = {
1004 .read = invalid_read,
1005 .write = invalid_write,
1006 .endianness = DEVICE_NATIVE_ENDIAN,
1007 };
1008
1009 void memory_region_init_reservation(MemoryRegion *mr,
1010 const char *name,
1011 uint64_t size)
1012 {
1013 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1014 }
1015
1016 void memory_region_destroy(MemoryRegion *mr)
1017 {
1018 assert(QTAILQ_EMPTY(&mr->subregions));
1019 assert(memory_region_transaction_depth == 0);
1020 mr->destructor(mr);
1021 memory_region_clear_coalescing(mr);
1022 g_free((char *)mr->name);
1023 g_free(mr->ioeventfds);
1024 }
1025
1026 uint64_t memory_region_size(MemoryRegion *mr)
1027 {
1028 if (int128_eq(mr->size, int128_2_64())) {
1029 return UINT64_MAX;
1030 }
1031 return int128_get64(mr->size);
1032 }
1033
1034 const char *memory_region_name(MemoryRegion *mr)
1035 {
1036 return mr->name;
1037 }
1038
1039 bool memory_region_is_ram(MemoryRegion *mr)
1040 {
1041 return mr->ram;
1042 }
1043
1044 bool memory_region_is_logging(MemoryRegion *mr)
1045 {
1046 return mr->dirty_log_mask;
1047 }
1048
1049 bool memory_region_is_rom(MemoryRegion *mr)
1050 {
1051 return mr->ram && mr->readonly;
1052 }
1053
1054 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1055 {
1056 uint8_t mask = 1 << client;
1057
1058 memory_region_transaction_begin();
1059 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1060 memory_region_update_pending |= mr->enabled;
1061 memory_region_transaction_commit();
1062 }
1063
1064 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1065 hwaddr size, unsigned client)
1066 {
1067 assert(mr->terminates);
1068 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1069 1 << client);
1070 }
1071
1072 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1073 hwaddr size)
1074 {
1075 assert(mr->terminates);
1076 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1077 }
1078
1079 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1080 hwaddr size, unsigned client)
1081 {
1082 bool ret;
1083 assert(mr->terminates);
1084 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1085 1 << client);
1086 if (ret) {
1087 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1088 mr->ram_addr + addr + size,
1089 1 << client);
1090 }
1091 return ret;
1092 }
1093
1094
1095 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1096 {
1097 AddressSpace *as;
1098 FlatRange *fr;
1099
1100 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1101 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1102 if (fr->mr == mr) {
1103 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1104 }
1105 }
1106 }
1107 }
1108
1109 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1110 {
1111 if (mr->readonly != readonly) {
1112 memory_region_transaction_begin();
1113 mr->readonly = readonly;
1114 memory_region_update_pending |= mr->enabled;
1115 memory_region_transaction_commit();
1116 }
1117 }
1118
1119 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1120 {
1121 if (mr->romd_mode != romd_mode) {
1122 memory_region_transaction_begin();
1123 mr->romd_mode = romd_mode;
1124 memory_region_update_pending |= mr->enabled;
1125 memory_region_transaction_commit();
1126 }
1127 }
1128
1129 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1130 hwaddr size, unsigned client)
1131 {
1132 assert(mr->terminates);
1133 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1134 mr->ram_addr + addr + size,
1135 1 << client);
1136 }
1137
1138 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1139 {
1140 if (mr->alias) {
1141 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1142 }
1143
1144 assert(mr->terminates);
1145
1146 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1147 }
1148
1149 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1150 {
1151 FlatRange *fr;
1152 CoalescedMemoryRange *cmr;
1153 AddrRange tmp;
1154 MemoryRegionSection section;
1155
1156 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1157 if (fr->mr == mr) {
1158 section = (MemoryRegionSection) {
1159 .address_space = as,
1160 .offset_within_address_space = int128_get64(fr->addr.start),
1161 .size = int128_get64(fr->addr.size),
1162 };
1163
1164 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1165 int128_get64(fr->addr.start),
1166 int128_get64(fr->addr.size));
1167 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1168 tmp = addrrange_shift(cmr->addr,
1169 int128_sub(fr->addr.start,
1170 int128_make64(fr->offset_in_region)));
1171 if (!addrrange_intersects(tmp, fr->addr)) {
1172 continue;
1173 }
1174 tmp = addrrange_intersection(tmp, fr->addr);
1175 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1176 int128_get64(tmp.start),
1177 int128_get64(tmp.size));
1178 }
1179 }
1180 }
1181 }
1182
1183 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1184 {
1185 AddressSpace *as;
1186
1187 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1188 memory_region_update_coalesced_range_as(mr, as);
1189 }
1190 }
1191
1192 void memory_region_set_coalescing(MemoryRegion *mr)
1193 {
1194 memory_region_clear_coalescing(mr);
1195 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1196 }
1197
1198 void memory_region_add_coalescing(MemoryRegion *mr,
1199 hwaddr offset,
1200 uint64_t size)
1201 {
1202 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1203
1204 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1205 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1206 memory_region_update_coalesced_range(mr);
1207 memory_region_set_flush_coalesced(mr);
1208 }
1209
1210 void memory_region_clear_coalescing(MemoryRegion *mr)
1211 {
1212 CoalescedMemoryRange *cmr;
1213
1214 qemu_flush_coalesced_mmio_buffer();
1215 mr->flush_coalesced_mmio = false;
1216
1217 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1218 cmr = QTAILQ_FIRST(&mr->coalesced);
1219 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1220 g_free(cmr);
1221 }
1222 memory_region_update_coalesced_range(mr);
1223 }
1224
1225 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1226 {
1227 mr->flush_coalesced_mmio = true;
1228 }
1229
1230 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1231 {
1232 qemu_flush_coalesced_mmio_buffer();
1233 if (QTAILQ_EMPTY(&mr->coalesced)) {
1234 mr->flush_coalesced_mmio = false;
1235 }
1236 }
1237
1238 void memory_region_add_eventfd(MemoryRegion *mr,
1239 hwaddr addr,
1240 unsigned size,
1241 bool match_data,
1242 uint64_t data,
1243 EventNotifier *e)
1244 {
1245 MemoryRegionIoeventfd mrfd = {
1246 .addr.start = int128_make64(addr),
1247 .addr.size = int128_make64(size),
1248 .match_data = match_data,
1249 .data = data,
1250 .e = e,
1251 };
1252 unsigned i;
1253
1254 adjust_endianness(mr, &mrfd.data, size);
1255 memory_region_transaction_begin();
1256 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1257 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1258 break;
1259 }
1260 }
1261 ++mr->ioeventfd_nb;
1262 mr->ioeventfds = g_realloc(mr->ioeventfds,
1263 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1264 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1265 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1266 mr->ioeventfds[i] = mrfd;
1267 memory_region_update_pending |= mr->enabled;
1268 memory_region_transaction_commit();
1269 }
1270
1271 void memory_region_del_eventfd(MemoryRegion *mr,
1272 hwaddr addr,
1273 unsigned size,
1274 bool match_data,
1275 uint64_t data,
1276 EventNotifier *e)
1277 {
1278 MemoryRegionIoeventfd mrfd = {
1279 .addr.start = int128_make64(addr),
1280 .addr.size = int128_make64(size),
1281 .match_data = match_data,
1282 .data = data,
1283 .e = e,
1284 };
1285 unsigned i;
1286
1287 adjust_endianness(mr, &mrfd.data, size);
1288 memory_region_transaction_begin();
1289 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1290 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1291 break;
1292 }
1293 }
1294 assert(i != mr->ioeventfd_nb);
1295 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1296 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1297 --mr->ioeventfd_nb;
1298 mr->ioeventfds = g_realloc(mr->ioeventfds,
1299 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1300 memory_region_update_pending |= mr->enabled;
1301 memory_region_transaction_commit();
1302 }
1303
1304 static void memory_region_add_subregion_common(MemoryRegion *mr,
1305 hwaddr offset,
1306 MemoryRegion *subregion)
1307 {
1308 MemoryRegion *other;
1309
1310 memory_region_transaction_begin();
1311
1312 assert(!subregion->parent);
1313 subregion->parent = mr;
1314 subregion->addr = offset;
1315 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1316 if (subregion->may_overlap || other->may_overlap) {
1317 continue;
1318 }
1319 if (int128_ge(int128_make64(offset),
1320 int128_add(int128_make64(other->addr), other->size))
1321 || int128_le(int128_add(int128_make64(offset), subregion->size),
1322 int128_make64(other->addr))) {
1323 continue;
1324 }
1325 #if 0
1326 printf("warning: subregion collision %llx/%llx (%s) "
1327 "vs %llx/%llx (%s)\n",
1328 (unsigned long long)offset,
1329 (unsigned long long)int128_get64(subregion->size),
1330 subregion->name,
1331 (unsigned long long)other->addr,
1332 (unsigned long long)int128_get64(other->size),
1333 other->name);
1334 #endif
1335 }
1336 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1337 if (subregion->priority >= other->priority) {
1338 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1339 goto done;
1340 }
1341 }
1342 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1343 done:
1344 memory_region_update_pending |= mr->enabled && subregion->enabled;
1345 memory_region_transaction_commit();
1346 }
1347
1348
1349 void memory_region_add_subregion(MemoryRegion *mr,
1350 hwaddr offset,
1351 MemoryRegion *subregion)
1352 {
1353 subregion->may_overlap = false;
1354 subregion->priority = 0;
1355 memory_region_add_subregion_common(mr, offset, subregion);
1356 }
1357
1358 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1359 hwaddr offset,
1360 MemoryRegion *subregion,
1361 unsigned priority)
1362 {
1363 subregion->may_overlap = true;
1364 subregion->priority = priority;
1365 memory_region_add_subregion_common(mr, offset, subregion);
1366 }
1367
1368 void memory_region_del_subregion(MemoryRegion *mr,
1369 MemoryRegion *subregion)
1370 {
1371 memory_region_transaction_begin();
1372 assert(subregion->parent == mr);
1373 subregion->parent = NULL;
1374 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1375 memory_region_update_pending |= mr->enabled && subregion->enabled;
1376 memory_region_transaction_commit();
1377 }
1378
1379 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1380 {
1381 if (enabled == mr->enabled) {
1382 return;
1383 }
1384 memory_region_transaction_begin();
1385 mr->enabled = enabled;
1386 memory_region_update_pending = true;
1387 memory_region_transaction_commit();
1388 }
1389
1390 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1391 {
1392 MemoryRegion *parent = mr->parent;
1393 unsigned priority = mr->priority;
1394 bool may_overlap = mr->may_overlap;
1395
1396 if (addr == mr->addr || !parent) {
1397 mr->addr = addr;
1398 return;
1399 }
1400
1401 memory_region_transaction_begin();
1402 memory_region_del_subregion(parent, mr);
1403 if (may_overlap) {
1404 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1405 } else {
1406 memory_region_add_subregion(parent, addr, mr);
1407 }
1408 memory_region_transaction_commit();
1409 }
1410
1411 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1412 {
1413 assert(mr->alias);
1414
1415 if (offset == mr->alias_offset) {
1416 return;
1417 }
1418
1419 memory_region_transaction_begin();
1420 mr->alias_offset = offset;
1421 memory_region_update_pending |= mr->enabled;
1422 memory_region_transaction_commit();
1423 }
1424
1425 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1426 {
1427 return mr->ram_addr;
1428 }
1429
1430 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1431 {
1432 const AddrRange *addr = addr_;
1433 const FlatRange *fr = fr_;
1434
1435 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1436 return -1;
1437 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1438 return 1;
1439 }
1440 return 0;
1441 }
1442
1443 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1444 {
1445 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1446 sizeof(FlatRange), cmp_flatrange_addr);
1447 }
1448
1449 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1450 hwaddr addr, uint64_t size)
1451 {
1452 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1453 MemoryRegion *root;
1454 AddressSpace *as;
1455 AddrRange range;
1456 FlatRange *fr;
1457
1458 addr += mr->addr;
1459 for (root = mr; root->parent; ) {
1460 root = root->parent;
1461 addr += root->addr;
1462 }
1463
1464 as = memory_region_to_address_space(root);
1465 range = addrrange_make(int128_make64(addr), int128_make64(size));
1466 fr = address_space_lookup(as, range);
1467 if (!fr) {
1468 return ret;
1469 }
1470
1471 while (fr > as->current_map->ranges
1472 && addrrange_intersects(fr[-1].addr, range)) {
1473 --fr;
1474 }
1475
1476 ret.mr = fr->mr;
1477 ret.address_space = as;
1478 range = addrrange_intersection(range, fr->addr);
1479 ret.offset_within_region = fr->offset_in_region;
1480 ret.offset_within_region += int128_get64(int128_sub(range.start,
1481 fr->addr.start));
1482 ret.size = int128_get64(range.size);
1483 ret.offset_within_address_space = int128_get64(range.start);
1484 ret.readonly = fr->readonly;
1485 return ret;
1486 }
1487
1488 void address_space_sync_dirty_bitmap(AddressSpace *as)
1489 {
1490 FlatRange *fr;
1491
1492 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1493 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1494 }
1495 }
1496
1497 void memory_global_dirty_log_start(void)
1498 {
1499 global_dirty_log = true;
1500 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1501 }
1502
1503 void memory_global_dirty_log_stop(void)
1504 {
1505 global_dirty_log = false;
1506 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1507 }
1508
1509 static void listener_add_address_space(MemoryListener *listener,
1510 AddressSpace *as)
1511 {
1512 FlatRange *fr;
1513
1514 if (listener->address_space_filter
1515 && listener->address_space_filter != as) {
1516 return;
1517 }
1518
1519 if (global_dirty_log) {
1520 if (listener->log_global_start) {
1521 listener->log_global_start(listener);
1522 }
1523 }
1524
1525 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1526 MemoryRegionSection section = {
1527 .mr = fr->mr,
1528 .address_space = as,
1529 .offset_within_region = fr->offset_in_region,
1530 .size = int128_get64(fr->addr.size),
1531 .offset_within_address_space = int128_get64(fr->addr.start),
1532 .readonly = fr->readonly,
1533 };
1534 if (listener->region_add) {
1535 listener->region_add(listener, &section);
1536 }
1537 }
1538 }
1539
1540 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1541 {
1542 MemoryListener *other = NULL;
1543 AddressSpace *as;
1544
1545 listener->address_space_filter = filter;
1546 if (QTAILQ_EMPTY(&memory_listeners)
1547 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1548 memory_listeners)->priority) {
1549 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1550 } else {
1551 QTAILQ_FOREACH(other, &memory_listeners, link) {
1552 if (listener->priority < other->priority) {
1553 break;
1554 }
1555 }
1556 QTAILQ_INSERT_BEFORE(other, listener, link);
1557 }
1558
1559 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1560 listener_add_address_space(listener, as);
1561 }
1562 }
1563
1564 void memory_listener_unregister(MemoryListener *listener)
1565 {
1566 QTAILQ_REMOVE(&memory_listeners, listener, link);
1567 }
1568
1569 void address_space_init(AddressSpace *as, MemoryRegion *root)
1570 {
1571 memory_region_transaction_begin();
1572 as->root = root;
1573 as->current_map = g_new(FlatView, 1);
1574 flatview_init(as->current_map);
1575 as->ioeventfd_nb = 0;
1576 as->ioeventfds = NULL;
1577 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1578 as->name = NULL;
1579 address_space_init_dispatch(as);
1580 memory_region_update_pending |= root->enabled;
1581 memory_region_transaction_commit();
1582 }
1583
1584 void address_space_destroy(AddressSpace *as)
1585 {
1586 /* Flush out anything from MemoryListeners listening in on this */
1587 memory_region_transaction_begin();
1588 as->root = NULL;
1589 memory_region_transaction_commit();
1590 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1591 address_space_destroy_dispatch(as);
1592 flatview_destroy(as->current_map);
1593 g_free(as->current_map);
1594 g_free(as->ioeventfds);
1595 }
1596
1597 uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
1598 {
1599 return memory_region_dispatch_read(mr, addr, size);
1600 }
1601
1602 void io_mem_write(MemoryRegion *mr, hwaddr addr,
1603 uint64_t val, unsigned size)
1604 {
1605 memory_region_dispatch_write(mr, addr, val, size);
1606 }
1607
1608 typedef struct MemoryRegionList MemoryRegionList;
1609
1610 struct MemoryRegionList {
1611 const MemoryRegion *mr;
1612 bool printed;
1613 QTAILQ_ENTRY(MemoryRegionList) queue;
1614 };
1615
1616 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1617
1618 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1619 const MemoryRegion *mr, unsigned int level,
1620 hwaddr base,
1621 MemoryRegionListHead *alias_print_queue)
1622 {
1623 MemoryRegionList *new_ml, *ml, *next_ml;
1624 MemoryRegionListHead submr_print_queue;
1625 const MemoryRegion *submr;
1626 unsigned int i;
1627
1628 if (!mr || !mr->enabled) {
1629 return;
1630 }
1631
1632 for (i = 0; i < level; i++) {
1633 mon_printf(f, " ");
1634 }
1635
1636 if (mr->alias) {
1637 MemoryRegionList *ml;
1638 bool found = false;
1639
1640 /* check if the alias is already in the queue */
1641 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1642 if (ml->mr == mr->alias && !ml->printed) {
1643 found = true;
1644 }
1645 }
1646
1647 if (!found) {
1648 ml = g_new(MemoryRegionList, 1);
1649 ml->mr = mr->alias;
1650 ml->printed = false;
1651 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1652 }
1653 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1654 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1655 "-" TARGET_FMT_plx "\n",
1656 base + mr->addr,
1657 base + mr->addr
1658 + (hwaddr)int128_get64(mr->size) - 1,
1659 mr->priority,
1660 mr->romd_mode ? 'R' : '-',
1661 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1662 : '-',
1663 mr->name,
1664 mr->alias->name,
1665 mr->alias_offset,
1666 mr->alias_offset
1667 + (hwaddr)int128_get64(mr->size) - 1);
1668 } else {
1669 mon_printf(f,
1670 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1671 base + mr->addr,
1672 base + mr->addr
1673 + (hwaddr)int128_get64(mr->size) - 1,
1674 mr->priority,
1675 mr->romd_mode ? 'R' : '-',
1676 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1677 : '-',
1678 mr->name);
1679 }
1680
1681 QTAILQ_INIT(&submr_print_queue);
1682
1683 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1684 new_ml = g_new(MemoryRegionList, 1);
1685 new_ml->mr = submr;
1686 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1687 if (new_ml->mr->addr < ml->mr->addr ||
1688 (new_ml->mr->addr == ml->mr->addr &&
1689 new_ml->mr->priority > ml->mr->priority)) {
1690 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1691 new_ml = NULL;
1692 break;
1693 }
1694 }
1695 if (new_ml) {
1696 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1697 }
1698 }
1699
1700 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1701 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1702 alias_print_queue);
1703 }
1704
1705 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1706 g_free(ml);
1707 }
1708 }
1709
1710 void mtree_info(fprintf_function mon_printf, void *f)
1711 {
1712 MemoryRegionListHead ml_head;
1713 MemoryRegionList *ml, *ml2;
1714 AddressSpace *as;
1715
1716 QTAILQ_INIT(&ml_head);
1717
1718 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1719 if (!as->name) {
1720 continue;
1721 }
1722 mon_printf(f, "%s\n", as->name);
1723 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1724 }
1725
1726 mon_printf(f, "aliases\n");
1727 /* print aliased regions */
1728 QTAILQ_FOREACH(ml, &ml_head, queue) {
1729 if (!ml->printed) {
1730 mon_printf(f, "%s\n", ml->mr->name);
1731 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1732 }
1733 }
1734
1735 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1736 g_free(ml);
1737 }
1738 }
AR7 emulation for QEMU