spapr: Simplify error handling in spapr_cpu_core_realize()
[qemu/ar7.git] / hw / intc / ioapic_common.c
blob5538b5b86eca89df50fdba9d36a0b66a80dc5c6e
1 /*
2 * IOAPIC emulation logic - common bits of emulated and KVM kernel model
4 * Copyright (c) 2004-2005 Fabrice Bellard
5 * Copyright (c) 2009 Xiantao Zhang, Intel
6 * Copyright (c) 2011 Jan Kiszka, Siemens AG
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu/osdep.h"
23 #include "qapi/error.h"
24 #include "qemu/module.h"
25 #include "migration/vmstate.h"
26 #include "monitor/monitor.h"
27 #include "hw/i386/ioapic.h"
28 #include "hw/i386/ioapic_internal.h"
29 #include "hw/intc/intc.h"
30 #include "hw/sysbus.h"
32 /* ioapic_no count start from 0 to MAX_IOAPICS,
33 * remove as static variable from ioapic_common_init.
34 * now as a global variable, let child to increase the counter
35 * then we can drop the 'instance_no' argument
36 * and convert to our QOM's realize function
38 int ioapic_no;
40 void ioapic_stat_update_irq(IOAPICCommonState *s, int irq, int level)
42 if (level != s->irq_level[irq]) {
43 s->irq_level[irq] = level;
44 if (level == 1) {
45 s->irq_count[irq]++;
50 static bool ioapic_get_statistics(InterruptStatsProvider *obj,
51 uint64_t **irq_counts,
52 unsigned int *nb_irqs)
54 IOAPICCommonState *s = IOAPIC_COMMON(obj);
56 *irq_counts = s->irq_count;
57 *nb_irqs = IOAPIC_NUM_PINS;
59 return true;
62 static void ioapic_irr_dump(Monitor *mon, const char *name, uint32_t bitmap)
64 int i;
66 monitor_printf(mon, "%-10s ", name);
67 if (bitmap == 0) {
68 monitor_printf(mon, "(none)\n");
69 return;
71 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
72 if (bitmap & (1 << i)) {
73 monitor_printf(mon, "%-2u ", i);
76 monitor_printf(mon, "\n");
79 void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s)
81 static const char *delm_str[] = {
82 "fixed", "lowest", "SMI", "...", "NMI", "INIT", "...", "extINT"};
83 uint32_t remote_irr = 0;
84 int i;
86 monitor_printf(mon, "ioapic0: ver=0x%x id=0x%02x sel=0x%02x",
87 s->version, s->id, s->ioregsel);
88 if (s->ioregsel) {
89 monitor_printf(mon, " (redir[%u])\n",
90 (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1);
91 } else {
92 monitor_printf(mon, "\n");
94 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
95 uint64_t entry = s->ioredtbl[i];
96 uint32_t delm = (uint32_t)((entry & IOAPIC_LVT_DELIV_MODE) >>
97 IOAPIC_LVT_DELIV_MODE_SHIFT);
98 monitor_printf(mon, " pin %-2u 0x%016"PRIx64" dest=%"PRIx64
99 " vec=%-3"PRIu64" %s %-5s %-6s %-6s %s\n",
100 i, entry,
101 (entry >> IOAPIC_LVT_DEST_SHIFT) &
102 (entry & IOAPIC_LVT_DEST_MODE ? 0xff : 0xf),
103 entry & IOAPIC_VECTOR_MASK,
104 entry & IOAPIC_LVT_POLARITY ? "active-lo" : "active-hi",
105 entry & IOAPIC_LVT_TRIGGER_MODE ? "level" : "edge",
106 entry & IOAPIC_LVT_MASKED ? "masked" : "",
107 delm_str[delm],
108 entry & IOAPIC_LVT_DEST_MODE ? "logical" : "physical");
110 remote_irr |= entry & IOAPIC_LVT_TRIGGER_MODE ?
111 (entry & IOAPIC_LVT_REMOTE_IRR ? (1 << i) : 0) : 0;
113 ioapic_irr_dump(mon, " IRR", s->irr);
114 ioapic_irr_dump(mon, " Remote IRR", remote_irr);
117 void ioapic_reset_common(DeviceState *dev)
119 IOAPICCommonState *s = IOAPIC_COMMON(dev);
120 int i;
122 s->id = 0;
123 s->ioregsel = 0;
124 s->irr = 0;
125 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
126 s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT;
130 static int ioapic_dispatch_pre_save(void *opaque)
132 IOAPICCommonState *s = IOAPIC_COMMON(opaque);
133 IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
135 if (info->pre_save) {
136 info->pre_save(s);
139 return 0;
142 static int ioapic_dispatch_post_load(void *opaque, int version_id)
144 IOAPICCommonState *s = IOAPIC_COMMON(opaque);
145 IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
147 if (info->post_load) {
148 info->post_load(s);
150 return 0;
153 static void ioapic_common_realize(DeviceState *dev, Error **errp)
155 IOAPICCommonState *s = IOAPIC_COMMON(dev);
156 IOAPICCommonClass *info;
158 if (ioapic_no >= MAX_IOAPICS) {
159 error_setg(errp, "Only %d ioapics allowed", MAX_IOAPICS);
160 return;
163 info = IOAPIC_COMMON_GET_CLASS(s);
164 info->realize(dev, errp);
166 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory);
167 ioapic_no++;
170 static void ioapic_print_info(InterruptStatsProvider *obj,
171 Monitor *mon)
173 IOAPICCommonState *s = IOAPIC_COMMON(obj);
175 ioapic_dispatch_pre_save(s);
176 ioapic_print_redtbl(mon, s);
179 static const VMStateDescription vmstate_ioapic_common = {
180 .name = "ioapic",
181 .version_id = 3,
182 .minimum_version_id = 1,
183 .pre_save = ioapic_dispatch_pre_save,
184 .post_load = ioapic_dispatch_post_load,
185 .fields = (VMStateField[]) {
186 VMSTATE_UINT8(id, IOAPICCommonState),
187 VMSTATE_UINT8(ioregsel, IOAPICCommonState),
188 VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */
189 VMSTATE_UINT32_V(irr, IOAPICCommonState, 2),
190 VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICCommonState, IOAPIC_NUM_PINS),
191 VMSTATE_END_OF_LIST()
195 static void ioapic_common_class_init(ObjectClass *klass, void *data)
197 DeviceClass *dc = DEVICE_CLASS(klass);
198 InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(klass);
200 dc->realize = ioapic_common_realize;
201 dc->vmsd = &vmstate_ioapic_common;
202 ic->print_info = ioapic_print_info;
203 ic->get_statistics = ioapic_get_statistics;
206 static const TypeInfo ioapic_common_type = {
207 .name = TYPE_IOAPIC_COMMON,
208 .parent = TYPE_SYS_BUS_DEVICE,
209 .instance_size = sizeof(IOAPICCommonState),
210 .class_size = sizeof(IOAPICCommonClass),
211 .class_init = ioapic_common_class_init,
212 .abstract = true,
213 .interfaces = (InterfaceInfo[]) {
214 { TYPE_INTERRUPT_STATS_PROVIDER },
219 static void ioapic_common_register_types(void)
221 type_register_static(&ioapic_common_type);
224 type_init(ioapic_common_register_types)