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Merge tag 'fixes-20221123-pull-request' of https://gitlab.com/kraxel/qemu into staging
[qemu/ar7.git] / linux-user / i386 / signal.c
blob60fa07d6f9cf8c6b0449b79aad77687e076c61e9
1 /*
2 * Emulation of Linux signals
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include "qemu/osdep.h"
20 #include "qemu.h"
21 #include "user-internals.h"
22 #include "signal-common.h"
23 #include "linux-user/trace.h"
24
25 /* from the Linux kernel - /arch/x86/include/uapi/asm/sigcontext.h */
26
27 #define TARGET_FP_XSTATE_MAGIC1 0x46505853U /* FPXS */
28 #define TARGET_FP_XSTATE_MAGIC2 0x46505845U /* FPXE */
29 #define TARGET_FP_XSTATE_MAGIC2_SIZE 4
30
31 struct target_fpreg {
32 uint16_t significand[4];
33 uint16_t exponent;
34 };
35
36 struct target_fpxreg {
37 uint16_t significand[4];
38 uint16_t exponent;
39 uint16_t padding[3];
40 };
41
42 struct target_xmmreg {
43 uint32_t element[4];
44 };
45
46 struct target_fpx_sw_bytes {
47 uint32_t magic1;
48 uint32_t extended_size;
49 uint64_t xfeatures;
50 uint32_t xstate_size;
51 uint32_t reserved[7];
52 };
53 QEMU_BUILD_BUG_ON(sizeof(struct target_fpx_sw_bytes) != 12*4);
54
55 struct target_fpstate_fxsave {
56 /* FXSAVE format */
57 uint16_t cw;
58 uint16_t sw;
59 uint16_t twd;
60 uint16_t fop;
61 uint64_t rip;
62 uint64_t rdp;
63 uint32_t mxcsr;
64 uint32_t mxcsr_mask;
65 uint32_t st_space[32];
66 uint32_t xmm_space[64];
67 uint32_t hw_reserved[12];
68 struct target_fpx_sw_bytes sw_reserved;
69 uint8_t xfeatures[];
70 };
71 #define TARGET_FXSAVE_SIZE sizeof(struct target_fpstate_fxsave)
72 QEMU_BUILD_BUG_ON(TARGET_FXSAVE_SIZE != 512);
73 QEMU_BUILD_BUG_ON(offsetof(struct target_fpstate_fxsave, sw_reserved) != 464);
74
75 struct target_fpstate_32 {
76 /* Regular FPU environment */
77 uint32_t cw;
78 uint32_t sw;
79 uint32_t tag;
80 uint32_t ipoff;
81 uint32_t cssel;
82 uint32_t dataoff;
83 uint32_t datasel;
84 struct target_fpreg st[8];
85 uint16_t status;
86 uint16_t magic; /* 0xffff = regular FPU data only */
87 struct target_fpstate_fxsave fxsave;
88 };
89
90 /*
91 * For simplicity, setup_frame aligns struct target_fpstate_32 to
92 * 16 bytes, so ensure that the FXSAVE area is also aligned.
93 */
94 QEMU_BUILD_BUG_ON(offsetof(struct target_fpstate_32, fxsave) & 15);
95
96 #ifndef TARGET_X86_64
97 # define target_fpstate target_fpstate_32
98 # define TARGET_FPSTATE_FXSAVE_OFFSET offsetof(struct target_fpstate_32, fxsave)
99 #else
100 # define target_fpstate target_fpstate_fxsave
101 # define TARGET_FPSTATE_FXSAVE_OFFSET 0
102 #endif
103
104 struct target_sigcontext_32 {
105 uint16_t gs, __gsh;
106 uint16_t fs, __fsh;
107 uint16_t es, __esh;
108 uint16_t ds, __dsh;
109 uint32_t edi;
110 uint32_t esi;
111 uint32_t ebp;
112 uint32_t esp;
113 uint32_t ebx;
114 uint32_t edx;
115 uint32_t ecx;
116 uint32_t eax;
117 uint32_t trapno;
118 uint32_t err;
119 uint32_t eip;
120 uint16_t cs, __csh;
121 uint32_t eflags;
122 uint32_t esp_at_signal;
123 uint16_t ss, __ssh;
124 uint32_t fpstate; /* pointer */
125 uint32_t oldmask;
126 uint32_t cr2;
127 };
128
129 struct target_sigcontext_64 {
130 uint64_t r8;
131 uint64_t r9;
132 uint64_t r10;
133 uint64_t r11;
134 uint64_t r12;
135 uint64_t r13;
136 uint64_t r14;
137 uint64_t r15;
138
139 uint64_t rdi;
140 uint64_t rsi;
141 uint64_t rbp;
142 uint64_t rbx;
143 uint64_t rdx;
144 uint64_t rax;
145 uint64_t rcx;
146 uint64_t rsp;
147 uint64_t rip;
148
149 uint64_t eflags;
150
151 uint16_t cs;
152 uint16_t gs;
153 uint16_t fs;
154 uint16_t ss;
155
156 uint64_t err;
157 uint64_t trapno;
158 uint64_t oldmask;
159 uint64_t cr2;
160
161 uint64_t fpstate; /* pointer */
162 uint64_t padding[8];
163 };
164
165 #ifndef TARGET_X86_64
166 # define target_sigcontext target_sigcontext_32
167 #else
168 # define target_sigcontext target_sigcontext_64
169 #endif
170
171 /* see Linux/include/uapi/asm-generic/ucontext.h */
172 struct target_ucontext {
173 abi_ulong tuc_flags;
174 abi_ulong tuc_link;
175 target_stack_t tuc_stack;
176 struct target_sigcontext tuc_mcontext;
177 target_sigset_t tuc_sigmask; /* mask last for extensibility */
178 };
179
180 #ifndef TARGET_X86_64
181 struct sigframe {
182 abi_ulong pretcode;
183 int sig;
184 struct target_sigcontext sc;
185 /*
186 * The actual fpstate is placed after retcode[] below, to make
187 * room for the variable-sized xsave data. The older unused fpstate
188 * has to be kept to avoid changing the offset of extramask[], which
189 * is part of the ABI.
190 */
191 struct target_fpstate fpstate_unused;
192 abi_ulong extramask[TARGET_NSIG_WORDS-1];
193 char retcode[8];
194
195 /*
196 * This field will be 16-byte aligned in memory. Applying QEMU_ALIGNED
197 * to it ensures that the base of the frame has an appropriate alignment
198 * too.
199 */
200 struct target_fpstate fpstate QEMU_ALIGNED(8);
201 };
202 #define TARGET_SIGFRAME_FXSAVE_OFFSET ( \
203 offsetof(struct sigframe, fpstate) + TARGET_FPSTATE_FXSAVE_OFFSET)
204
205 struct rt_sigframe {
206 abi_ulong pretcode;
207 int sig;
208 abi_ulong pinfo;
209 abi_ulong puc;
210 struct target_siginfo info;
211 struct target_ucontext uc;
212 char retcode[8];
213 struct target_fpstate fpstate QEMU_ALIGNED(8);
214 };
215 #define TARGET_RT_SIGFRAME_FXSAVE_OFFSET ( \
216 offsetof(struct rt_sigframe, fpstate) + TARGET_FPSTATE_FXSAVE_OFFSET)
217 #else
218
219 struct rt_sigframe {
220 abi_ulong pretcode;
221 struct target_ucontext uc;
222 struct target_siginfo info;
223 struct target_fpstate fpstate QEMU_ALIGNED(16);
224 };
225 #define TARGET_RT_SIGFRAME_FXSAVE_OFFSET ( \
226 offsetof(struct rt_sigframe, fpstate) + TARGET_FPSTATE_FXSAVE_OFFSET)
227 #endif
228
229 /*
230 * Set up a signal frame.
231 */
232
233 static void xsave_sigcontext(CPUX86State *env, struct target_fpstate_fxsave *fxsave,
234 abi_ulong fxsave_addr)
235 {
236 if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
237 /* fxsave_addr must be 16 byte aligned for fxsave */
238 assert(!(fxsave_addr & 0xf));
239
240 cpu_x86_fxsave(env, fxsave_addr);
241 __put_user(0, &fxsave->sw_reserved.magic1);
242 } else {
243 uint32_t xstate_size = xsave_area_size(env->xcr0, false);
244 uint32_t xfeatures_size = xstate_size - TARGET_FXSAVE_SIZE;
245
246 /*
247 * extended_size is the offset from fpstate_addr to right after the end
248 * of the extended save states. On 32-bit that includes the legacy
249 * FSAVE area.
250 */
251 uint32_t extended_size = TARGET_FPSTATE_FXSAVE_OFFSET
252 + xstate_size + TARGET_FP_XSTATE_MAGIC2_SIZE;
253
254 /* fxsave_addr must be 64 byte aligned for xsave */
255 assert(!(fxsave_addr & 0x3f));
256
257 /* Zero the header, XSAVE *adds* features to an existing save state. */
258 memset(fxsave->xfeatures, 0, 64);
259 cpu_x86_xsave(env, fxsave_addr);
260 __put_user(TARGET_FP_XSTATE_MAGIC1, &fxsave->sw_reserved.magic1);
261 __put_user(extended_size, &fxsave->sw_reserved.extended_size);
262 __put_user(env->xcr0, &fxsave->sw_reserved.xfeatures);
263 __put_user(xstate_size, &fxsave->sw_reserved.xstate_size);
264 __put_user(TARGET_FP_XSTATE_MAGIC2, (uint32_t *) &fxsave->xfeatures[xfeatures_size]);
265 }
266 }
267
268 static void setup_sigcontext(struct target_sigcontext *sc,
269 struct target_fpstate *fpstate, CPUX86State *env, abi_ulong mask,
270 abi_ulong fpstate_addr)
271 {
272 CPUState *cs = env_cpu(env);
273 #ifndef TARGET_X86_64
274 uint16_t magic;
275
276 /* already locked in setup_frame() */
277 __put_user(env->segs[R_GS].selector, (unsigned int *)&sc->gs);
278 __put_user(env->segs[R_FS].selector, (unsigned int *)&sc->fs);
279 __put_user(env->segs[R_ES].selector, (unsigned int *)&sc->es);
280 __put_user(env->segs[R_DS].selector, (unsigned int *)&sc->ds);
281 __put_user(env->regs[R_EDI], &sc->edi);
282 __put_user(env->regs[R_ESI], &sc->esi);
283 __put_user(env->regs[R_EBP], &sc->ebp);
284 __put_user(env->regs[R_ESP], &sc->esp);
285 __put_user(env->regs[R_EBX], &sc->ebx);
286 __put_user(env->regs[R_EDX], &sc->edx);
287 __put_user(env->regs[R_ECX], &sc->ecx);
288 __put_user(env->regs[R_EAX], &sc->eax);
289 __put_user(cs->exception_index, &sc->trapno);
290 __put_user(env->error_code, &sc->err);
291 __put_user(env->eip, &sc->eip);
292 __put_user(env->segs[R_CS].selector, (unsigned int *)&sc->cs);
293 __put_user(env->eflags, &sc->eflags);
294 __put_user(env->regs[R_ESP], &sc->esp_at_signal);
295 __put_user(env->segs[R_SS].selector, (unsigned int *)&sc->ss);
296
297 cpu_x86_fsave(env, fpstate_addr, 1);
298 fpstate->status = fpstate->sw;
299 if (!(env->features[FEAT_1_EDX] & CPUID_FXSR)) {
300 magic = 0xffff;
301 } else {
302 xsave_sigcontext(env, &fpstate->fxsave,
303 fpstate_addr + TARGET_FPSTATE_FXSAVE_OFFSET);
304 magic = 0;
305 }
306 __put_user(magic, &fpstate->magic);
307 #else
308 __put_user(env->regs[R_EDI], &sc->rdi);
309 __put_user(env->regs[R_ESI], &sc->rsi);
310 __put_user(env->regs[R_EBP], &sc->rbp);
311 __put_user(env->regs[R_ESP], &sc->rsp);
312 __put_user(env->regs[R_EBX], &sc->rbx);
313 __put_user(env->regs[R_EDX], &sc->rdx);
314 __put_user(env->regs[R_ECX], &sc->rcx);
315 __put_user(env->regs[R_EAX], &sc->rax);
316
317 __put_user(env->regs[8], &sc->r8);
318 __put_user(env->regs[9], &sc->r9);
319 __put_user(env->regs[10], &sc->r10);
320 __put_user(env->regs[11], &sc->r11);
321 __put_user(env->regs[12], &sc->r12);
322 __put_user(env->regs[13], &sc->r13);
323 __put_user(env->regs[14], &sc->r14);
324 __put_user(env->regs[15], &sc->r15);
325
326 __put_user(cs->exception_index, &sc->trapno);
327 __put_user(env->error_code, &sc->err);
328 __put_user(env->eip, &sc->rip);
329
330 __put_user(env->eflags, &sc->eflags);
331 __put_user(env->segs[R_CS].selector, &sc->cs);
332 __put_user((uint16_t)0, &sc->gs);
333 __put_user((uint16_t)0, &sc->fs);
334 __put_user(env->segs[R_SS].selector, &sc->ss);
335
336 xsave_sigcontext(env, fpstate, fpstate_addr);
337 #endif
338
339 __put_user(fpstate_addr, &sc->fpstate);
340
341 /* non-iBCS2 extensions.. */
342 __put_user(mask, &sc->oldmask);
343 __put_user(env->cr[2], &sc->cr2);
344 }
345
346 /*
347 * Determine which stack to use..
348 */
349
350 static inline abi_ulong
351 get_sigframe(struct target_sigaction *ka, CPUX86State *env, size_t fxsave_offset)
352 {
353 unsigned long esp;
354
355 /* Default to using normal stack */
356 esp = get_sp_from_cpustate(env);
357 #ifdef TARGET_X86_64
358 esp -= 128; /* this is the redzone */
359 #endif
360
361 /* This is the X/Open sanctioned signal stack switching. */
362 if (ka->sa_flags & TARGET_SA_ONSTACK) {
363 esp = target_sigsp(esp, ka);
364 } else {
365 #ifndef TARGET_X86_64
366 /* This is the legacy signal stack switching. */
367 if ((env->segs[R_SS].selector & 0xffff) != __USER_DS &&
368 !(ka->sa_flags & TARGET_SA_RESTORER) &&
369 ka->sa_restorer) {
370 esp = (unsigned long) ka->sa_restorer;
371 }
372 #endif
373 }
374
375 if (!(env->features[FEAT_1_EDX] & CPUID_FXSR)) {
376 return (esp - (fxsave_offset + TARGET_FXSAVE_SIZE)) & -8ul;
377 } else if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
378 return ((esp - TARGET_FXSAVE_SIZE) & -16ul) - fxsave_offset;
379 } else {
380 size_t xstate_size =
381 xsave_area_size(env->xcr0, false) + TARGET_FP_XSTATE_MAGIC2_SIZE;
382 return ((esp - xstate_size) & -64ul) - fxsave_offset;
383 }
384 }
385
386 #ifndef TARGET_X86_64
387 static void install_sigtramp(void *tramp)
388 {
389 /* This is popl %eax ; movl $syscall,%eax ; int $0x80 */
390 __put_user(0xb858, (uint16_t *)(tramp + 0));
391 __put_user(TARGET_NR_sigreturn, (int32_t *)(tramp + 2));
392 __put_user(0x80cd, (uint16_t *)(tramp + 6));
393 }
394
395 static void install_rt_sigtramp(void *tramp)
396 {
397 /* This is movl $syscall,%eax ; int $0x80 */
398 __put_user(0xb8, (uint8_t *)(tramp + 0));
399 __put_user(TARGET_NR_rt_sigreturn, (int32_t *)(tramp + 1));
400 __put_user(0x80cd, (uint16_t *)(tramp + 5));
401 }
402
403 /* compare linux/arch/i386/kernel/signal.c:setup_frame() */
404 void setup_frame(int sig, struct target_sigaction *ka,
405 target_sigset_t *set, CPUX86State *env)
406 {
407 abi_ulong frame_addr;
408 struct sigframe *frame;
409 int i;
410
411 frame_addr = get_sigframe(ka, env, TARGET_SIGFRAME_FXSAVE_OFFSET);
412 trace_user_setup_frame(env, frame_addr);
413
414 if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0))
415 goto give_sigsegv;
416
417 __put_user(sig, &frame->sig);
418
419 setup_sigcontext(&frame->sc, &frame->fpstate, env, set->sig[0],
420 frame_addr + offsetof(struct sigframe, fpstate));
421
422 for(i = 1; i < TARGET_NSIG_WORDS; i++) {
423 __put_user(set->sig[i], &frame->extramask[i - 1]);
424 }
425
426 /* Set up to return from userspace. If provided, use a stub
427 already in userspace. */
428 if (ka->sa_flags & TARGET_SA_RESTORER) {
429 __put_user(ka->sa_restorer, &frame->pretcode);
430 } else {
431 /* This is no longer used, but is retained for ABI compatibility. */
432 install_sigtramp(frame->retcode);
433 __put_user(default_sigreturn, &frame->pretcode);
434 }
435
436 /* Set up registers for signal handler */
437 env->regs[R_ESP] = frame_addr;
438 env->eip = ka->_sa_handler;
439
440 cpu_x86_load_seg(env, R_DS, __USER_DS);
441 cpu_x86_load_seg(env, R_ES, __USER_DS);
442 cpu_x86_load_seg(env, R_SS, __USER_DS);
443 cpu_x86_load_seg(env, R_CS, __USER_CS);
444 env->eflags &= ~TF_MASK;
445
446 unlock_user_struct(frame, frame_addr, 1);
447
448 return;
449
450 give_sigsegv:
451 force_sigsegv(sig);
452 }
453 #endif
454
455 /* compare linux/arch/x86/kernel/signal.c:setup_rt_frame() */
456 void setup_rt_frame(int sig, struct target_sigaction *ka,
457 target_siginfo_t *info,
458 target_sigset_t *set, CPUX86State *env)
459 {
460 abi_ulong frame_addr;
461 #ifndef TARGET_X86_64
462 abi_ulong addr;
463 #endif
464 struct rt_sigframe *frame;
465 int i;
466
467 frame_addr = get_sigframe(ka, env, TARGET_RT_SIGFRAME_FXSAVE_OFFSET);
468 trace_user_setup_rt_frame(env, frame_addr);
469
470 if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0))
471 goto give_sigsegv;
472
473 /* These fields are only in rt_sigframe on 32 bit */
474 #ifndef TARGET_X86_64
475 __put_user(sig, &frame->sig);
476 addr = frame_addr + offsetof(struct rt_sigframe, info);
477 __put_user(addr, &frame->pinfo);
478 addr = frame_addr + offsetof(struct rt_sigframe, uc);
479 __put_user(addr, &frame->puc);
480 #endif
481 if (ka->sa_flags & TARGET_SA_SIGINFO) {
482 tswap_siginfo(&frame->info, info);
483 }
484
485 /* Create the ucontext. */
486 if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
487 __put_user(1, &frame->uc.tuc_flags);
488 } else {
489 __put_user(0, &frame->uc.tuc_flags);
490 }
491 __put_user(0, &frame->uc.tuc_link);
492 target_save_altstack(&frame->uc.tuc_stack, env);
493 setup_sigcontext(&frame->uc.tuc_mcontext, &frame->fpstate, env,
494 set->sig[0], frame_addr + offsetof(struct rt_sigframe, fpstate));
495
496 for(i = 0; i < TARGET_NSIG_WORDS; i++) {
497 __put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]);
498 }
499
500 /* Set up to return from userspace. If provided, use a stub
501 already in userspace. */
502 if (ka->sa_flags & TARGET_SA_RESTORER) {
503 __put_user(ka->sa_restorer, &frame->pretcode);
504 } else {
505 #ifdef TARGET_X86_64
506 /* For x86_64, SA_RESTORER is required ABI. */
507 goto give_sigsegv;
508 #else
509 /* This is no longer used, but is retained for ABI compatibility. */
510 install_rt_sigtramp(frame->retcode);
511 __put_user(default_rt_sigreturn, &frame->pretcode);
512 #endif
513 }
514
515 /* Set up registers for signal handler */
516 env->regs[R_ESP] = frame_addr;
517 env->eip = ka->_sa_handler;
518
519 #ifndef TARGET_X86_64
520 env->regs[R_EAX] = sig;
521 env->regs[R_EDX] = frame_addr + offsetof(struct rt_sigframe, info);
522 env->regs[R_ECX] = frame_addr + offsetof(struct rt_sigframe, uc);
523 #else
524 env->regs[R_EAX] = 0;
525 env->regs[R_EDI] = sig;
526 env->regs[R_ESI] = frame_addr + offsetof(struct rt_sigframe, info);
527 env->regs[R_EDX] = frame_addr + offsetof(struct rt_sigframe, uc);
528 #endif
529
530 cpu_x86_load_seg(env, R_DS, __USER_DS);
531 cpu_x86_load_seg(env, R_ES, __USER_DS);
532 cpu_x86_load_seg(env, R_CS, __USER_CS);
533 cpu_x86_load_seg(env, R_SS, __USER_DS);
534 env->eflags &= ~TF_MASK;
535
536 unlock_user_struct(frame, frame_addr, 1);
537
538 return;
539
540 give_sigsegv:
541 force_sigsegv(sig);
542 }
543
544 static int xrstor_sigcontext(CPUX86State *env, struct target_fpstate_fxsave *fxsave,
545 abi_ulong fxsave_addr)
546 {
547 if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
548 uint32_t extended_size = tswapl(fxsave->sw_reserved.extended_size);
549 uint32_t xstate_size = tswapl(fxsave->sw_reserved.xstate_size);
550 uint32_t xfeatures_size = xstate_size - TARGET_FXSAVE_SIZE;
551
552 /* Linux checks MAGIC2 using xstate_size, not extended_size. */
553 if (tswapl(fxsave->sw_reserved.magic1) == TARGET_FP_XSTATE_MAGIC1 &&
554 extended_size >= TARGET_FPSTATE_FXSAVE_OFFSET + xstate_size + TARGET_FP_XSTATE_MAGIC2_SIZE) {
555 if (!access_ok(env_cpu(env), VERIFY_READ, fxsave_addr,
556 extended_size - TARGET_FPSTATE_FXSAVE_OFFSET)) {
557 return 1;
558 }
559 if (tswapl(*(uint32_t *) &fxsave->xfeatures[xfeatures_size]) == TARGET_FP_XSTATE_MAGIC2) {
560 cpu_x86_xrstor(env, fxsave_addr);
561 return 0;
562 }
563 }
564 /* fall through to fxrstor */
565 }
566
567 cpu_x86_fxrstor(env, fxsave_addr);
568 return 0;
569 }
570
571 static int
572 restore_sigcontext(CPUX86State *env, struct target_sigcontext *sc)
573 {
574 int err = 1;
575 abi_ulong fpstate_addr;
576 unsigned int tmpflags;
577
578 #ifndef TARGET_X86_64
579 cpu_x86_load_seg(env, R_GS, tswap16(sc->gs));
580 cpu_x86_load_seg(env, R_FS, tswap16(sc->fs));
581 cpu_x86_load_seg(env, R_ES, tswap16(sc->es));
582 cpu_x86_load_seg(env, R_DS, tswap16(sc->ds));
583
584 env->regs[R_EDI] = tswapl(sc->edi);
585 env->regs[R_ESI] = tswapl(sc->esi);
586 env->regs[R_EBP] = tswapl(sc->ebp);
587 env->regs[R_ESP] = tswapl(sc->esp);
588 env->regs[R_EBX] = tswapl(sc->ebx);
589 env->regs[R_EDX] = tswapl(sc->edx);
590 env->regs[R_ECX] = tswapl(sc->ecx);
591 env->regs[R_EAX] = tswapl(sc->eax);
592
593 env->eip = tswapl(sc->eip);
594 #else
595 env->regs[8] = tswapl(sc->r8);
596 env->regs[9] = tswapl(sc->r9);
597 env->regs[10] = tswapl(sc->r10);
598 env->regs[11] = tswapl(sc->r11);
599 env->regs[12] = tswapl(sc->r12);
600 env->regs[13] = tswapl(sc->r13);
601 env->regs[14] = tswapl(sc->r14);
602 env->regs[15] = tswapl(sc->r15);
603
604 env->regs[R_EDI] = tswapl(sc->rdi);
605 env->regs[R_ESI] = tswapl(sc->rsi);
606 env->regs[R_EBP] = tswapl(sc->rbp);
607 env->regs[R_EBX] = tswapl(sc->rbx);
608 env->regs[R_EDX] = tswapl(sc->rdx);
609 env->regs[R_EAX] = tswapl(sc->rax);
610 env->regs[R_ECX] = tswapl(sc->rcx);
611 env->regs[R_ESP] = tswapl(sc->rsp);
612
613 env->eip = tswapl(sc->rip);
614 #endif
615
616 cpu_x86_load_seg(env, R_CS, lduw_p(&sc->cs) | 3);
617 cpu_x86_load_seg(env, R_SS, lduw_p(&sc->ss) | 3);
618
619 tmpflags = tswapl(sc->eflags);
620 env->eflags = (env->eflags & ~0x40DD5) | (tmpflags & 0x40DD5);
621 // regs->orig_eax = -1; /* disable syscall checks */
622
623 fpstate_addr = tswapl(sc->fpstate);
624 if (fpstate_addr != 0) {
625 struct target_fpstate *fpstate;
626 if (!lock_user_struct(VERIFY_READ, fpstate, fpstate_addr,
627 sizeof(struct target_fpstate))) {
628 return err;
629 }
630 #ifndef TARGET_X86_64
631 if (!(env->features[FEAT_1_EDX] & CPUID_FXSR)) {
632 cpu_x86_frstor(env, fpstate_addr, 1);
633 err = 0;
634 } else {
635 err = xrstor_sigcontext(env, &fpstate->fxsave,
636 fpstate_addr + TARGET_FPSTATE_FXSAVE_OFFSET);
637 }
638 #else
639 err = xrstor_sigcontext(env, fpstate, fpstate_addr);
640 #endif
641 unlock_user_struct(fpstate, fpstate_addr, 0);
642 } else {
643 err = 0;
644 }
645
646 return err;
647 }
648
649 /* Note: there is no sigreturn on x86_64, there is only rt_sigreturn */
650 #ifndef TARGET_X86_64
651 long do_sigreturn(CPUX86State *env)
652 {
653 struct sigframe *frame;
654 abi_ulong frame_addr = env->regs[R_ESP] - 8;
655 target_sigset_t target_set;
656 sigset_t set;
657 int i;
658
659 trace_user_do_sigreturn(env, frame_addr);
660 if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1))
661 goto badframe;
662 /* set blocked signals */
663 __get_user(target_set.sig[0], &frame->sc.oldmask);
664 for(i = 1; i < TARGET_NSIG_WORDS; i++) {
665 __get_user(target_set.sig[i], &frame->extramask[i - 1]);
666 }
667
668 target_to_host_sigset_internal(&set, &target_set);
669 set_sigmask(&set);
670
671 /* restore registers */
672 if (restore_sigcontext(env, &frame->sc))
673 goto badframe;
674 unlock_user_struct(frame, frame_addr, 0);
675 return -QEMU_ESIGRETURN;
676
677 badframe:
678 unlock_user_struct(frame, frame_addr, 0);
679 force_sig(TARGET_SIGSEGV);
680 return -QEMU_ESIGRETURN;
681 }
682 #endif
683
684 long do_rt_sigreturn(CPUX86State *env)
685 {
686 abi_ulong frame_addr;
687 struct rt_sigframe *frame;
688 sigset_t set;
689
690 frame_addr = env->regs[R_ESP] - sizeof(abi_ulong);
691 trace_user_do_rt_sigreturn(env, frame_addr);
692 if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1))
693 goto badframe;
694 target_to_host_sigset(&set, &frame->uc.tuc_sigmask);
695 set_sigmask(&set);
696
697 if (restore_sigcontext(env, &frame->uc.tuc_mcontext)) {
698 goto badframe;
699 }
700
701 target_restore_altstack(&frame->uc.tuc_stack, env);
702
703 unlock_user_struct(frame, frame_addr, 0);
704 return -QEMU_ESIGRETURN;
705
706 badframe:
707 unlock_user_struct(frame, frame_addr, 0);
708 force_sig(TARGET_SIGSEGV);
709 return -QEMU_ESIGRETURN;
710 }
711
712 #ifndef TARGET_X86_64
713 void setup_sigtramp(abi_ulong sigtramp_page)
714 {
715 uint16_t *tramp = lock_user(VERIFY_WRITE, sigtramp_page, 2 * 8, 0);
716 assert(tramp != NULL);
717
718 default_sigreturn = sigtramp_page;
719 install_sigtramp(tramp);
720
721 default_rt_sigreturn = sigtramp_page + 8;
722 install_rt_sigtramp(tramp + 8);
723
724 unlock_user(tramp, sigtramp_page, 2 * 8);
725 }
726 #endif
AR7 emulation for QEMU