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Update code for API changes
[qemu/ar7.git] / memory.c
blob388b8401a7c53c20b4641bae497ba197d23aee9a
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/qdev-properties.h"
34 #include "migration/vmstate.h"
35
36 //#define DEBUG_UNASSIGNED
37
38 static unsigned memory_region_transaction_depth;
39 static bool memory_region_update_pending;
40 static bool ioeventfd_update_pending;
41 static bool global_dirty_log = false;
42
43 static QTAILQ_HEAD(, MemoryListener) memory_listeners
44 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
45
46 static QTAILQ_HEAD(, AddressSpace) address_spaces
47 = QTAILQ_HEAD_INITIALIZER(address_spaces);
48
49 static GHashTable *flat_views;
50
51 typedef struct AddrRange AddrRange;
52
53 /*
54 * Note that signed integers are needed for negative offsetting in aliases
55 * (large MemoryRegion::alias_offset).
56 */
57 struct AddrRange {
58 Int128 start;
59 Int128 size;
60 };
61
62 static AddrRange addrrange_make(Int128 start, Int128 size)
63 {
64 return (AddrRange) { start, size };
65 }
66
67 static bool addrrange_equal(AddrRange r1, AddrRange r2)
68 {
69 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
70 }
71
72 static Int128 addrrange_end(AddrRange r)
73 {
74 return int128_add(r.start, r.size);
75 }
76
77 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
78 {
79 int128_addto(&range.start, delta);
80 return range;
81 }
82
83 static bool addrrange_contains(AddrRange range, Int128 addr)
84 {
85 return int128_ge(addr, range.start)
86 && int128_lt(addr, addrrange_end(range));
87 }
88
89 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
90 {
91 return addrrange_contains(r1, r2.start)
92 || addrrange_contains(r2, r1.start);
93 }
94
95 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
96 {
97 Int128 start = int128_max(r1.start, r2.start);
98 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
99 return addrrange_make(start, int128_sub(end, start));
100 }
101
102 enum ListenerDirection { Forward, Reverse };
103
104 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
105 do { \
106 MemoryListener *_listener; \
107 \
108 switch (_direction) { \
109 case Forward: \
110 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
114 } \
115 break; \
116 case Reverse: \
117 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
118 if (_listener->_callback) { \
119 _listener->_callback(_listener, ##_args); \
120 } \
121 } \
122 break; \
123 default: \
124 abort(); \
125 } \
126 } while (0)
127
128 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
129 do { \
130 MemoryListener *_listener; \
131 \
132 switch (_direction) { \
133 case Forward: \
134 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
135 if (_listener->_callback) { \
136 _listener->_callback(_listener, _section, ##_args); \
137 } \
138 } \
139 break; \
140 case Reverse: \
141 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
142 if (_listener->_callback) { \
143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 default: \
148 abort(); \
149 } \
150 } while (0)
151
152 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
153 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
154 do { \
155 MemoryRegionSection mrs = section_from_flat_range(fr, \
156 address_space_to_flatview(as)); \
157 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
158 } while(0)
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
173 MemoryRegionIoeventfd *b)
174 {
175 if (int128_lt(a->addr.start, b->addr.start)) {
176 return true;
177 } else if (int128_gt(a->addr.start, b->addr.start)) {
178 return false;
179 } else if (int128_lt(a->addr.size, b->addr.size)) {
180 return true;
181 } else if (int128_gt(a->addr.size, b->addr.size)) {
182 return false;
183 } else if (a->match_data < b->match_data) {
184 return true;
185 } else if (a->match_data > b->match_data) {
186 return false;
187 } else if (a->match_data) {
188 if (a->data < b->data) {
189 return true;
190 } else if (a->data > b->data) {
191 return false;
192 }
193 }
194 if (a->e < b->e) {
195 return true;
196 } else if (a->e > b->e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
203 MemoryRegionIoeventfd *b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 /* Range of memory in the global map. Addresses are absolute. */
210 struct FlatRange {
211 MemoryRegion *mr;
212 hwaddr offset_in_region;
213 AddrRange addr;
214 uint8_t dirty_log_mask;
215 bool romd_mode;
216 bool readonly;
217 bool nonvolatile;
218 int has_coalesced_range;
219 };
220
221 #define FOR_EACH_FLAT_RANGE(var, view) \
222 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
223
224 static inline MemoryRegionSection
225 section_from_flat_range(FlatRange *fr, FlatView *fv)
226 {
227 return (MemoryRegionSection) {
228 .mr = fr->mr,
229 .fv = fv,
230 .offset_within_region = fr->offset_in_region,
231 .size = fr->addr.size,
232 .offset_within_address_space = int128_get64(fr->addr.start),
233 .readonly = fr->readonly,
234 .nonvolatile = fr->nonvolatile,
235 };
236 }
237
238 static bool flatrange_equal(FlatRange *a, FlatRange *b)
239 {
240 return a->mr == b->mr
241 && addrrange_equal(a->addr, b->addr)
242 && a->offset_in_region == b->offset_in_region
243 && a->romd_mode == b->romd_mode
244 && a->readonly == b->readonly
245 && a->nonvolatile == b->nonvolatile;
246 }
247
248 static FlatView *flatview_new(MemoryRegion *mr_root)
249 {
250 FlatView *view;
251
252 view = g_new0(FlatView, 1);
253 view->ref = 1;
254 view->root = mr_root;
255 memory_region_ref(mr_root);
256 trace_flatview_new(view, mr_root);
257
258 return view;
259 }
260
261 /* Insert a range into a given position. Caller is responsible for maintaining
262 * sorting order.
263 */
264 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
265 {
266 if (view->nr == view->nr_allocated) {
267 view->nr_allocated = MAX(2 * view->nr, 10);
268 view->ranges = g_realloc(view->ranges,
269 view->nr_allocated * sizeof(*view->ranges));
270 }
271 memmove(view->ranges + pos + 1, view->ranges + pos,
272 (view->nr - pos) * sizeof(FlatRange));
273 view->ranges[pos] = *range;
274 memory_region_ref(range->mr);
275 ++view->nr;
276 }
277
278 static void flatview_destroy(FlatView *view)
279 {
280 int i;
281
282 trace_flatview_destroy(view, view->root);
283 if (view->dispatch) {
284 address_space_dispatch_free(view->dispatch);
285 }
286 for (i = 0; i < view->nr; i++) {
287 memory_region_unref(view->ranges[i].mr);
288 }
289 g_free(view->ranges);
290 memory_region_unref(view->root);
291 g_free(view);
292 }
293
294 static bool flatview_ref(FlatView *view)
295 {
296 return atomic_fetch_inc_nonzero(&view->ref) > 0;
297 }
298
299 void flatview_unref(FlatView *view)
300 {
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 trace_flatview_destroy_rcu(view, view->root);
303 assert(view->root);
304 call_rcu(view, flatview_destroy, rcu);
305 }
306 }
307
308 static bool can_merge(FlatRange *r1, FlatRange *r2)
309 {
310 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
311 && r1->mr == r2->mr
312 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
313 r1->addr.size),
314 int128_make64(r2->offset_in_region))
315 && r1->dirty_log_mask == r2->dirty_log_mask
316 && r1->romd_mode == r2->romd_mode
317 && r1->readonly == r2->readonly
318 && r1->nonvolatile == r2->nonvolatile;
319 }
320
321 /* Attempt to simplify a view by merging adjacent ranges */
322 static void flatview_simplify(FlatView *view)
323 {
324 unsigned i, j;
325
326 i = 0;
327 while (i < view->nr) {
328 j = i + 1;
329 while (j < view->nr
330 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
331 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
332 ++j;
333 }
334 ++i;
335 memmove(&view->ranges[i], &view->ranges[j],
336 (view->nr - j) * sizeof(view->ranges[j]));
337 view->nr -= j - i;
338 }
339 }
340
341 static bool memory_region_big_endian(MemoryRegion *mr)
342 {
343 #ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
345 #else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347 #endif
348 }
349
350 static bool memory_region_wrong_endianness(MemoryRegion *mr)
351 {
352 #ifdef TARGET_WORDS_BIGENDIAN
353 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
354 #else
355 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
356 #endif
357 }
358
359 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
360 {
361 if (memory_region_wrong_endianness(mr)) {
362 switch (size) {
363 case 1:
364 break;
365 case 2:
366 *data = bswap16(*data);
367 break;
368 case 4:
369 *data = bswap32(*data);
370 break;
371 case 8:
372 *data = bswap64(*data);
373 break;
374 default:
375 abort();
376 }
377 }
378 }
379
380 static inline void memory_region_shift_read_access(uint64_t *value,
381 signed shift,
382 uint64_t mask,
383 uint64_t tmp)
384 {
385 if (shift >= 0) {
386 *value |= (tmp & mask) << shift;
387 } else {
388 *value |= (tmp & mask) >> -shift;
389 }
390 }
391
392 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
393 signed shift,
394 uint64_t mask)
395 {
396 uint64_t tmp;
397
398 if (shift >= 0) {
399 tmp = (*value >> shift) & mask;
400 } else {
401 tmp = (*value << -shift) & mask;
402 }
403
404 return tmp;
405 }
406
407 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
408 {
409 MemoryRegion *root;
410 hwaddr abs_addr = offset;
411
412 abs_addr += mr->addr;
413 for (root = mr; root->container; ) {
414 root = root->container;
415 abs_addr += root->addr;
416 }
417
418 return abs_addr;
419 }
420
421 static int get_cpu_index(void)
422 {
423 if (current_cpu) {
424 return current_cpu->cpu_index;
425 }
426 return -1;
427 }
428
429 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
430 hwaddr addr,
431 uint64_t *value,
432 unsigned size,
433 signed shift,
434 uint64_t mask,
435 MemTxAttrs attrs)
436 {
437 uint64_t tmp;
438
439 tmp = mr->ops->read(mr->opaque, addr, size);
440 if (mr->subpage) {
441 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
442 } else if (mr == &io_mem_notdirty) {
443 /* Accesses to code which has previously been translated into a TB show
444 * up in the MMIO path, as accesses to the io_mem_notdirty
445 * MemoryRegion. */
446 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
447 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
448 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
449 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
450 }
451 memory_region_shift_read_access(value, shift, mask, tmp);
452 return MEMTX_OK;
453 }
454
455 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
456 hwaddr addr,
457 uint64_t *value,
458 unsigned size,
459 signed shift,
460 uint64_t mask,
461 MemTxAttrs attrs)
462 {
463 uint64_t tmp = 0;
464 MemTxResult r;
465
466 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
467 if (mr->subpage) {
468 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
469 } else if (mr == &io_mem_notdirty) {
470 /* Accesses to code which has previously been translated into a TB show
471 * up in the MMIO path, as accesses to the io_mem_notdirty
472 * MemoryRegion. */
473 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
474 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
475 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
476 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
477 }
478 memory_region_shift_read_access(value, shift, mask, tmp);
479 return r;
480 }
481
482 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
483 hwaddr addr,
484 uint64_t *value,
485 unsigned size,
486 signed shift,
487 uint64_t mask,
488 MemTxAttrs attrs)
489 {
490 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
491
492 if (mr->subpage) {
493 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
494 } else if (mr == &io_mem_notdirty) {
495 /* Accesses to code which has previously been translated into a TB show
496 * up in the MMIO path, as accesses to the io_mem_notdirty
497 * MemoryRegion. */
498 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
499 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
500 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
501 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
502 }
503 mr->ops->write(mr->opaque, addr, tmp, size);
504 return MEMTX_OK;
505 }
506
507 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
508 hwaddr addr,
509 uint64_t *value,
510 unsigned size,
511 signed shift,
512 uint64_t mask,
513 MemTxAttrs attrs)
514 {
515 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
516
517 if (mr->subpage) {
518 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
519 } else if (mr == &io_mem_notdirty) {
520 /* Accesses to code which has previously been translated into a TB show
521 * up in the MMIO path, as accesses to the io_mem_notdirty
522 * MemoryRegion. */
523 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
524 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
525 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
526 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
527 }
528 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
529 }
530
531 static MemTxResult access_with_adjusted_size(hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned access_size_min,
535 unsigned access_size_max,
536 MemTxResult (*access_fn)
537 (MemoryRegion *mr,
538 hwaddr addr,
539 uint64_t *value,
540 unsigned size,
541 signed shift,
542 uint64_t mask,
543 MemTxAttrs attrs),
544 MemoryRegion *mr,
545 MemTxAttrs attrs)
546 {
547 uint64_t access_mask;
548 unsigned access_size;
549 unsigned i;
550 MemTxResult r = MEMTX_OK;
551
552 if (!access_size_min) {
553 access_size_min = 1;
554 }
555 if (!access_size_max) {
556 access_size_max = 4;
557 }
558
559 /* FIXME: support unaligned access? */
560 access_size = MAX(MIN(size, access_size_max), access_size_min);
561 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
562 if (memory_region_big_endian(mr)) {
563 for (i = 0; i < size; i += access_size) {
564 r |= access_fn(mr, addr + i, value, access_size,
565 (size - access_size - i) * 8, access_mask, attrs);
566 }
567 } else {
568 for (i = 0; i < size; i += access_size) {
569 r |= access_fn(mr, addr + i, value, access_size, i * 8,
570 access_mask, attrs);
571 }
572 }
573 return r;
574 }
575
576 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
577 {
578 AddressSpace *as;
579
580 while (mr->container) {
581 mr = mr->container;
582 }
583 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
584 if (mr == as->root) {
585 return as;
586 }
587 }
588 return NULL;
589 }
590
591 /* Render a memory region into the global view. Ranges in @view obscure
592 * ranges in @mr.
593 */
594 static void render_memory_region(FlatView *view,
595 MemoryRegion *mr,
596 Int128 base,
597 AddrRange clip,
598 bool readonly,
599 bool nonvolatile)
600 {
601 MemoryRegion *subregion;
602 unsigned i;
603 hwaddr offset_in_region;
604 Int128 remain;
605 Int128 now;
606 FlatRange fr;
607 AddrRange tmp;
608
609 if (!mr->enabled) {
610 return;
611 }
612
613 int128_addto(&base, int128_make64(mr->addr));
614 readonly |= mr->readonly;
615 nonvolatile |= mr->nonvolatile;
616
617 tmp = addrrange_make(base, mr->size);
618
619 if (!addrrange_intersects(tmp, clip)) {
620 return;
621 }
622
623 clip = addrrange_intersection(tmp, clip);
624
625 if (mr->alias) {
626 int128_subfrom(&base, int128_make64(mr->alias->addr));
627 int128_subfrom(&base, int128_make64(mr->alias_offset));
628 render_memory_region(view, mr->alias, base, clip,
629 readonly, nonvolatile);
630 return;
631 }
632
633 /* Render subregions in priority order. */
634 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
635 render_memory_region(view, subregion, base, clip,
636 readonly, nonvolatile);
637 }
638
639 if (!mr->terminates) {
640 return;
641 }
642
643 offset_in_region = int128_get64(int128_sub(clip.start, base));
644 base = clip.start;
645 remain = clip.size;
646
647 fr.mr = mr;
648 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
649 fr.romd_mode = mr->romd_mode;
650 fr.readonly = readonly;
651 fr.nonvolatile = nonvolatile;
652 fr.has_coalesced_range = 0;
653
654 /* Render the region itself into any gaps left by the current view. */
655 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
656 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
657 continue;
658 }
659 if (int128_lt(base, view->ranges[i].addr.start)) {
660 now = int128_min(remain,
661 int128_sub(view->ranges[i].addr.start, base));
662 fr.offset_in_region = offset_in_region;
663 fr.addr = addrrange_make(base, now);
664 flatview_insert(view, i, &fr);
665 ++i;
666 int128_addto(&base, now);
667 offset_in_region += int128_get64(now);
668 int128_subfrom(&remain, now);
669 }
670 now = int128_sub(int128_min(int128_add(base, remain),
671 addrrange_end(view->ranges[i].addr)),
672 base);
673 int128_addto(&base, now);
674 offset_in_region += int128_get64(now);
675 int128_subfrom(&remain, now);
676 }
677 if (int128_nz(remain)) {
678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, remain);
680 flatview_insert(view, i, &fr);
681 }
682 }
683
684 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
685 {
686 while (mr->enabled) {
687 if (mr->alias) {
688 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
689 /* The alias is included in its entirety. Use it as
690 * the "real" root, so that we can share more FlatViews.
691 */
692 mr = mr->alias;
693 continue;
694 }
695 } else if (!mr->terminates) {
696 unsigned int found = 0;
697 MemoryRegion *child, *next = NULL;
698 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
699 if (child->enabled) {
700 if (++found > 1) {
701 next = NULL;
702 break;
703 }
704 if (!child->addr && int128_ge(mr->size, child->size)) {
705 /* A child is included in its entirety. If it's the only
706 * enabled one, use it in the hope of finding an alias down the
707 * way. This will also let us share FlatViews.
708 */
709 next = child;
710 }
711 }
712 }
713 if (found == 0) {
714 return NULL;
715 }
716 if (next) {
717 mr = next;
718 continue;
719 }
720 }
721
722 return mr;
723 }
724
725 return NULL;
726 }
727
728 /* Render a memory topology into a list of disjoint absolute ranges. */
729 static FlatView *generate_memory_topology(MemoryRegion *mr)
730 {
731 int i;
732 FlatView *view;
733
734 view = flatview_new(mr);
735
736 if (mr) {
737 render_memory_region(view, mr, int128_zero(),
738 addrrange_make(int128_zero(), int128_2_64()),
739 false, false);
740 }
741 flatview_simplify(view);
742
743 view->dispatch = address_space_dispatch_new(view);
744 for (i = 0; i < view->nr; i++) {
745 MemoryRegionSection mrs =
746 section_from_flat_range(&view->ranges[i], view);
747 flatview_add_to_dispatch(view, &mrs);
748 }
749 address_space_dispatch_compact(view->dispatch);
750 g_hash_table_replace(flat_views, mr, view);
751
752 return view;
753 }
754
755 static void address_space_add_del_ioeventfds(AddressSpace *as,
756 MemoryRegionIoeventfd *fds_new,
757 unsigned fds_new_nb,
758 MemoryRegionIoeventfd *fds_old,
759 unsigned fds_old_nb)
760 {
761 unsigned iold, inew;
762 MemoryRegionIoeventfd *fd;
763 MemoryRegionSection section;
764
765 /* Generate a symmetric difference of the old and new fd sets, adding
766 * and deleting as necessary.
767 */
768
769 iold = inew = 0;
770 while (iold < fds_old_nb || inew < fds_new_nb) {
771 if (iold < fds_old_nb
772 && (inew == fds_new_nb
773 || memory_region_ioeventfd_before(&fds_old[iold],
774 &fds_new[inew]))) {
775 fd = &fds_old[iold];
776 section = (MemoryRegionSection) {
777 .fv = address_space_to_flatview(as),
778 .offset_within_address_space = int128_get64(fd->addr.start),
779 .size = fd->addr.size,
780 };
781 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
782 fd->match_data, fd->data, fd->e);
783 ++iold;
784 } else if (inew < fds_new_nb
785 && (iold == fds_old_nb
786 || memory_region_ioeventfd_before(&fds_new[inew],
787 &fds_old[iold]))) {
788 fd = &fds_new[inew];
789 section = (MemoryRegionSection) {
790 .fv = address_space_to_flatview(as),
791 .offset_within_address_space = int128_get64(fd->addr.start),
792 .size = fd->addr.size,
793 };
794 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
795 fd->match_data, fd->data, fd->e);
796 ++inew;
797 } else {
798 ++iold;
799 ++inew;
800 }
801 }
802 }
803
804 FlatView *address_space_get_flatview(AddressSpace *as)
805 {
806 FlatView *view;
807
808 rcu_read_lock();
809 do {
810 view = address_space_to_flatview(as);
811 /* If somebody has replaced as->current_map concurrently,
812 * flatview_ref returns false.
813 */
814 } while (!flatview_ref(view));
815 rcu_read_unlock();
816 return view;
817 }
818
819 static void address_space_update_ioeventfds(AddressSpace *as)
820 {
821 FlatView *view;
822 FlatRange *fr;
823 unsigned ioeventfd_nb = 0;
824 MemoryRegionIoeventfd *ioeventfds = NULL;
825 AddrRange tmp;
826 unsigned i;
827
828 view = address_space_get_flatview(as);
829 FOR_EACH_FLAT_RANGE(fr, view) {
830 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
831 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
832 int128_sub(fr->addr.start,
833 int128_make64(fr->offset_in_region)));
834 if (addrrange_intersects(fr->addr, tmp)) {
835 ++ioeventfd_nb;
836 ioeventfds = g_realloc(ioeventfds,
837 ioeventfd_nb * sizeof(*ioeventfds));
838 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
839 ioeventfds[ioeventfd_nb-1].addr = tmp;
840 }
841 }
842 }
843
844 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
845 as->ioeventfds, as->ioeventfd_nb);
846
847 g_free(as->ioeventfds);
848 as->ioeventfds = ioeventfds;
849 as->ioeventfd_nb = ioeventfd_nb;
850 flatview_unref(view);
851 }
852
853 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
854 {
855 if (!fr->has_coalesced_range) {
856 return;
857 }
858
859 if (--fr->has_coalesced_range > 0) {
860 return;
861 }
862
863 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
864 int128_get64(fr->addr.start),
865 int128_get64(fr->addr.size));
866 }
867
868 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
869 {
870 MemoryRegion *mr = fr->mr;
871 CoalescedMemoryRange *cmr;
872 AddrRange tmp;
873
874 if (QTAILQ_EMPTY(&mr->coalesced)) {
875 return;
876 }
877
878 if (fr->has_coalesced_range++) {
879 return;
880 }
881
882 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
883 tmp = addrrange_shift(cmr->addr,
884 int128_sub(fr->addr.start,
885 int128_make64(fr->offset_in_region)));
886 if (!addrrange_intersects(tmp, fr->addr)) {
887 continue;
888 }
889 tmp = addrrange_intersection(tmp, fr->addr);
890 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
891 int128_get64(tmp.start),
892 int128_get64(tmp.size));
893 }
894 }
895
896 static void address_space_update_topology_pass(AddressSpace *as,
897 const FlatView *old_view,
898 const FlatView *new_view,
899 bool adding)
900 {
901 unsigned iold, inew;
902 FlatRange *frold, *frnew;
903
904 /* Generate a symmetric difference of the old and new memory maps.
905 * Kill ranges in the old map, and instantiate ranges in the new map.
906 */
907 iold = inew = 0;
908 while (iold < old_view->nr || inew < new_view->nr) {
909 if (iold < old_view->nr) {
910 frold = &old_view->ranges[iold];
911 } else {
912 frold = NULL;
913 }
914 if (inew < new_view->nr) {
915 frnew = &new_view->ranges[inew];
916 } else {
917 frnew = NULL;
918 }
919
920 if (frold
921 && (!frnew
922 || int128_lt(frold->addr.start, frnew->addr.start)
923 || (int128_eq(frold->addr.start, frnew->addr.start)
924 && !flatrange_equal(frold, frnew)))) {
925 /* In old but not in new, or in both but attributes changed. */
926
927 if (!adding) {
928 flat_range_coalesced_io_del(frold, as);
929 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
930 }
931
932 ++iold;
933 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
934 /* In both and unchanged (except logging may have changed) */
935
936 if (!adding) {
937 flat_range_coalesced_io_del(frold, as);
938 } else {
939 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
940 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
941 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
942 frold->dirty_log_mask,
943 frnew->dirty_log_mask);
944 }
945 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
946 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
947 frold->dirty_log_mask,
948 frnew->dirty_log_mask);
949 }
950 flat_range_coalesced_io_add(frnew, as);
951 }
952
953 ++iold;
954 ++inew;
955 } else {
956 /* In new */
957
958 if (adding) {
959 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
960 flat_range_coalesced_io_add(frnew, as);
961 }
962
963 ++inew;
964 }
965 }
966 }
967
968 static void flatviews_init(void)
969 {
970 static FlatView *empty_view;
971
972 if (flat_views) {
973 return;
974 }
975
976 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
977 (GDestroyNotify) flatview_unref);
978 if (!empty_view) {
979 empty_view = generate_memory_topology(NULL);
980 /* We keep it alive forever in the global variable. */
981 flatview_ref(empty_view);
982 } else {
983 g_hash_table_replace(flat_views, NULL, empty_view);
984 flatview_ref(empty_view);
985 }
986 }
987
988 static void flatviews_reset(void)
989 {
990 AddressSpace *as;
991
992 if (flat_views) {
993 g_hash_table_unref(flat_views);
994 flat_views = NULL;
995 }
996 flatviews_init();
997
998 /* Render unique FVs */
999 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1000 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1001
1002 if (g_hash_table_lookup(flat_views, physmr)) {
1003 continue;
1004 }
1005
1006 generate_memory_topology(physmr);
1007 }
1008 }
1009
1010 static void address_space_set_flatview(AddressSpace *as)
1011 {
1012 FlatView *old_view = address_space_to_flatview(as);
1013 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1014 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1015
1016 assert(new_view);
1017
1018 if (old_view == new_view) {
1019 return;
1020 }
1021
1022 if (old_view) {
1023 flatview_ref(old_view);
1024 }
1025
1026 flatview_ref(new_view);
1027
1028 if (!QTAILQ_EMPTY(&as->listeners)) {
1029 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1030
1031 if (!old_view2) {
1032 old_view2 = &tmpview;
1033 }
1034 address_space_update_topology_pass(as, old_view2, new_view, false);
1035 address_space_update_topology_pass(as, old_view2, new_view, true);
1036 }
1037
1038 /* Writes are protected by the BQL. */
1039 atomic_rcu_set(&as->current_map, new_view);
1040 if (old_view) {
1041 flatview_unref(old_view);
1042 }
1043
1044 /* Note that all the old MemoryRegions are still alive up to this
1045 * point. This relieves most MemoryListeners from the need to
1046 * ref/unref the MemoryRegions they get---unless they use them
1047 * outside the iothread mutex, in which case precise reference
1048 * counting is necessary.
1049 */
1050 if (old_view) {
1051 flatview_unref(old_view);
1052 }
1053 }
1054
1055 static void address_space_update_topology(AddressSpace *as)
1056 {
1057 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1058
1059 flatviews_init();
1060 if (!g_hash_table_lookup(flat_views, physmr)) {
1061 generate_memory_topology(physmr);
1062 }
1063 address_space_set_flatview(as);
1064 }
1065
1066 void memory_region_transaction_begin(void)
1067 {
1068 qemu_flush_coalesced_mmio_buffer();
1069 ++memory_region_transaction_depth;
1070 }
1071
1072 void memory_region_transaction_commit(void)
1073 {
1074 AddressSpace *as;
1075
1076 assert(memory_region_transaction_depth);
1077 assert(qemu_mutex_iothread_locked());
1078
1079 --memory_region_transaction_depth;
1080 if (!memory_region_transaction_depth) {
1081 if (memory_region_update_pending) {
1082 flatviews_reset();
1083
1084 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1085
1086 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1087 address_space_set_flatview(as);
1088 address_space_update_ioeventfds(as);
1089 }
1090 memory_region_update_pending = false;
1091 ioeventfd_update_pending = false;
1092 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1093 } else if (ioeventfd_update_pending) {
1094 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1095 address_space_update_ioeventfds(as);
1096 }
1097 ioeventfd_update_pending = false;
1098 }
1099 }
1100 }
1101
1102 static void memory_region_destructor_none(MemoryRegion *mr)
1103 {
1104 }
1105
1106 static void memory_region_destructor_ram(MemoryRegion *mr)
1107 {
1108 qemu_ram_free(mr->ram_block);
1109 }
1110
1111 static bool memory_region_need_escape(char c)
1112 {
1113 return c == '/' || c == '[' || c == '\\' || c == ']';
1114 }
1115
1116 static char *memory_region_escape_name(const char *name)
1117 {
1118 const char *p;
1119 char *escaped, *q;
1120 uint8_t c;
1121 size_t bytes = 0;
1122
1123 for (p = name; *p; p++) {
1124 bytes += memory_region_need_escape(*p) ? 4 : 1;
1125 }
1126 if (bytes == p - name) {
1127 return g_memdup(name, bytes + 1);
1128 }
1129
1130 escaped = g_malloc(bytes + 1);
1131 for (p = name, q = escaped; *p; p++) {
1132 c = *p;
1133 if (unlikely(memory_region_need_escape(c))) {
1134 *q++ = '\\';
1135 *q++ = 'x';
1136 *q++ = "0123456789abcdef"[c >> 4];
1137 c = "0123456789abcdef"[c & 15];
1138 }
1139 *q++ = c;
1140 }
1141 *q = 0;
1142 return escaped;
1143 }
1144
1145 static void memory_region_do_init(MemoryRegion *mr,
1146 Object *owner,
1147 const char *name,
1148 uint64_t size)
1149 {
1150 mr->size = int128_make64(size);
1151 if (size == UINT64_MAX) {
1152 mr->size = int128_2_64();
1153 }
1154 mr->name = g_strdup(name);
1155 mr->owner = owner;
1156 mr->ram_block = NULL;
1157
1158 if (name) {
1159 char *escaped_name = memory_region_escape_name(name);
1160 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1161
1162 if (!owner) {
1163 owner = container_get(qdev_get_machine(), "/unattached");
1164 }
1165
1166 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1167 object_unref(OBJECT(mr));
1168 g_free(name_array);
1169 g_free(escaped_name);
1170 }
1171 }
1172
1173 void memory_region_init(MemoryRegion *mr,
1174 Object *owner,
1175 const char *name,
1176 uint64_t size)
1177 {
1178 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1179 memory_region_do_init(mr, owner, name, size);
1180 }
1181
1182 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1183 void *opaque, Error **errp)
1184 {
1185 MemoryRegion *mr = MEMORY_REGION(obj);
1186 uint64_t value = mr->addr;
1187
1188 visit_type_uint64(v, name, &value, errp);
1189 }
1190
1191 static void memory_region_get_container(Object *obj, Visitor *v,
1192 const char *name, void *opaque,
1193 Error **errp)
1194 {
1195 MemoryRegion *mr = MEMORY_REGION(obj);
1196 gchar *path = (gchar *)"";
1197
1198 if (mr->container) {
1199 path = object_get_canonical_path(OBJECT(mr->container));
1200 }
1201 visit_type_str(v, name, &path, errp);
1202 if (mr->container) {
1203 g_free(path);
1204 }
1205 }
1206
1207 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1208 const char *part)
1209 {
1210 MemoryRegion *mr = MEMORY_REGION(obj);
1211
1212 return OBJECT(mr->container);
1213 }
1214
1215 static void memory_region_get_priority(Object *obj, Visitor *v,
1216 const char *name, void *opaque,
1217 Error **errp)
1218 {
1219 MemoryRegion *mr = MEMORY_REGION(obj);
1220 int32_t value = mr->priority;
1221
1222 visit_type_int32(v, name, &value, errp);
1223 }
1224
1225 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1226 void *opaque, Error **errp)
1227 {
1228 MemoryRegion *mr = MEMORY_REGION(obj);
1229 uint64_t value = memory_region_size(mr);
1230
1231 visit_type_uint64(v, name, &value, errp);
1232 }
1233
1234 static void memory_region_initfn(Object *obj)
1235 {
1236 MemoryRegion *mr = MEMORY_REGION(obj);
1237 ObjectProperty *op;
1238
1239 mr->ops = &unassigned_mem_ops;
1240 mr->enabled = true;
1241 mr->romd_mode = true;
1242 mr->global_locking = true;
1243 mr->destructor = memory_region_destructor_none;
1244 QTAILQ_INIT(&mr->subregions);
1245 QTAILQ_INIT(&mr->coalesced);
1246
1247 op = object_property_add(OBJECT(mr), "container",
1248 "link<" TYPE_MEMORY_REGION ">",
1249 memory_region_get_container,
1250 NULL, /* memory_region_set_container */
1251 NULL, NULL, &error_abort);
1252 op->resolve = memory_region_resolve_container;
1253
1254 object_property_add(OBJECT(mr), "addr", "uint64",
1255 memory_region_get_addr,
1256 NULL, /* memory_region_set_addr */
1257 NULL, NULL, &error_abort);
1258 object_property_add(OBJECT(mr), "priority", "uint32",
1259 memory_region_get_priority,
1260 NULL, /* memory_region_set_priority */
1261 NULL, NULL, &error_abort);
1262 object_property_add(OBJECT(mr), "size", "uint64",
1263 memory_region_get_size,
1264 NULL, /* memory_region_set_size, */
1265 NULL, NULL, &error_abort);
1266 }
1267
1268 static int qemu_target_backtrace(target_ulong *array, size_t size)
1269 {
1270 int n = 0;
1271 if (size >= 2) {
1272 #if defined(TARGET_ARM)
1273 CPUArchState *env = current_cpu->env_ptr;
1274 array[0] = env->regs[15];
1275 array[1] = env->regs[14];
1276 #elif defined(TARGET_MIPS)
1277 CPUArchState *env = current_cpu->env_ptr;
1278 array[0] = env->active_tc.PC;
1279 array[1] = env->active_tc.gpr[31];
1280 #else
1281 array[0] = 0;
1282 array[1] = 0;
1283 #endif
1284 n = 2;
1285 }
1286 return n;
1287 }
1288
1289 #include "disas/disas.h"
1290 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1291 {
1292 char *p = buffer;
1293 if (current_cpu) {
1294 target_ulong caller[2];
1295 const char *symbol;
1296 qemu_target_backtrace(caller, 2);
1297 symbol = lookup_symbol(caller[0]);
1298 p += sprintf(p, "[%s]", symbol);
1299 symbol = lookup_symbol(caller[1]);
1300 p += sprintf(p, "[%s]", symbol);
1301 } else {
1302 p += sprintf(p, "[cpu not running]");
1303 }
1304 assert((p - buffer) < length);
1305 return buffer;
1306 }
1307
1308 static void iommu_memory_region_initfn(Object *obj)
1309 {
1310 MemoryRegion *mr = MEMORY_REGION(obj);
1311
1312 mr->is_iommu = true;
1313 }
1314
1315 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1316 unsigned size)
1317 {
1318 if (trace_unassigned) {
1319 char buffer[256];
1320 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1321 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1322 }
1323 //~ vm_stop(0);
1324 if (current_cpu != NULL) {
1325 bool is_exec = current_cpu->mem_io_access_type == MMU_INST_FETCH;
1326 cpu_unassigned_access(current_cpu, addr, false, is_exec, 0, size);
1327 }
1328 return 0;
1329 }
1330
1331 static void unassigned_mem_write(void *opaque, hwaddr addr,
1332 uint64_t val, unsigned size)
1333 {
1334 if (trace_unassigned) {
1335 char buffer[256];
1336 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1337 " = 0x%" PRIx64 " %s\n",
1338 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1339 }
1340 if (current_cpu != NULL) {
1341 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1342 }
1343 }
1344
1345 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1346 unsigned size, bool is_write,
1347 MemTxAttrs attrs)
1348 {
1349 return false;
1350 }
1351
1352 const MemoryRegionOps unassigned_mem_ops = {
1353 .valid.accepts = unassigned_mem_accepts,
1354 .endianness = DEVICE_NATIVE_ENDIAN,
1355 };
1356
1357 static uint64_t memory_region_ram_device_read(void *opaque,
1358 hwaddr addr, unsigned size)
1359 {
1360 MemoryRegion *mr = opaque;
1361 uint64_t data = (uint64_t)~0;
1362
1363 switch (size) {
1364 case 1:
1365 data = *(uint8_t *)(mr->ram_block->host + addr);
1366 break;
1367 case 2:
1368 data = *(uint16_t *)(mr->ram_block->host + addr);
1369 break;
1370 case 4:
1371 data = *(uint32_t *)(mr->ram_block->host + addr);
1372 break;
1373 case 8:
1374 data = *(uint64_t *)(mr->ram_block->host + addr);
1375 break;
1376 }
1377
1378 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1379
1380 return data;
1381 }
1382
1383 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1384 uint64_t data, unsigned size)
1385 {
1386 MemoryRegion *mr = opaque;
1387
1388 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1389
1390 switch (size) {
1391 case 1:
1392 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1393 break;
1394 case 2:
1395 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1396 break;
1397 case 4:
1398 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1399 break;
1400 case 8:
1401 *(uint64_t *)(mr->ram_block->host + addr) = data;
1402 break;
1403 }
1404 }
1405
1406 static const MemoryRegionOps ram_device_mem_ops = {
1407 .read = memory_region_ram_device_read,
1408 .write = memory_region_ram_device_write,
1409 .endianness = DEVICE_HOST_ENDIAN,
1410 .valid = {
1411 .min_access_size = 1,
1412 .max_access_size = 8,
1413 .unaligned = true,
1414 },
1415 .impl = {
1416 .min_access_size = 1,
1417 .max_access_size = 8,
1418 .unaligned = true,
1419 },
1420 };
1421
1422 bool memory_region_access_valid(MemoryRegion *mr,
1423 hwaddr addr,
1424 unsigned size,
1425 bool is_write,
1426 MemTxAttrs attrs)
1427 {
1428 int access_size_min, access_size_max;
1429 int access_size, i;
1430
1431 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1432 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1433 " with size %u for memory region %s\n",
1434 addr, size, mr->name);
1435 return false;
1436 }
1437
1438 if (!mr->ops->valid.accepts) {
1439 return true;
1440 }
1441
1442 access_size_min = mr->ops->valid.min_access_size;
1443 if (!mr->ops->valid.min_access_size) {
1444 access_size_min = 1;
1445 }
1446
1447 access_size_max = mr->ops->valid.max_access_size;
1448 if (!mr->ops->valid.max_access_size) {
1449 access_size_max = 4;
1450 }
1451
1452 access_size = MAX(MIN(size, access_size_max), access_size_min);
1453 for (i = 0; i < size; i += access_size) {
1454 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1455 is_write, attrs)) {
1456 return false;
1457 }
1458 }
1459
1460 return true;
1461 }
1462
1463 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1464 hwaddr addr,
1465 uint64_t *pval,
1466 unsigned size,
1467 MemTxAttrs attrs)
1468 {
1469 *pval = 0;
1470
1471 if (mr->ops->read) {
1472 return access_with_adjusted_size(addr, pval, size,
1473 mr->ops->impl.min_access_size,
1474 mr->ops->impl.max_access_size,
1475 memory_region_read_accessor,
1476 mr, attrs);
1477 } else {
1478 return access_with_adjusted_size(addr, pval, size,
1479 mr->ops->impl.min_access_size,
1480 mr->ops->impl.max_access_size,
1481 memory_region_read_with_attrs_accessor,
1482 mr, attrs);
1483 }
1484 }
1485
1486 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1487 hwaddr addr,
1488 uint64_t *pval,
1489 unsigned size,
1490 MemTxAttrs attrs)
1491 {
1492 MemTxResult r;
1493
1494 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1495 *pval = unassigned_mem_read(mr, addr, size);
1496 return MEMTX_DECODE_ERROR;
1497 }
1498
1499 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1500 adjust_endianness(mr, pval, size);
1501 return r;
1502 }
1503
1504 /* Return true if an eventfd was signalled */
1505 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1506 hwaddr addr,
1507 uint64_t data,
1508 unsigned size,
1509 MemTxAttrs attrs)
1510 {
1511 MemoryRegionIoeventfd ioeventfd = {
1512 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1513 .data = data,
1514 };
1515 unsigned i;
1516
1517 for (i = 0; i < mr->ioeventfd_nb; i++) {
1518 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1519 ioeventfd.e = mr->ioeventfds[i].e;
1520
1521 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1522 event_notifier_set(ioeventfd.e);
1523 return true;
1524 }
1525 }
1526
1527 return false;
1528 }
1529
1530 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1531 hwaddr addr,
1532 uint64_t data,
1533 unsigned size,
1534 MemTxAttrs attrs)
1535 {
1536 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1537 unassigned_mem_write(mr, addr, data, size);
1538 return MEMTX_DECODE_ERROR;
1539 }
1540
1541 adjust_endianness(mr, &data, size);
1542
1543 if ((!kvm_eventfds_enabled()) &&
1544 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1545 return MEMTX_OK;
1546 }
1547
1548 if (mr->ops->write) {
1549 return access_with_adjusted_size(addr, &data, size,
1550 mr->ops->impl.min_access_size,
1551 mr->ops->impl.max_access_size,
1552 memory_region_write_accessor, mr,
1553 attrs);
1554 } else {
1555 return
1556 access_with_adjusted_size(addr, &data, size,
1557 mr->ops->impl.min_access_size,
1558 mr->ops->impl.max_access_size,
1559 memory_region_write_with_attrs_accessor,
1560 mr, attrs);
1561 }
1562 }
1563
1564 void memory_region_init_io(MemoryRegion *mr,
1565 Object *owner,
1566 const MemoryRegionOps *ops,
1567 void *opaque,
1568 const char *name,
1569 uint64_t size)
1570 {
1571 memory_region_init(mr, owner, name, size);
1572 mr->ops = ops ? ops : &unassigned_mem_ops;
1573 mr->opaque = opaque;
1574 mr->terminates = true;
1575 }
1576
1577 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1578 Object *owner,
1579 const char *name,
1580 uint64_t size,
1581 Error **errp)
1582 {
1583 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1584 }
1585
1586 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 bool share,
1591 Error **errp)
1592 {
1593 Error *err = NULL;
1594 memory_region_init(mr, owner, name, size);
1595 mr->ram = true;
1596 mr->terminates = true;
1597 mr->destructor = memory_region_destructor_ram;
1598 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1599 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1600 if (err) {
1601 mr->size = int128_zero();
1602 object_unparent(OBJECT(mr));
1603 error_propagate(errp, err);
1604 }
1605 }
1606
1607 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1608 Object *owner,
1609 const char *name,
1610 uint64_t size,
1611 uint64_t max_size,
1612 void (*resized)(const char*,
1613 uint64_t length,
1614 void *host),
1615 Error **errp)
1616 {
1617 Error *err = NULL;
1618 memory_region_init(mr, owner, name, size);
1619 mr->ram = true;
1620 mr->terminates = true;
1621 mr->destructor = memory_region_destructor_ram;
1622 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1623 mr, &err);
1624 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1625 if (err) {
1626 mr->size = int128_zero();
1627 object_unparent(OBJECT(mr));
1628 error_propagate(errp, err);
1629 }
1630 }
1631
1632 #ifdef CONFIG_POSIX
1633 void memory_region_init_ram_from_file(MemoryRegion *mr,
1634 struct Object *owner,
1635 const char *name,
1636 uint64_t size,
1637 uint64_t align,
1638 uint32_t ram_flags,
1639 const char *path,
1640 Error **errp)
1641 {
1642 Error *err = NULL;
1643 memory_region_init(mr, owner, name, size);
1644 mr->ram = true;
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
1647 mr->align = align;
1648 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1649 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1650 if (err) {
1651 mr->size = int128_zero();
1652 object_unparent(OBJECT(mr));
1653 error_propagate(errp, err);
1654 }
1655 }
1656
1657 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1658 struct Object *owner,
1659 const char *name,
1660 uint64_t size,
1661 bool share,
1662 int fd,
1663 Error **errp)
1664 {
1665 Error *err = NULL;
1666 memory_region_init(mr, owner, name, size);
1667 mr->ram = true;
1668 mr->terminates = true;
1669 mr->destructor = memory_region_destructor_ram;
1670 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1671 share ? RAM_SHARED : 0,
1672 fd, &err);
1673 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1674 if (err) {
1675 mr->size = int128_zero();
1676 object_unparent(OBJECT(mr));
1677 error_propagate(errp, err);
1678 }
1679 }
1680 #endif
1681
1682 void memory_region_init_ram_ptr(MemoryRegion *mr,
1683 Object *owner,
1684 const char *name,
1685 uint64_t size,
1686 void *ptr)
1687 {
1688 memory_region_init(mr, owner, name, size);
1689 mr->ram = true;
1690 mr->terminates = true;
1691 mr->destructor = memory_region_destructor_ram;
1692 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1693
1694 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1695 assert(ptr != NULL);
1696 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1697 }
1698
1699 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1700 Object *owner,
1701 const char *name,
1702 uint64_t size,
1703 void *ptr)
1704 {
1705 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1706 mr->ram_device = true;
1707 mr->ops = &ram_device_mem_ops;
1708 mr->opaque = mr;
1709 }
1710
1711 void memory_region_init_alias(MemoryRegion *mr,
1712 Object *owner,
1713 const char *name,
1714 MemoryRegion *orig,
1715 hwaddr offset,
1716 uint64_t size)
1717 {
1718 memory_region_init(mr, owner, name, size);
1719 mr->alias = orig;
1720 mr->alias_offset = offset;
1721 }
1722
1723 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1724 struct Object *owner,
1725 const char *name,
1726 uint64_t size,
1727 Error **errp)
1728 {
1729 Error *err = NULL;
1730 memory_region_init(mr, owner, name, size);
1731 mr->ram = true;
1732 mr->readonly = true;
1733 mr->terminates = true;
1734 mr->destructor = memory_region_destructor_ram;
1735 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1736 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1737 if (err) {
1738 mr->size = int128_zero();
1739 object_unparent(OBJECT(mr));
1740 error_propagate(errp, err);
1741 }
1742 }
1743
1744 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1745 Object *owner,
1746 const MemoryRegionOps *ops,
1747 void *opaque,
1748 const char *name,
1749 uint64_t size,
1750 Error **errp)
1751 {
1752 Error *err = NULL;
1753 assert(ops);
1754 memory_region_init(mr, owner, name, size);
1755 mr->ops = ops;
1756 mr->opaque = opaque;
1757 mr->terminates = true;
1758 mr->rom_device = true;
1759 mr->destructor = memory_region_destructor_ram;
1760 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1761 if (err) {
1762 mr->size = int128_zero();
1763 object_unparent(OBJECT(mr));
1764 error_propagate(errp, err);
1765 }
1766 }
1767
1768 void memory_region_init_iommu(void *_iommu_mr,
1769 size_t instance_size,
1770 const char *mrtypename,
1771 Object *owner,
1772 const char *name,
1773 uint64_t size)
1774 {
1775 struct IOMMUMemoryRegion *iommu_mr;
1776 struct MemoryRegion *mr;
1777
1778 object_initialize(_iommu_mr, instance_size, mrtypename);
1779 mr = MEMORY_REGION(_iommu_mr);
1780 memory_region_do_init(mr, owner, name, size);
1781 iommu_mr = IOMMU_MEMORY_REGION(mr);
1782 mr->terminates = true; /* then re-forwards */
1783 QLIST_INIT(&iommu_mr->iommu_notify);
1784 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1785 }
1786
1787 static void memory_region_finalize(Object *obj)
1788 {
1789 MemoryRegion *mr = MEMORY_REGION(obj);
1790
1791 assert(!mr->container);
1792
1793 /* We know the region is not visible in any address space (it
1794 * does not have a container and cannot be a root either because
1795 * it has no references, so we can blindly clear mr->enabled.
1796 * memory_region_set_enabled instead could trigger a transaction
1797 * and cause an infinite loop.
1798 */
1799 mr->enabled = false;
1800 memory_region_transaction_begin();
1801 while (!QTAILQ_EMPTY(&mr->subregions)) {
1802 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1803 memory_region_del_subregion(mr, subregion);
1804 }
1805 memory_region_transaction_commit();
1806
1807 mr->destructor(mr);
1808 memory_region_clear_coalescing(mr);
1809 g_free((char *)mr->name);
1810 g_free(mr->ioeventfds);
1811 }
1812
1813 Object *memory_region_owner(MemoryRegion *mr)
1814 {
1815 Object *obj = OBJECT(mr);
1816 return obj->parent;
1817 }
1818
1819 void memory_region_ref(MemoryRegion *mr)
1820 {
1821 /* MMIO callbacks most likely will access data that belongs
1822 * to the owner, hence the need to ref/unref the owner whenever
1823 * the memory region is in use.
1824 *
1825 * The memory region is a child of its owner. As long as the
1826 * owner doesn't call unparent itself on the memory region,
1827 * ref-ing the owner will also keep the memory region alive.
1828 * Memory regions without an owner are supposed to never go away;
1829 * we do not ref/unref them because it slows down DMA sensibly.
1830 */
1831 if (mr && mr->owner) {
1832 object_ref(mr->owner);
1833 }
1834 }
1835
1836 void memory_region_unref(MemoryRegion *mr)
1837 {
1838 if (mr && mr->owner) {
1839 object_unref(mr->owner);
1840 }
1841 }
1842
1843 uint64_t memory_region_size(MemoryRegion *mr)
1844 {
1845 if (int128_eq(mr->size, int128_2_64())) {
1846 return UINT64_MAX;
1847 }
1848 return int128_get64(mr->size);
1849 }
1850
1851 const char *memory_region_name(const MemoryRegion *mr)
1852 {
1853 if (!mr->name) {
1854 ((MemoryRegion *)mr)->name =
1855 object_get_canonical_path_component(OBJECT(mr));
1856 }
1857 return mr->name;
1858 }
1859
1860 bool memory_region_is_ram_device(MemoryRegion *mr)
1861 {
1862 return mr->ram_device;
1863 }
1864
1865 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1866 {
1867 uint8_t mask = mr->dirty_log_mask;
1868 if (global_dirty_log && mr->ram_block) {
1869 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1870 }
1871 return mask;
1872 }
1873
1874 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1875 {
1876 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1877 }
1878
1879 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1880 {
1881 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1882 IOMMUNotifier *iommu_notifier;
1883 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1884
1885 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1886 flags |= iommu_notifier->notifier_flags;
1887 }
1888
1889 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1890 imrc->notify_flag_changed(iommu_mr,
1891 iommu_mr->iommu_notify_flags,
1892 flags);
1893 }
1894
1895 iommu_mr->iommu_notify_flags = flags;
1896 }
1897
1898 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1899 IOMMUNotifier *n)
1900 {
1901 IOMMUMemoryRegion *iommu_mr;
1902
1903 if (mr->alias) {
1904 memory_region_register_iommu_notifier(mr->alias, n);
1905 return;
1906 }
1907
1908 /* We need to register for at least one bitfield */
1909 iommu_mr = IOMMU_MEMORY_REGION(mr);
1910 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1911 assert(n->start <= n->end);
1912 assert(n->iommu_idx >= 0 &&
1913 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1914
1915 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1916 memory_region_update_iommu_notify_flags(iommu_mr);
1917 }
1918
1919 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1920 {
1921 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1922
1923 if (imrc->get_min_page_size) {
1924 return imrc->get_min_page_size(iommu_mr);
1925 }
1926 return TARGET_PAGE_SIZE;
1927 }
1928
1929 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1930 {
1931 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1932 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1933 hwaddr addr, granularity;
1934 IOMMUTLBEntry iotlb;
1935
1936 /* If the IOMMU has its own replay callback, override */
1937 if (imrc->replay) {
1938 imrc->replay(iommu_mr, n);
1939 return;
1940 }
1941
1942 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1943
1944 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1945 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1946 if (iotlb.perm != IOMMU_NONE) {
1947 n->notify(n, &iotlb);
1948 }
1949
1950 /* if (2^64 - MR size) < granularity, it's possible to get an
1951 * infinite loop here. This should catch such a wraparound */
1952 if ((addr + granularity) < addr) {
1953 break;
1954 }
1955 }
1956 }
1957
1958 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1959 {
1960 IOMMUNotifier *notifier;
1961
1962 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1963 memory_region_iommu_replay(iommu_mr, notifier);
1964 }
1965 }
1966
1967 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1968 IOMMUNotifier *n)
1969 {
1970 IOMMUMemoryRegion *iommu_mr;
1971
1972 if (mr->alias) {
1973 memory_region_unregister_iommu_notifier(mr->alias, n);
1974 return;
1975 }
1976 QLIST_REMOVE(n, node);
1977 iommu_mr = IOMMU_MEMORY_REGION(mr);
1978 memory_region_update_iommu_notify_flags(iommu_mr);
1979 }
1980
1981 void memory_region_notify_one(IOMMUNotifier *notifier,
1982 IOMMUTLBEntry *entry)
1983 {
1984 IOMMUNotifierFlag request_flags;
1985
1986 /*
1987 * Skip the notification if the notification does not overlap
1988 * with registered range.
1989 */
1990 if (notifier->start > entry->iova + entry->addr_mask ||
1991 notifier->end < entry->iova) {
1992 return;
1993 }
1994
1995 if (entry->perm & IOMMU_RW) {
1996 request_flags = IOMMU_NOTIFIER_MAP;
1997 } else {
1998 request_flags = IOMMU_NOTIFIER_UNMAP;
1999 }
2000
2001 if (notifier->notifier_flags & request_flags) {
2002 notifier->notify(notifier, entry);
2003 }
2004 }
2005
2006 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2007 int iommu_idx,
2008 IOMMUTLBEntry entry)
2009 {
2010 IOMMUNotifier *iommu_notifier;
2011
2012 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2013
2014 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2015 if (iommu_notifier->iommu_idx == iommu_idx) {
2016 memory_region_notify_one(iommu_notifier, &entry);
2017 }
2018 }
2019 }
2020
2021 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2022 enum IOMMUMemoryRegionAttr attr,
2023 void *data)
2024 {
2025 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2026
2027 if (!imrc->get_attr) {
2028 return -EINVAL;
2029 }
2030
2031 return imrc->get_attr(iommu_mr, attr, data);
2032 }
2033
2034 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2035 MemTxAttrs attrs)
2036 {
2037 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2038
2039 if (!imrc->attrs_to_index) {
2040 return 0;
2041 }
2042
2043 return imrc->attrs_to_index(iommu_mr, attrs);
2044 }
2045
2046 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2047 {
2048 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2049
2050 if (!imrc->num_indexes) {
2051 return 1;
2052 }
2053
2054 return imrc->num_indexes(iommu_mr);
2055 }
2056
2057 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2058 {
2059 uint8_t mask = 1 << client;
2060 uint8_t old_logging;
2061
2062 assert(client == DIRTY_MEMORY_VGA);
2063 old_logging = mr->vga_logging_count;
2064 mr->vga_logging_count += log ? 1 : -1;
2065 if (!!old_logging == !!mr->vga_logging_count) {
2066 return;
2067 }
2068
2069 memory_region_transaction_begin();
2070 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2071 memory_region_update_pending |= mr->enabled;
2072 memory_region_transaction_commit();
2073 }
2074
2075 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
2076 hwaddr size, unsigned client)
2077 {
2078 assert(mr->ram_block);
2079 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
2080 size, client);
2081 }
2082
2083 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2084 hwaddr size)
2085 {
2086 assert(mr->ram_block);
2087 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2088 size,
2089 memory_region_get_dirty_log_mask(mr));
2090 }
2091
2092 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2093 {
2094 MemoryListener *listener;
2095 AddressSpace *as;
2096 FlatView *view;
2097 FlatRange *fr;
2098
2099 /* If the same address space has multiple log_sync listeners, we
2100 * visit that address space's FlatView multiple times. But because
2101 * log_sync listeners are rare, it's still cheaper than walking each
2102 * address space once.
2103 */
2104 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2105 if (!listener->log_sync) {
2106 continue;
2107 }
2108 as = listener->address_space;
2109 view = address_space_get_flatview(as);
2110 FOR_EACH_FLAT_RANGE(fr, view) {
2111 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2112 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2113 listener->log_sync(listener, &mrs);
2114 }
2115 }
2116 flatview_unref(view);
2117 }
2118 }
2119
2120 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2121 hwaddr addr,
2122 hwaddr size,
2123 unsigned client)
2124 {
2125 assert(mr->ram_block);
2126 memory_region_sync_dirty_bitmap(mr);
2127 return cpu_physical_memory_snapshot_and_clear_dirty(
2128 memory_region_get_ram_addr(mr) + addr, size, client);
2129 }
2130
2131 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2132 hwaddr addr, hwaddr size)
2133 {
2134 assert(mr->ram_block);
2135 return cpu_physical_memory_snapshot_get_dirty(snap,
2136 memory_region_get_ram_addr(mr) + addr, size);
2137 }
2138
2139 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2140 {
2141 if (mr->readonly != readonly) {
2142 memory_region_transaction_begin();
2143 mr->readonly = readonly;
2144 memory_region_update_pending |= mr->enabled;
2145 memory_region_transaction_commit();
2146 }
2147 }
2148
2149 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2150 {
2151 if (mr->nonvolatile != nonvolatile) {
2152 memory_region_transaction_begin();
2153 mr->nonvolatile = nonvolatile;
2154 memory_region_update_pending |= mr->enabled;
2155 memory_region_transaction_commit();
2156 }
2157 }
2158
2159 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2160 {
2161 if (mr->romd_mode != romd_mode) {
2162 memory_region_transaction_begin();
2163 mr->romd_mode = romd_mode;
2164 memory_region_update_pending |= mr->enabled;
2165 memory_region_transaction_commit();
2166 }
2167 }
2168
2169 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2170 hwaddr size, unsigned client)
2171 {
2172 assert(mr->ram_block);
2173 cpu_physical_memory_test_and_clear_dirty(
2174 memory_region_get_ram_addr(mr) + addr, size, client);
2175 }
2176
2177 int memory_region_get_fd(MemoryRegion *mr)
2178 {
2179 int fd;
2180
2181 rcu_read_lock();
2182 while (mr->alias) {
2183 mr = mr->alias;
2184 }
2185 fd = mr->ram_block->fd;
2186 rcu_read_unlock();
2187
2188 return fd;
2189 }
2190
2191 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2192 {
2193 void *ptr;
2194 uint64_t offset = 0;
2195
2196 rcu_read_lock();
2197 while (mr->alias) {
2198 offset += mr->alias_offset;
2199 mr = mr->alias;
2200 }
2201 assert(mr->ram_block);
2202 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2203 rcu_read_unlock();
2204
2205 return ptr;
2206 }
2207
2208 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2209 {
2210 RAMBlock *block;
2211
2212 block = qemu_ram_block_from_host(ptr, false, offset);
2213 if (!block) {
2214 return NULL;
2215 }
2216
2217 return block->mr;
2218 }
2219
2220 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2221 {
2222 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2223 }
2224
2225 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2226 {
2227 assert(mr->ram_block);
2228
2229 qemu_ram_resize(mr->ram_block, newsize, errp);
2230 }
2231
2232 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2233 {
2234 FlatView *view;
2235 FlatRange *fr;
2236
2237 view = address_space_get_flatview(as);
2238 FOR_EACH_FLAT_RANGE(fr, view) {
2239 if (fr->mr == mr) {
2240 flat_range_coalesced_io_del(fr, as);
2241 flat_range_coalesced_io_add(fr, as);
2242 }
2243 }
2244 flatview_unref(view);
2245 }
2246
2247 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2248 {
2249 AddressSpace *as;
2250
2251 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2252 memory_region_update_coalesced_range_as(mr, as);
2253 }
2254 }
2255
2256 void memory_region_set_coalescing(MemoryRegion *mr)
2257 {
2258 memory_region_clear_coalescing(mr);
2259 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2260 }
2261
2262 void memory_region_add_coalescing(MemoryRegion *mr,
2263 hwaddr offset,
2264 uint64_t size)
2265 {
2266 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2267
2268 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2269 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2270 memory_region_update_coalesced_range(mr);
2271 memory_region_set_flush_coalesced(mr);
2272 }
2273
2274 void memory_region_clear_coalescing(MemoryRegion *mr)
2275 {
2276 CoalescedMemoryRange *cmr;
2277 bool updated = false;
2278
2279 qemu_flush_coalesced_mmio_buffer();
2280 mr->flush_coalesced_mmio = false;
2281
2282 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2283 cmr = QTAILQ_FIRST(&mr->coalesced);
2284 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2285 g_free(cmr);
2286 updated = true;
2287 }
2288
2289 if (updated) {
2290 memory_region_update_coalesced_range(mr);
2291 }
2292 }
2293
2294 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2295 {
2296 mr->flush_coalesced_mmio = true;
2297 }
2298
2299 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2300 {
2301 qemu_flush_coalesced_mmio_buffer();
2302 if (QTAILQ_EMPTY(&mr->coalesced)) {
2303 mr->flush_coalesced_mmio = false;
2304 }
2305 }
2306
2307 void memory_region_clear_global_locking(MemoryRegion *mr)
2308 {
2309 mr->global_locking = false;
2310 }
2311
2312 static bool userspace_eventfd_warning;
2313
2314 void memory_region_add_eventfd(MemoryRegion *mr,
2315 hwaddr addr,
2316 unsigned size,
2317 bool match_data,
2318 uint64_t data,
2319 EventNotifier *e)
2320 {
2321 MemoryRegionIoeventfd mrfd = {
2322 .addr.start = int128_make64(addr),
2323 .addr.size = int128_make64(size),
2324 .match_data = match_data,
2325 .data = data,
2326 .e = e,
2327 };
2328 unsigned i;
2329
2330 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2331 userspace_eventfd_warning))) {
2332 userspace_eventfd_warning = true;
2333 error_report("Using eventfd without MMIO binding in KVM. "
2334 "Suboptimal performance expected");
2335 }
2336
2337 if (size) {
2338 adjust_endianness(mr, &mrfd.data, size);
2339 }
2340 memory_region_transaction_begin();
2341 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2342 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2343 break;
2344 }
2345 }
2346 ++mr->ioeventfd_nb;
2347 mr->ioeventfds = g_realloc(mr->ioeventfds,
2348 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2349 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2350 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2351 mr->ioeventfds[i] = mrfd;
2352 ioeventfd_update_pending |= mr->enabled;
2353 memory_region_transaction_commit();
2354 }
2355
2356 void memory_region_del_eventfd(MemoryRegion *mr,
2357 hwaddr addr,
2358 unsigned size,
2359 bool match_data,
2360 uint64_t data,
2361 EventNotifier *e)
2362 {
2363 MemoryRegionIoeventfd mrfd = {
2364 .addr.start = int128_make64(addr),
2365 .addr.size = int128_make64(size),
2366 .match_data = match_data,
2367 .data = data,
2368 .e = e,
2369 };
2370 unsigned i;
2371
2372 if (size) {
2373 adjust_endianness(mr, &mrfd.data, size);
2374 }
2375 memory_region_transaction_begin();
2376 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2377 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2378 break;
2379 }
2380 }
2381 assert(i != mr->ioeventfd_nb);
2382 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2383 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2384 --mr->ioeventfd_nb;
2385 mr->ioeventfds = g_realloc(mr->ioeventfds,
2386 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2387 ioeventfd_update_pending |= mr->enabled;
2388 memory_region_transaction_commit();
2389 }
2390
2391 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2392 {
2393 MemoryRegion *mr = subregion->container;
2394 MemoryRegion *other;
2395
2396 memory_region_transaction_begin();
2397
2398 memory_region_ref(subregion);
2399 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2400 if (subregion->priority >= other->priority) {
2401 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2402 goto done;
2403 }
2404 }
2405 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2406 done:
2407 memory_region_update_pending |= mr->enabled && subregion->enabled;
2408 memory_region_transaction_commit();
2409 }
2410
2411 static void memory_region_add_subregion_common(MemoryRegion *mr,
2412 hwaddr offset,
2413 MemoryRegion *subregion)
2414 {
2415 assert(!subregion->container);
2416 subregion->container = mr;
2417 subregion->addr = offset;
2418 memory_region_update_container_subregions(subregion);
2419 }
2420
2421 void memory_region_add_subregion(MemoryRegion *mr,
2422 hwaddr offset,
2423 MemoryRegion *subregion)
2424 {
2425 subregion->priority = 0;
2426 memory_region_add_subregion_common(mr, offset, subregion);
2427 }
2428
2429 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2430 hwaddr offset,
2431 MemoryRegion *subregion,
2432 int priority)
2433 {
2434 subregion->priority = priority;
2435 memory_region_add_subregion_common(mr, offset, subregion);
2436 }
2437
2438 void memory_region_del_subregion(MemoryRegion *mr,
2439 MemoryRegion *subregion)
2440 {
2441 memory_region_transaction_begin();
2442 assert(subregion->container == mr);
2443 subregion->container = NULL;
2444 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2445 memory_region_unref(subregion);
2446 memory_region_update_pending |= mr->enabled && subregion->enabled;
2447 memory_region_transaction_commit();
2448 }
2449
2450 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2451 {
2452 if (enabled == mr->enabled) {
2453 return;
2454 }
2455 memory_region_transaction_begin();
2456 mr->enabled = enabled;
2457 memory_region_update_pending = true;
2458 memory_region_transaction_commit();
2459 }
2460
2461 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2462 {
2463 Int128 s = int128_make64(size);
2464
2465 if (size == UINT64_MAX) {
2466 s = int128_2_64();
2467 }
2468 if (int128_eq(s, mr->size)) {
2469 return;
2470 }
2471 memory_region_transaction_begin();
2472 mr->size = s;
2473 memory_region_update_pending = true;
2474 memory_region_transaction_commit();
2475 }
2476
2477 static void memory_region_readd_subregion(MemoryRegion *mr)
2478 {
2479 MemoryRegion *container = mr->container;
2480
2481 if (container) {
2482 memory_region_transaction_begin();
2483 memory_region_ref(mr);
2484 memory_region_del_subregion(container, mr);
2485 mr->container = container;
2486 memory_region_update_container_subregions(mr);
2487 memory_region_unref(mr);
2488 memory_region_transaction_commit();
2489 }
2490 }
2491
2492 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2493 {
2494 if (addr != mr->addr) {
2495 mr->addr = addr;
2496 memory_region_readd_subregion(mr);
2497 }
2498 }
2499
2500 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2501 {
2502 assert(mr->alias);
2503
2504 if (offset == mr->alias_offset) {
2505 return;
2506 }
2507
2508 memory_region_transaction_begin();
2509 mr->alias_offset = offset;
2510 memory_region_update_pending |= mr->enabled;
2511 memory_region_transaction_commit();
2512 }
2513
2514 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2515 {
2516 return mr->align;
2517 }
2518
2519 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2520 {
2521 const AddrRange *addr = addr_;
2522 const FlatRange *fr = fr_;
2523
2524 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2525 return -1;
2526 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2527 return 1;
2528 }
2529 return 0;
2530 }
2531
2532 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2533 {
2534 return bsearch(&addr, view->ranges, view->nr,
2535 sizeof(FlatRange), cmp_flatrange_addr);
2536 }
2537
2538 bool memory_region_is_mapped(MemoryRegion *mr)
2539 {
2540 return mr->container ? true : false;
2541 }
2542
2543 /* Same as memory_region_find, but it does not add a reference to the
2544 * returned region. It must be called from an RCU critical section.
2545 */
2546 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2547 hwaddr addr, uint64_t size)
2548 {
2549 MemoryRegionSection ret = { .mr = NULL };
2550 MemoryRegion *root;
2551 AddressSpace *as;
2552 AddrRange range;
2553 FlatView *view;
2554 FlatRange *fr;
2555
2556 addr += mr->addr;
2557 for (root = mr; root->container; ) {
2558 root = root->container;
2559 addr += root->addr;
2560 }
2561
2562 as = memory_region_to_address_space(root);
2563 if (!as) {
2564 return ret;
2565 }
2566 range = addrrange_make(int128_make64(addr), int128_make64(size));
2567
2568 view = address_space_to_flatview(as);
2569 fr = flatview_lookup(view, range);
2570 if (!fr) {
2571 return ret;
2572 }
2573
2574 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2575 --fr;
2576 }
2577
2578 ret.mr = fr->mr;
2579 ret.fv = view;
2580 range = addrrange_intersection(range, fr->addr);
2581 ret.offset_within_region = fr->offset_in_region;
2582 ret.offset_within_region += int128_get64(int128_sub(range.start,
2583 fr->addr.start));
2584 ret.size = range.size;
2585 ret.offset_within_address_space = int128_get64(range.start);
2586 ret.readonly = fr->readonly;
2587 ret.nonvolatile = fr->nonvolatile;
2588 return ret;
2589 }
2590
2591 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2592 hwaddr addr, uint64_t size)
2593 {
2594 MemoryRegionSection ret;
2595 rcu_read_lock();
2596 ret = memory_region_find_rcu(mr, addr, size);
2597 if (ret.mr) {
2598 memory_region_ref(ret.mr);
2599 }
2600 rcu_read_unlock();
2601 return ret;
2602 }
2603
2604 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2605 {
2606 MemoryRegion *mr;
2607
2608 rcu_read_lock();
2609 mr = memory_region_find_rcu(container, addr, 1).mr;
2610 rcu_read_unlock();
2611 return mr && mr != container;
2612 }
2613
2614 void memory_global_dirty_log_sync(void)
2615 {
2616 memory_region_sync_dirty_bitmap(NULL);
2617 }
2618
2619 static VMChangeStateEntry *vmstate_change;
2620
2621 void memory_global_dirty_log_start(void)
2622 {
2623 if (vmstate_change) {
2624 qemu_del_vm_change_state_handler(vmstate_change);
2625 vmstate_change = NULL;
2626 }
2627
2628 global_dirty_log = true;
2629
2630 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2631
2632 /* Refresh DIRTY_LOG_MIGRATION bit. */
2633 memory_region_transaction_begin();
2634 memory_region_update_pending = true;
2635 memory_region_transaction_commit();
2636 }
2637
2638 static void memory_global_dirty_log_do_stop(void)
2639 {
2640 global_dirty_log = false;
2641
2642 /* Refresh DIRTY_LOG_MIGRATION bit. */
2643 memory_region_transaction_begin();
2644 memory_region_update_pending = true;
2645 memory_region_transaction_commit();
2646
2647 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2648 }
2649
2650 static void memory_vm_change_state_handler(void *opaque, int running,
2651 RunState state)
2652 {
2653 if (running) {
2654 memory_global_dirty_log_do_stop();
2655
2656 if (vmstate_change) {
2657 qemu_del_vm_change_state_handler(vmstate_change);
2658 vmstate_change = NULL;
2659 }
2660 }
2661 }
2662
2663 void memory_global_dirty_log_stop(void)
2664 {
2665 if (!runstate_is_running()) {
2666 if (vmstate_change) {
2667 return;
2668 }
2669 vmstate_change = qemu_add_vm_change_state_handler(
2670 memory_vm_change_state_handler, NULL);
2671 return;
2672 }
2673
2674 memory_global_dirty_log_do_stop();
2675 }
2676
2677 static void listener_add_address_space(MemoryListener *listener,
2678 AddressSpace *as)
2679 {
2680 FlatView *view;
2681 FlatRange *fr;
2682
2683 if (listener->begin) {
2684 listener->begin(listener);
2685 }
2686 if (global_dirty_log) {
2687 if (listener->log_global_start) {
2688 listener->log_global_start(listener);
2689 }
2690 }
2691
2692 view = address_space_get_flatview(as);
2693 FOR_EACH_FLAT_RANGE(fr, view) {
2694 MemoryRegionSection section = section_from_flat_range(fr, view);
2695
2696 if (listener->region_add) {
2697 listener->region_add(listener, &section);
2698 }
2699 if (fr->dirty_log_mask && listener->log_start) {
2700 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2701 }
2702 }
2703 if (listener->commit) {
2704 listener->commit(listener);
2705 }
2706 flatview_unref(view);
2707 }
2708
2709 static void listener_del_address_space(MemoryListener *listener,
2710 AddressSpace *as)
2711 {
2712 FlatView *view;
2713 FlatRange *fr;
2714
2715 if (listener->begin) {
2716 listener->begin(listener);
2717 }
2718 view = address_space_get_flatview(as);
2719 FOR_EACH_FLAT_RANGE(fr, view) {
2720 MemoryRegionSection section = section_from_flat_range(fr, view);
2721
2722 if (fr->dirty_log_mask && listener->log_stop) {
2723 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2724 }
2725 if (listener->region_del) {
2726 listener->region_del(listener, &section);
2727 }
2728 }
2729 if (listener->commit) {
2730 listener->commit(listener);
2731 }
2732 flatview_unref(view);
2733 }
2734
2735 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2736 {
2737 MemoryListener *other = NULL;
2738
2739 listener->address_space = as;
2740 if (QTAILQ_EMPTY(&memory_listeners)
2741 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2742 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2743 } else {
2744 QTAILQ_FOREACH(other, &memory_listeners, link) {
2745 if (listener->priority < other->priority) {
2746 break;
2747 }
2748 }
2749 QTAILQ_INSERT_BEFORE(other, listener, link);
2750 }
2751
2752 if (QTAILQ_EMPTY(&as->listeners)
2753 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2754 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2755 } else {
2756 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2757 if (listener->priority < other->priority) {
2758 break;
2759 }
2760 }
2761 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2762 }
2763
2764 listener_add_address_space(listener, as);
2765 }
2766
2767 void memory_listener_unregister(MemoryListener *listener)
2768 {
2769 if (!listener->address_space) {
2770 return;
2771 }
2772
2773 listener_del_address_space(listener, listener->address_space);
2774 QTAILQ_REMOVE(&memory_listeners, listener, link);
2775 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2776 listener->address_space = NULL;
2777 }
2778
2779 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2780 {
2781 memory_region_ref(root);
2782 as->root = root;
2783 as->current_map = NULL;
2784 as->ioeventfd_nb = 0;
2785 as->ioeventfds = NULL;
2786 QTAILQ_INIT(&as->listeners);
2787 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2788 as->name = g_strdup(name ? name : "anonymous");
2789 address_space_update_topology(as);
2790 address_space_update_ioeventfds(as);
2791 }
2792
2793 static void do_address_space_destroy(AddressSpace *as)
2794 {
2795 assert(QTAILQ_EMPTY(&as->listeners));
2796
2797 flatview_unref(as->current_map);
2798 g_free(as->name);
2799 g_free(as->ioeventfds);
2800 memory_region_unref(as->root);
2801 }
2802
2803 void address_space_destroy(AddressSpace *as)
2804 {
2805 MemoryRegion *root = as->root;
2806
2807 /* Flush out anything from MemoryListeners listening in on this */
2808 memory_region_transaction_begin();
2809 as->root = NULL;
2810 memory_region_transaction_commit();
2811 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2812
2813 /* At this point, as->dispatch and as->current_map are dummy
2814 * entries that the guest should never use. Wait for the old
2815 * values to expire before freeing the data.
2816 */
2817 as->root = root;
2818 call_rcu(as, do_address_space_destroy, rcu);
2819 }
2820
2821 static const char *memory_region_type(MemoryRegion *mr)
2822 {
2823 if (memory_region_is_ram_device(mr)) {
2824 return "ramd";
2825 } else if (memory_region_is_romd(mr)) {
2826 return "romd";
2827 } else if (memory_region_is_rom(mr)) {
2828 return "rom";
2829 } else if (memory_region_is_ram(mr)) {
2830 return "ram";
2831 } else {
2832 return "i/o";
2833 }
2834 }
2835
2836 typedef struct MemoryRegionList MemoryRegionList;
2837
2838 struct MemoryRegionList {
2839 const MemoryRegion *mr;
2840 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2841 };
2842
2843 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2844
2845 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2846 int128_sub((size), int128_one())) : 0)
2847 #define MTREE_INDENT " "
2848
2849 static void mtree_expand_owner(fprintf_function mon_printf, void *f,
2850 const char *label, Object *obj)
2851 {
2852 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2853
2854 mon_printf(f, " %s:{%s", label, dev ? "dev" : "obj");
2855 if (dev && dev->id) {
2856 mon_printf(f, " id=%s", dev->id);
2857 } else {
2858 gchar *canonical_path = object_get_canonical_path(obj);
2859 if (canonical_path) {
2860 mon_printf(f, " path=%s", canonical_path);
2861 g_free(canonical_path);
2862 } else {
2863 mon_printf(f, " type=%s", object_get_typename(obj));
2864 }
2865 }
2866 mon_printf(f, "}");
2867 }
2868
2869 static void mtree_print_mr_owner(fprintf_function mon_printf, void *f,
2870 const MemoryRegion *mr)
2871 {
2872 Object *owner = mr->owner;
2873 Object *parent = memory_region_owner((MemoryRegion *)mr);
2874
2875 if (!owner && !parent) {
2876 mon_printf(f, " orphan");
2877 return;
2878 }
2879 if (owner) {
2880 mtree_expand_owner(mon_printf, f, "owner", owner);
2881 }
2882 if (parent && parent != owner) {
2883 mtree_expand_owner(mon_printf, f, "parent", parent);
2884 }
2885 }
2886
2887 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2888 const MemoryRegion *mr, unsigned int level,
2889 hwaddr base,
2890 MemoryRegionListHead *alias_print_queue,
2891 bool owner)
2892 {
2893 MemoryRegionList *new_ml, *ml, *next_ml;
2894 MemoryRegionListHead submr_print_queue;
2895 const MemoryRegion *submr;
2896 unsigned int i;
2897 hwaddr cur_start, cur_end;
2898
2899 if (!mr) {
2900 return;
2901 }
2902
2903 for (i = 0; i < level; i++) {
2904 mon_printf(f, MTREE_INDENT);
2905 }
2906
2907 cur_start = base + mr->addr;
2908 cur_end = cur_start + MR_SIZE(mr->size);
2909
2910 /*
2911 * Try to detect overflow of memory region. This should never
2912 * happen normally. When it happens, we dump something to warn the
2913 * user who is observing this.
2914 */
2915 if (cur_start < base || cur_end < cur_start) {
2916 mon_printf(f, "[DETECTED OVERFLOW!] ");
2917 }
2918
2919 if (mr->alias) {
2920 MemoryRegionList *ml;
2921 bool found = false;
2922
2923 /* check if the alias is already in the queue */
2924 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2925 if (ml->mr == mr->alias) {
2926 found = true;
2927 }
2928 }
2929
2930 if (!found) {
2931 ml = g_new(MemoryRegionList, 1);
2932 ml->mr = mr->alias;
2933 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2934 }
2935 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2936 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2937 "-" TARGET_FMT_plx "%s",
2938 cur_start, cur_end,
2939 mr->priority,
2940 mr->nonvolatile ? "nv-" : "",
2941 memory_region_type((MemoryRegion *)mr),
2942 memory_region_name(mr),
2943 memory_region_name(mr->alias),
2944 mr->alias_offset,
2945 mr->alias_offset + MR_SIZE(mr->size),
2946 mr->enabled ? "" : " [disabled]");
2947 if (owner) {
2948 mtree_print_mr_owner(mon_printf, f, mr);
2949 }
2950 } else {
2951 mon_printf(f,
2952 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s%s): %s%s",
2953 cur_start, cur_end,
2954 mr->priority,
2955 mr->nonvolatile ? "nv-" : "",
2956 memory_region_type((MemoryRegion *)mr),
2957 memory_region_name(mr),
2958 mr->enabled ? "" : " [disabled]");
2959 if (owner) {
2960 mtree_print_mr_owner(mon_printf, f, mr);
2961 }
2962 }
2963 mon_printf(f, "\n");
2964
2965 QTAILQ_INIT(&submr_print_queue);
2966
2967 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2968 new_ml = g_new(MemoryRegionList, 1);
2969 new_ml->mr = submr;
2970 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2971 if (new_ml->mr->addr < ml->mr->addr ||
2972 (new_ml->mr->addr == ml->mr->addr &&
2973 new_ml->mr->priority > ml->mr->priority)) {
2974 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2975 new_ml = NULL;
2976 break;
2977 }
2978 }
2979 if (new_ml) {
2980 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2981 }
2982 }
2983
2984 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2985 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2986 alias_print_queue, owner);
2987 }
2988
2989 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2990 g_free(ml);
2991 }
2992 }
2993
2994 struct FlatViewInfo {
2995 fprintf_function mon_printf;
2996 void *f;
2997 int counter;
2998 bool dispatch_tree;
2999 bool owner;
3000 };
3001
3002 static void mtree_print_flatview(gpointer key, gpointer value,
3003 gpointer user_data)
3004 {
3005 FlatView *view = key;
3006 GArray *fv_address_spaces = value;
3007 struct FlatViewInfo *fvi = user_data;
3008 fprintf_function p = fvi->mon_printf;
3009 void *f = fvi->f;
3010 FlatRange *range = &view->ranges[0];
3011 MemoryRegion *mr;
3012 int n = view->nr;
3013 int i;
3014 AddressSpace *as;
3015
3016 p(f, "FlatView #%d\n", fvi->counter);
3017 ++fvi->counter;
3018
3019 for (i = 0; i < fv_address_spaces->len; ++i) {
3020 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3021 p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
3022 if (as->root->alias) {
3023 p(f, ", alias %s", memory_region_name(as->root->alias));
3024 }
3025 p(f, "\n");
3026 }
3027
3028 p(f, " Root memory region: %s\n",
3029 view->root ? memory_region_name(view->root) : "(none)");
3030
3031 if (n <= 0) {
3032 p(f, MTREE_INDENT "No rendered FlatView\n\n");
3033 return;
3034 }
3035
3036 while (n--) {
3037 mr = range->mr;
3038 if (range->offset_in_region) {
3039 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3040 TARGET_FMT_plx " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3041 int128_get64(range->addr.start),
3042 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3043 mr->priority,
3044 range->nonvolatile ? "nv-" : "",
3045 range->readonly ? "rom" : memory_region_type(mr),
3046 memory_region_name(mr),
3047 range->offset_in_region);
3048 } else {
3049 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3050 TARGET_FMT_plx " (prio %d, %s%s): %s",
3051 int128_get64(range->addr.start),
3052 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3053 mr->priority,
3054 range->nonvolatile ? "nv-" : "",
3055 range->readonly ? "rom" : memory_region_type(mr),
3056 memory_region_name(mr));
3057 }
3058 if (fvi->owner) {
3059 mtree_print_mr_owner(p, f, mr);
3060 }
3061 p(f, "\n");
3062 range++;
3063 }
3064
3065 #if !defined(CONFIG_USER_ONLY)
3066 if (fvi->dispatch_tree && view->root) {
3067 mtree_print_dispatch(p, f, view->dispatch, view->root);
3068 }
3069 #endif
3070
3071 p(f, "\n");
3072 }
3073
3074 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3075 gpointer user_data)
3076 {
3077 FlatView *view = key;
3078 GArray *fv_address_spaces = value;
3079
3080 g_array_unref(fv_address_spaces);
3081 flatview_unref(view);
3082
3083 return true;
3084 }
3085
3086 void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3087 bool dispatch_tree, bool owner)
3088 {
3089 MemoryRegionListHead ml_head;
3090 MemoryRegionList *ml, *ml2;
3091 AddressSpace *as;
3092
3093 if (flatview) {
3094 FlatView *view;
3095 struct FlatViewInfo fvi = {
3096 .mon_printf = mon_printf,
3097 .f = f,
3098 .counter = 0,
3099 .dispatch_tree = dispatch_tree,
3100 .owner = owner,
3101 };
3102 GArray *fv_address_spaces;
3103 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3104
3105 /* Gather all FVs in one table */
3106 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3107 view = address_space_get_flatview(as);
3108
3109 fv_address_spaces = g_hash_table_lookup(views, view);
3110 if (!fv_address_spaces) {
3111 fv_address_spaces = g_array_new(false, false, sizeof(as));
3112 g_hash_table_insert(views, view, fv_address_spaces);
3113 }
3114
3115 g_array_append_val(fv_address_spaces, as);
3116 }
3117
3118 /* Print */
3119 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3120
3121 /* Free */
3122 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3123 g_hash_table_unref(views);
3124
3125 return;
3126 }
3127
3128 QTAILQ_INIT(&ml_head);
3129
3130 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3131 mon_printf(f, "address-space: %s\n", as->name);
3132 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head, owner);
3133 mon_printf(f, "\n");
3134 }
3135
3136 /* print aliased regions */
3137 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3138 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3139 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head, owner);
3140 mon_printf(f, "\n");
3141 }
3142
3143 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3144 g_free(ml);
3145 }
3146 }
3147
3148 void memory_region_init_ram(MemoryRegion *mr,
3149 struct Object *owner,
3150 const char *name,
3151 uint64_t size,
3152 Error **errp)
3153 {
3154 DeviceState *owner_dev;
3155 Error *err = NULL;
3156
3157 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3158 if (err) {
3159 error_propagate(errp, err);
3160 return;
3161 }
3162 /* This will assert if owner is neither NULL nor a DeviceState.
3163 * We only want the owner here for the purposes of defining a
3164 * unique name for migration. TODO: Ideally we should implement
3165 * a naming scheme for Objects which are not DeviceStates, in
3166 * which case we can relax this restriction.
3167 */
3168 owner_dev = DEVICE(owner);
3169 vmstate_register_ram(mr, owner_dev);
3170 }
3171
3172 void memory_region_init_rom(MemoryRegion *mr,
3173 struct Object *owner,
3174 const char *name,
3175 uint64_t size,
3176 Error **errp)
3177 {
3178 DeviceState *owner_dev;
3179 Error *err = NULL;
3180
3181 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3182 if (err) {
3183 error_propagate(errp, err);
3184 return;
3185 }
3186 /* This will assert if owner is neither NULL nor a DeviceState.
3187 * We only want the owner here for the purposes of defining a
3188 * unique name for migration. TODO: Ideally we should implement
3189 * a naming scheme for Objects which are not DeviceStates, in
3190 * which case we can relax this restriction.
3191 */
3192 owner_dev = DEVICE(owner);
3193 vmstate_register_ram(mr, owner_dev);
3194 }
3195
3196 void memory_region_init_rom_device(MemoryRegion *mr,
3197 struct Object *owner,
3198 const MemoryRegionOps *ops,
3199 void *opaque,
3200 const char *name,
3201 uint64_t size,
3202 Error **errp)
3203 {
3204 DeviceState *owner_dev;
3205 Error *err = NULL;
3206
3207 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3208 name, size, &err);
3209 if (err) {
3210 error_propagate(errp, err);
3211 return;
3212 }
3213 /* This will assert if owner is neither NULL nor a DeviceState.
3214 * We only want the owner here for the purposes of defining a
3215 * unique name for migration. TODO: Ideally we should implement
3216 * a naming scheme for Objects which are not DeviceStates, in
3217 * which case we can relax this restriction.
3218 */
3219 owner_dev = DEVICE(owner);
3220 vmstate_register_ram(mr, owner_dev);
3221 }
3222
3223 static const TypeInfo memory_region_info = {
3224 .parent = TYPE_OBJECT,
3225 .name = TYPE_MEMORY_REGION,
3226 .instance_size = sizeof(MemoryRegion),
3227 .instance_init = memory_region_initfn,
3228 .instance_finalize = memory_region_finalize,
3229 };
3230
3231 static const TypeInfo iommu_memory_region_info = {
3232 .parent = TYPE_MEMORY_REGION,
3233 .name = TYPE_IOMMU_MEMORY_REGION,
3234 .class_size = sizeof(IOMMUMemoryRegionClass),
3235 .instance_size = sizeof(IOMMUMemoryRegion),
3236 .instance_init = iommu_memory_region_initfn,
3237 .abstract = true,
3238 };
3239
3240 static void memory_register_types(void)
3241 {
3242 type_register_static(&memory_region_info);
3243 type_register_static(&iommu_memory_region_info);
3244 }
3245
3246 type_init(memory_register_types)
AR7 emulation for QEMU