4 * Copyright (c) 2011 Intel Corporation
6 * Jiang Yunhong<yunhong.jiang@intel.com>
7 * Xin Xiaohui<xiaohui.xin@intel.com>
8 * Zhang Xiantao<xiantao.zhang@intel.com>
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
15 #ifndef TARGET_I386_HAX_POSIX_H
16 #define TARGET_I386_HAX_POSIX_H
18 #include <sys/ioctl.h>
20 #define HAX_INVALID_FD (-1)
21 static inline int hax_invalid_fd(hax_fd fd
)
26 static inline void hax_mod_close(struct hax_state
*hax
)
31 static inline void hax_close_fd(hax_fd fd
)
36 /* HAX model level ioctl */
37 #define HAX_IOCTL_VERSION _IOWR(0, 0x20, struct hax_module_version)
38 #define HAX_IOCTL_CREATE_VM _IOWR(0, 0x21, uint32_t)
39 #define HAX_IOCTL_DESTROY_VM _IOW(0, 0x22, uint32_t)
40 #define HAX_IOCTL_CAPABILITY _IOR(0, 0x23, struct hax_capabilityinfo)
42 #define HAX_VM_IOCTL_VCPU_CREATE _IOWR(0, 0x80, uint32_t)
43 #define HAX_VM_IOCTL_ALLOC_RAM _IOWR(0, 0x81, struct hax_alloc_ram_info)
44 #define HAX_VM_IOCTL_SET_RAM _IOWR(0, 0x82, struct hax_set_ram_info)
45 #define HAX_VM_IOCTL_VCPU_DESTROY _IOW(0, 0x83, uint32_t)
46 #define HAX_VM_IOCTL_NOTIFY_QEMU_VERSION _IOW(0, 0x84, struct hax_qemu_version)
47 #define HAX_VM_IOCTL_ADD_RAMBLOCK _IOW(0, 0x85, struct hax_ramblock_info)
49 #define HAX_VCPU_IOCTL_RUN _IO(0, 0xc0)
50 #define HAX_VCPU_IOCTL_SET_MSRS _IOWR(0, 0xc1, struct hax_msr_data)
51 #define HAX_VCPU_IOCTL_GET_MSRS _IOWR(0, 0xc2, struct hax_msr_data)
53 #define HAX_VCPU_IOCTL_SET_FPU _IOW(0, 0xc3, struct fx_layout)
54 #define HAX_VCPU_IOCTL_GET_FPU _IOR(0, 0xc4, struct fx_layout)
56 #define HAX_VCPU_IOCTL_SETUP_TUNNEL _IOWR(0, 0xc5, struct hax_tunnel_info)
57 #define HAX_VCPU_IOCTL_INTERRUPT _IOWR(0, 0xc6, uint32_t)
58 #define HAX_VCPU_SET_REGS _IOWR(0, 0xc7, struct vcpu_state_t)
59 #define HAX_VCPU_GET_REGS _IOWR(0, 0xc8, struct vcpu_state_t)
61 #endif /* TARGET_I386_HAX_POSIX_H */