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target/mips: Raise exception when DINSV opcode used with DSP disabled
[qemu/ar7.git] / hw / display / virtio-gpu.c
blobe183f4ecdaa52328b722f785ea8136703cdbb154
1 /*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
12 */
13
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qemu/iov.h"
17 #include "ui/console.h"
18 #include "trace.h"
19 #include "sysemu/dma.h"
20 #include "sysemu/sysemu.h"
21 #include "hw/virtio/virtio.h"
22 #include "migration/qemu-file-types.h"
23 #include "hw/virtio/virtio-gpu.h"
24 #include "hw/virtio/virtio-gpu-bswap.h"
25 #include "hw/virtio/virtio-gpu-pixman.h"
26 #include "hw/virtio/virtio-bus.h"
27 #include "hw/display/edid.h"
28 #include "hw/qdev-properties.h"
29 #include "qemu/log.h"
30 #include "qemu/module.h"
31 #include "qapi/error.h"
32 #include "qemu/error-report.h"
33
34 #define VIRTIO_GPU_VM_VERSION 1
35
36 static struct virtio_gpu_simple_resource*
37 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
38 static struct virtio_gpu_simple_resource *
39 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
40 bool require_backing,
41 const char *caller, uint32_t *error);
42
43 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
44 struct virtio_gpu_simple_resource *res);
45
46 void virtio_gpu_update_cursor_data(VirtIOGPU *g,
47 struct virtio_gpu_scanout *s,
48 uint32_t resource_id)
49 {
50 struct virtio_gpu_simple_resource *res;
51 uint32_t pixels;
52 void *data;
53
54 res = virtio_gpu_find_check_resource(g, resource_id, false,
55 __func__, NULL);
56 if (!res) {
57 return;
58 }
59
60 if (res->blob_size) {
61 if (res->blob_size < (s->current_cursor->width *
62 s->current_cursor->height * 4)) {
63 return;
64 }
65 data = res->blob;
66 } else {
67 if (pixman_image_get_width(res->image) != s->current_cursor->width ||
68 pixman_image_get_height(res->image) != s->current_cursor->height) {
69 return;
70 }
71 data = pixman_image_get_data(res->image);
72 }
73
74 pixels = s->current_cursor->width * s->current_cursor->height;
75 memcpy(s->current_cursor->data, data,
76 pixels * sizeof(uint32_t));
77 }
78
79 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
80 {
81 struct virtio_gpu_scanout *s;
82 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
83 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR;
84
85 if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) {
86 return;
87 }
88 s = &g->parent_obj.scanout[cursor->pos.scanout_id];
89
90 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id,
91 cursor->pos.x,
92 cursor->pos.y,
93 move ? "move" : "update",
94 cursor->resource_id);
95
96 if (!move) {
97 if (!s->current_cursor) {
98 s->current_cursor = cursor_alloc(64, 64);
99 }
100
101 s->current_cursor->hot_x = cursor->hot_x;
102 s->current_cursor->hot_y = cursor->hot_y;
103
104 if (cursor->resource_id > 0) {
105 vgc->update_cursor_data(g, s, cursor->resource_id);
106 }
107 dpy_cursor_define(s->con, s->current_cursor);
108
109 s->cursor = *cursor;
110 } else {
111 s->cursor.pos.x = cursor->pos.x;
112 s->cursor.pos.y = cursor->pos.y;
113 }
114 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y,
115 cursor->resource_id ? 1 : 0);
116 }
117
118 static struct virtio_gpu_simple_resource *
119 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
120 {
121 struct virtio_gpu_simple_resource *res;
122
123 QTAILQ_FOREACH(res, &g->reslist, next) {
124 if (res->resource_id == resource_id) {
125 return res;
126 }
127 }
128 return NULL;
129 }
130
131 static struct virtio_gpu_simple_resource *
132 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
133 bool require_backing,
134 const char *caller, uint32_t *error)
135 {
136 struct virtio_gpu_simple_resource *res;
137
138 res = virtio_gpu_find_resource(g, resource_id);
139 if (!res) {
140 qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid resource specified %d\n",
141 caller, resource_id);
142 if (error) {
143 *error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
144 }
145 return NULL;
146 }
147
148 if (require_backing) {
149 if (!res->iov || (!res->image && !res->blob)) {
150 qemu_log_mask(LOG_GUEST_ERROR, "%s: no backing storage %d\n",
151 caller, resource_id);
152 if (error) {
153 *error = VIRTIO_GPU_RESP_ERR_UNSPEC;
154 }
155 return NULL;
156 }
157 }
158
159 return res;
160 }
161
162 void virtio_gpu_ctrl_response(VirtIOGPU *g,
163 struct virtio_gpu_ctrl_command *cmd,
164 struct virtio_gpu_ctrl_hdr *resp,
165 size_t resp_len)
166 {
167 size_t s;
168
169 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
170 resp->flags |= VIRTIO_GPU_FLAG_FENCE;
171 resp->fence_id = cmd->cmd_hdr.fence_id;
172 resp->ctx_id = cmd->cmd_hdr.ctx_id;
173 }
174 virtio_gpu_ctrl_hdr_bswap(resp);
175 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
176 if (s != resp_len) {
177 qemu_log_mask(LOG_GUEST_ERROR,
178 "%s: response size incorrect %zu vs %zu\n",
179 __func__, s, resp_len);
180 }
181 virtqueue_push(cmd->vq, &cmd->elem, s);
182 virtio_notify(VIRTIO_DEVICE(g), cmd->vq);
183 cmd->finished = true;
184 }
185
186 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
187 struct virtio_gpu_ctrl_command *cmd,
188 enum virtio_gpu_ctrl_type type)
189 {
190 struct virtio_gpu_ctrl_hdr resp;
191
192 memset(&resp, 0, sizeof(resp));
193 resp.type = type;
194 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp));
195 }
196
197 void virtio_gpu_get_display_info(VirtIOGPU *g,
198 struct virtio_gpu_ctrl_command *cmd)
199 {
200 struct virtio_gpu_resp_display_info display_info;
201
202 trace_virtio_gpu_cmd_get_display_info();
203 memset(&display_info, 0, sizeof(display_info));
204 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO;
205 virtio_gpu_base_fill_display_info(VIRTIO_GPU_BASE(g), &display_info);
206 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr,
207 sizeof(display_info));
208 }
209
210 static void
211 virtio_gpu_generate_edid(VirtIOGPU *g, int scanout,
212 struct virtio_gpu_resp_edid *edid)
213 {
214 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g);
215 qemu_edid_info info = {
216 .width_mm = b->req_state[scanout].width_mm,
217 .height_mm = b->req_state[scanout].height_mm,
218 .prefx = b->req_state[scanout].width,
219 .prefy = b->req_state[scanout].height,
220 };
221
222 edid->size = cpu_to_le32(sizeof(edid->edid));
223 qemu_edid_generate(edid->edid, sizeof(edid->edid), &info);
224 }
225
226 void virtio_gpu_get_edid(VirtIOGPU *g,
227 struct virtio_gpu_ctrl_command *cmd)
228 {
229 struct virtio_gpu_resp_edid edid;
230 struct virtio_gpu_cmd_get_edid get_edid;
231 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g);
232
233 VIRTIO_GPU_FILL_CMD(get_edid);
234 virtio_gpu_bswap_32(&get_edid, sizeof(get_edid));
235
236 if (get_edid.scanout >= b->conf.max_outputs) {
237 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
238 return;
239 }
240
241 trace_virtio_gpu_cmd_get_edid(get_edid.scanout);
242 memset(&edid, 0, sizeof(edid));
243 edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID;
244 virtio_gpu_generate_edid(g, get_edid.scanout, &edid);
245 virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid));
246 }
247
248 static uint32_t calc_image_hostmem(pixman_format_code_t pformat,
249 uint32_t width, uint32_t height)
250 {
251 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check.
252 * pixman_image_create_bits will fail in case it overflow.
253 */
254
255 int bpp = PIXMAN_FORMAT_BPP(pformat);
256 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t);
257 return height * stride;
258 }
259
260 static void virtio_gpu_resource_create_2d(VirtIOGPU *g,
261 struct virtio_gpu_ctrl_command *cmd)
262 {
263 pixman_format_code_t pformat;
264 struct virtio_gpu_simple_resource *res;
265 struct virtio_gpu_resource_create_2d c2d;
266
267 VIRTIO_GPU_FILL_CMD(c2d);
268 virtio_gpu_bswap_32(&c2d, sizeof(c2d));
269 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,
270 c2d.width, c2d.height);
271
272 if (c2d.resource_id == 0) {
273 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
274 __func__);
275 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
276 return;
277 }
278
279 res = virtio_gpu_find_resource(g, c2d.resource_id);
280 if (res) {
281 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
282 __func__, c2d.resource_id);
283 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
284 return;
285 }
286
287 res = g_new0(struct virtio_gpu_simple_resource, 1);
288
289 res->width = c2d.width;
290 res->height = c2d.height;
291 res->format = c2d.format;
292 res->resource_id = c2d.resource_id;
293
294 pformat = virtio_gpu_get_pixman_format(c2d.format);
295 if (!pformat) {
296 qemu_log_mask(LOG_GUEST_ERROR,
297 "%s: host couldn't handle guest format %d\n",
298 __func__, c2d.format);
299 g_free(res);
300 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
301 return;
302 }
303
304 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height);
305 if (res->hostmem + g->hostmem < g->conf_max_hostmem) {
306 res->image = pixman_image_create_bits(pformat,
307 c2d.width,
308 c2d.height,
309 NULL, 0);
310 }
311
312 if (!res->image) {
313 qemu_log_mask(LOG_GUEST_ERROR,
314 "%s: resource creation failed %d %d %d\n",
315 __func__, c2d.resource_id, c2d.width, c2d.height);
316 g_free(res);
317 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
318 return;
319 }
320
321 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
322 g->hostmem += res->hostmem;
323 }
324
325 static void virtio_gpu_resource_create_blob(VirtIOGPU *g,
326 struct virtio_gpu_ctrl_command *cmd)
327 {
328 struct virtio_gpu_simple_resource *res;
329 struct virtio_gpu_resource_create_blob cblob;
330 int ret;
331
332 VIRTIO_GPU_FILL_CMD(cblob);
333 virtio_gpu_create_blob_bswap(&cblob);
334 trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size);
335
336 if (cblob.resource_id == 0) {
337 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
338 __func__);
339 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
340 return;
341 }
342
343 res = virtio_gpu_find_resource(g, cblob.resource_id);
344 if (res) {
345 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
346 __func__, cblob.resource_id);
347 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
348 return;
349 }
350
351 res = g_new0(struct virtio_gpu_simple_resource, 1);
352 res->resource_id = cblob.resource_id;
353 res->blob_size = cblob.size;
354
355 if (cblob.blob_mem != VIRTIO_GPU_BLOB_MEM_GUEST &&
356 cblob.blob_flags != VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE) {
357 qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid memory type\n",
358 __func__);
359 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
360 g_free(res);
361 return;
362 }
363
364 if (res->iov) {
365 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
366 return;
367 }
368
369 ret = virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(cblob),
370 cmd, &res->addrs, &res->iov,
371 &res->iov_cnt);
372 if (ret != 0) {
373 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
374 return;
375 }
376
377 virtio_gpu_init_udmabuf(res);
378 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
379 }
380
381 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id)
382 {
383 struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id];
384 struct virtio_gpu_simple_resource *res;
385
386 if (scanout->resource_id == 0) {
387 return;
388 }
389
390 res = virtio_gpu_find_resource(g, scanout->resource_id);
391 if (res) {
392 res->scanout_bitmask &= ~(1 << scanout_id);
393 }
394
395 dpy_gfx_replace_surface(scanout->con, NULL);
396 scanout->resource_id = 0;
397 scanout->ds = NULL;
398 scanout->width = 0;
399 scanout->height = 0;
400 }
401
402 static void virtio_gpu_resource_destroy(VirtIOGPU *g,
403 struct virtio_gpu_simple_resource *res)
404 {
405 int i;
406
407 if (res->scanout_bitmask) {
408 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
409 if (res->scanout_bitmask & (1 << i)) {
410 virtio_gpu_disable_scanout(g, i);
411 }
412 }
413 }
414
415 qemu_pixman_image_unref(res->image);
416 virtio_gpu_cleanup_mapping(g, res);
417 QTAILQ_REMOVE(&g->reslist, res, next);
418 g->hostmem -= res->hostmem;
419 g_free(res);
420 }
421
422 static void virtio_gpu_resource_unref(VirtIOGPU *g,
423 struct virtio_gpu_ctrl_command *cmd)
424 {
425 struct virtio_gpu_simple_resource *res;
426 struct virtio_gpu_resource_unref unref;
427
428 VIRTIO_GPU_FILL_CMD(unref);
429 virtio_gpu_bswap_32(&unref, sizeof(unref));
430 trace_virtio_gpu_cmd_res_unref(unref.resource_id);
431
432 res = virtio_gpu_find_resource(g, unref.resource_id);
433 if (!res) {
434 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
435 __func__, unref.resource_id);
436 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
437 return;
438 }
439 virtio_gpu_resource_destroy(g, res);
440 }
441
442 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,
443 struct virtio_gpu_ctrl_command *cmd)
444 {
445 struct virtio_gpu_simple_resource *res;
446 int h;
447 uint32_t src_offset, dst_offset, stride;
448 int bpp;
449 pixman_format_code_t format;
450 struct virtio_gpu_transfer_to_host_2d t2d;
451
452 VIRTIO_GPU_FILL_CMD(t2d);
453 virtio_gpu_t2d_bswap(&t2d);
454 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);
455
456 res = virtio_gpu_find_check_resource(g, t2d.resource_id, true,
457 __func__, &cmd->error);
458 if (!res || res->blob) {
459 return;
460 }
461
462 if (t2d.r.x > res->width ||
463 t2d.r.y > res->height ||
464 t2d.r.width > res->width ||
465 t2d.r.height > res->height ||
466 t2d.r.x + t2d.r.width > res->width ||
467 t2d.r.y + t2d.r.height > res->height) {
468 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource"
469 " bounds for resource %d: %d %d %d %d vs %d %d\n",
470 __func__, t2d.resource_id, t2d.r.x, t2d.r.y,
471 t2d.r.width, t2d.r.height, res->width, res->height);
472 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
473 return;
474 }
475
476 format = pixman_image_get_format(res->image);
477 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
478 stride = pixman_image_get_stride(res->image);
479
480 if (t2d.offset || t2d.r.x || t2d.r.y ||
481 t2d.r.width != pixman_image_get_width(res->image)) {
482 void *img_data = pixman_image_get_data(res->image);
483 for (h = 0; h < t2d.r.height; h++) {
484 src_offset = t2d.offset + stride * h;
485 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
486
487 iov_to_buf(res->iov, res->iov_cnt, src_offset,
488 (uint8_t *)img_data
489 + dst_offset, t2d.r.width * bpp);
490 }
491 } else {
492 iov_to_buf(res->iov, res->iov_cnt, 0,
493 pixman_image_get_data(res->image),
494 pixman_image_get_stride(res->image)
495 * pixman_image_get_height(res->image));
496 }
497 }
498
499 static void virtio_gpu_resource_flush(VirtIOGPU *g,
500 struct virtio_gpu_ctrl_command *cmd)
501 {
502 struct virtio_gpu_simple_resource *res;
503 struct virtio_gpu_resource_flush rf;
504 struct virtio_gpu_scanout *scanout;
505 pixman_region16_t flush_region;
506 int i;
507
508 VIRTIO_GPU_FILL_CMD(rf);
509 virtio_gpu_bswap_32(&rf, sizeof(rf));
510 trace_virtio_gpu_cmd_res_flush(rf.resource_id,
511 rf.r.width, rf.r.height, rf.r.x, rf.r.y);
512
513 res = virtio_gpu_find_check_resource(g, rf.resource_id, false,
514 __func__, &cmd->error);
515 if (!res) {
516 return;
517 }
518
519 if (res->blob) {
520 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
521 scanout = &g->parent_obj.scanout[i];
522 if (scanout->resource_id == res->resource_id &&
523 console_has_gl(scanout->con)) {
524 dpy_gl_update(scanout->con, 0, 0, scanout->width,
525 scanout->height);
526 return;
527 }
528 }
529 }
530
531 if (!res->blob &&
532 (rf.r.x > res->width ||
533 rf.r.y > res->height ||
534 rf.r.width > res->width ||
535 rf.r.height > res->height ||
536 rf.r.x + rf.r.width > res->width ||
537 rf.r.y + rf.r.height > res->height)) {
538 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource"
539 " bounds for resource %d: %d %d %d %d vs %d %d\n",
540 __func__, rf.resource_id, rf.r.x, rf.r.y,
541 rf.r.width, rf.r.height, res->width, res->height);
542 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
543 return;
544 }
545
546 pixman_region_init_rect(&flush_region,
547 rf.r.x, rf.r.y, rf.r.width, rf.r.height);
548 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
549 pixman_region16_t region, finalregion;
550 pixman_box16_t *extents;
551
552 if (!(res->scanout_bitmask & (1 << i))) {
553 continue;
554 }
555 scanout = &g->parent_obj.scanout[i];
556
557 pixman_region_init(&finalregion);
558 pixman_region_init_rect(&region, scanout->x, scanout->y,
559 scanout->width, scanout->height);
560
561 pixman_region_intersect(&finalregion, &flush_region, &region);
562 pixman_region_translate(&finalregion, -scanout->x, -scanout->y);
563 extents = pixman_region_extents(&finalregion);
564 /* work out the area we need to update for each console */
565 dpy_gfx_update(g->parent_obj.scanout[i].con,
566 extents->x1, extents->y1,
567 extents->x2 - extents->x1,
568 extents->y2 - extents->y1);
569
570 pixman_region_fini(&region);
571 pixman_region_fini(&finalregion);
572 }
573 pixman_region_fini(&flush_region);
574 }
575
576 static void virtio_unref_resource(pixman_image_t *image, void *data)
577 {
578 pixman_image_unref(data);
579 }
580
581 static void virtio_gpu_update_scanout(VirtIOGPU *g,
582 uint32_t scanout_id,
583 struct virtio_gpu_simple_resource *res,
584 struct virtio_gpu_rect *r)
585 {
586 struct virtio_gpu_simple_resource *ores;
587 struct virtio_gpu_scanout *scanout;
588
589 scanout = &g->parent_obj.scanout[scanout_id];
590 ores = virtio_gpu_find_resource(g, scanout->resource_id);
591 if (ores) {
592 ores->scanout_bitmask &= ~(1 << scanout_id);
593 }
594
595 res->scanout_bitmask |= (1 << scanout_id);
596 scanout->resource_id = res->resource_id;
597 scanout->x = r->x;
598 scanout->y = r->y;
599 scanout->width = r->width;
600 scanout->height = r->height;
601 }
602
603 static void virtio_gpu_do_set_scanout(VirtIOGPU *g,
604 uint32_t scanout_id,
605 struct virtio_gpu_framebuffer *fb,
606 struct virtio_gpu_simple_resource *res,
607 struct virtio_gpu_rect *r,
608 uint32_t *error)
609 {
610 struct virtio_gpu_scanout *scanout;
611 uint8_t *data;
612
613 scanout = &g->parent_obj.scanout[scanout_id];
614
615 if (r->x > fb->width ||
616 r->y > fb->height ||
617 r->width < 16 ||
618 r->height < 16 ||
619 r->width > fb->width ||
620 r->height > fb->height ||
621 r->x + r->width > fb->width ||
622 r->y + r->height > fb->height) {
623 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for"
624 " resource %d, rect (%d,%d)+%d,%d, fb %d %d\n",
625 __func__, scanout_id, res->resource_id,
626 r->x, r->y, r->width, r->height,
627 fb->width, fb->height);
628 *error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
629 return;
630 }
631
632 g->parent_obj.enable = 1;
633
634 if (res->blob) {
635 if (console_has_gl(scanout->con)) {
636 if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb)) {
637 virtio_gpu_update_scanout(g, scanout_id, res, r);
638 return;
639 }
640 }
641
642 data = res->blob;
643 } else {
644 data = (uint8_t *)pixman_image_get_data(res->image);
645 }
646
647 /* create a surface for this scanout */
648 if ((res->blob && !console_has_gl(scanout->con)) ||
649 !scanout->ds ||
650 surface_data(scanout->ds) != data + fb->offset ||
651 scanout->width != r->width ||
652 scanout->height != r->height) {
653 pixman_image_t *rect;
654 void *ptr = data + fb->offset;
655 rect = pixman_image_create_bits(fb->format, r->width, r->height,
656 ptr, fb->stride);
657
658 if (res->image) {
659 pixman_image_ref(res->image);
660 pixman_image_set_destroy_function(rect, virtio_unref_resource,
661 res->image);
662 }
663
664 /* realloc the surface ptr */
665 scanout->ds = qemu_create_displaysurface_pixman(rect);
666 if (!scanout->ds) {
667 *error = VIRTIO_GPU_RESP_ERR_UNSPEC;
668 return;
669 }
670
671 pixman_image_unref(rect);
672 dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con,
673 scanout->ds);
674 }
675
676 virtio_gpu_update_scanout(g, scanout_id, res, r);
677 }
678
679 static void virtio_gpu_set_scanout(VirtIOGPU *g,
680 struct virtio_gpu_ctrl_command *cmd)
681 {
682 struct virtio_gpu_simple_resource *res;
683 struct virtio_gpu_framebuffer fb = { 0 };
684 struct virtio_gpu_set_scanout ss;
685
686 VIRTIO_GPU_FILL_CMD(ss);
687 virtio_gpu_bswap_32(&ss, sizeof(ss));
688 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
689 ss.r.width, ss.r.height, ss.r.x, ss.r.y);
690
691 if (ss.scanout_id >= g->parent_obj.conf.max_outputs) {
692 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
693 __func__, ss.scanout_id);
694 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
695 return;
696 }
697
698 if (ss.resource_id == 0) {
699 virtio_gpu_disable_scanout(g, ss.scanout_id);
700 return;
701 }
702
703 res = virtio_gpu_find_check_resource(g, ss.resource_id, true,
704 __func__, &cmd->error);
705 if (!res) {
706 return;
707 }
708
709 fb.format = pixman_image_get_format(res->image);
710 fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8);
711 fb.width = pixman_image_get_width(res->image);
712 fb.height = pixman_image_get_height(res->image);
713 fb.stride = pixman_image_get_stride(res->image);
714 fb.offset = ss.r.x * fb.bytes_pp + ss.r.y * fb.stride;
715
716 virtio_gpu_do_set_scanout(g, ss.scanout_id,
717 &fb, res, &ss.r, &cmd->error);
718 }
719
720 static void virtio_gpu_set_scanout_blob(VirtIOGPU *g,
721 struct virtio_gpu_ctrl_command *cmd)
722 {
723 struct virtio_gpu_simple_resource *res;
724 struct virtio_gpu_framebuffer fb = { 0 };
725 struct virtio_gpu_set_scanout_blob ss;
726 uint64_t fbend;
727
728 VIRTIO_GPU_FILL_CMD(ss);
729 virtio_gpu_scanout_blob_bswap(&ss);
730 trace_virtio_gpu_cmd_set_scanout_blob(ss.scanout_id, ss.resource_id,
731 ss.r.width, ss.r.height, ss.r.x,
732 ss.r.y);
733
734 if (ss.scanout_id >= g->parent_obj.conf.max_outputs) {
735 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
736 __func__, ss.scanout_id);
737 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
738 return;
739 }
740
741 if (ss.resource_id == 0) {
742 virtio_gpu_disable_scanout(g, ss.scanout_id);
743 return;
744 }
745
746 res = virtio_gpu_find_check_resource(g, ss.resource_id, true,
747 __func__, &cmd->error);
748 if (!res) {
749 return;
750 }
751
752 fb.format = virtio_gpu_get_pixman_format(ss.format);
753 if (!fb.format) {
754 qemu_log_mask(LOG_GUEST_ERROR,
755 "%s: host couldn't handle guest format %d\n",
756 __func__, ss.format);
757 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
758 return;
759 }
760
761 fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8);
762 fb.width = ss.width;
763 fb.height = ss.height;
764 fb.stride = ss.strides[0];
765 fb.offset = ss.offsets[0] + ss.r.x * fb.bytes_pp + ss.r.y * fb.stride;
766
767 fbend = fb.offset;
768 fbend += fb.stride * (ss.r.height - 1);
769 fbend += fb.bytes_pp * ss.r.width;
770 if (fbend > res->blob_size) {
771 qemu_log_mask(LOG_GUEST_ERROR,
772 "%s: fb end out of range\n",
773 __func__);
774 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
775 return;
776 }
777
778 virtio_gpu_do_set_scanout(g, ss.scanout_id,
779 &fb, res, &ss.r, &cmd->error);
780 }
781
782 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
783 uint32_t nr_entries, uint32_t offset,
784 struct virtio_gpu_ctrl_command *cmd,
785 uint64_t **addr, struct iovec **iov,
786 uint32_t *niov)
787 {
788 struct virtio_gpu_mem_entry *ents;
789 size_t esize, s;
790 int e, v;
791
792 if (nr_entries > 16384) {
793 qemu_log_mask(LOG_GUEST_ERROR,
794 "%s: nr_entries is too big (%d > 16384)\n",
795 __func__, nr_entries);
796 return -1;
797 }
798
799 esize = sizeof(*ents) * nr_entries;
800 ents = g_malloc(esize);
801 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
802 offset, ents, esize);
803 if (s != esize) {
804 qemu_log_mask(LOG_GUEST_ERROR,
805 "%s: command data size incorrect %zu vs %zu\n",
806 __func__, s, esize);
807 g_free(ents);
808 return -1;
809 }
810
811 *iov = NULL;
812 if (addr) {
813 *addr = NULL;
814 }
815 for (e = 0, v = 0; e < nr_entries; e++) {
816 uint64_t a = le64_to_cpu(ents[e].addr);
817 uint32_t l = le32_to_cpu(ents[e].length);
818 hwaddr len;
819 void *map;
820
821 do {
822 len = l;
823 map = dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
824 a, &len, DMA_DIRECTION_TO_DEVICE);
825 if (!map) {
826 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
827 " element %d\n", __func__, e);
828 virtio_gpu_cleanup_mapping_iov(g, *iov, v);
829 g_free(ents);
830 *iov = NULL;
831 if (addr) {
832 g_free(*addr);
833 *addr = NULL;
834 }
835 return -1;
836 }
837
838 if (!(v % 16)) {
839 *iov = g_realloc(*iov, sizeof(struct iovec) * (v + 16));
840 if (addr) {
841 *addr = g_realloc(*addr, sizeof(uint64_t) * (v + 16));
842 }
843 }
844 (*iov)[v].iov_base = map;
845 (*iov)[v].iov_len = len;
846 if (addr) {
847 (*addr)[v] = a;
848 }
849
850 a += len;
851 l -= len;
852 v += 1;
853 } while (l > 0);
854 }
855 *niov = v;
856
857 g_free(ents);
858 return 0;
859 }
860
861 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
862 struct iovec *iov, uint32_t count)
863 {
864 int i;
865
866 for (i = 0; i < count; i++) {
867 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as,
868 iov[i].iov_base, iov[i].iov_len,
869 DMA_DIRECTION_TO_DEVICE,
870 iov[i].iov_len);
871 }
872 g_free(iov);
873 }
874
875 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
876 struct virtio_gpu_simple_resource *res)
877 {
878 virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
879 res->iov = NULL;
880 res->iov_cnt = 0;
881 g_free(res->addrs);
882 res->addrs = NULL;
883
884 if (res->blob) {
885 virtio_gpu_fini_udmabuf(res);
886 }
887 }
888
889 static void
890 virtio_gpu_resource_attach_backing(VirtIOGPU *g,
891 struct virtio_gpu_ctrl_command *cmd)
892 {
893 struct virtio_gpu_simple_resource *res;
894 struct virtio_gpu_resource_attach_backing ab;
895 int ret;
896
897 VIRTIO_GPU_FILL_CMD(ab);
898 virtio_gpu_bswap_32(&ab, sizeof(ab));
899 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);
900
901 res = virtio_gpu_find_resource(g, ab.resource_id);
902 if (!res) {
903 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
904 __func__, ab.resource_id);
905 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
906 return;
907 }
908
909 if (res->iov) {
910 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
911 return;
912 }
913
914 ret = virtio_gpu_create_mapping_iov(g, ab.nr_entries, sizeof(ab), cmd,
915 &res->addrs, &res->iov, &res->iov_cnt);
916 if (ret != 0) {
917 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
918 return;
919 }
920 }
921
922 static void
923 virtio_gpu_resource_detach_backing(VirtIOGPU *g,
924 struct virtio_gpu_ctrl_command *cmd)
925 {
926 struct virtio_gpu_simple_resource *res;
927 struct virtio_gpu_resource_detach_backing detach;
928
929 VIRTIO_GPU_FILL_CMD(detach);
930 virtio_gpu_bswap_32(&detach, sizeof(detach));
931 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);
932
933 res = virtio_gpu_find_check_resource(g, detach.resource_id, true,
934 __func__, &cmd->error);
935 if (!res) {
936 return;
937 }
938 virtio_gpu_cleanup_mapping(g, res);
939 }
940
941 void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
942 struct virtio_gpu_ctrl_command *cmd)
943 {
944 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
945 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);
946
947 switch (cmd->cmd_hdr.type) {
948 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
949 virtio_gpu_get_display_info(g, cmd);
950 break;
951 case VIRTIO_GPU_CMD_GET_EDID:
952 virtio_gpu_get_edid(g, cmd);
953 break;
954 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
955 virtio_gpu_resource_create_2d(g, cmd);
956 break;
957 case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB:
958 if (!virtio_gpu_blob_enabled(g->parent_obj.conf)) {
959 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
960 break;
961 }
962 virtio_gpu_resource_create_blob(g, cmd);
963 break;
964 case VIRTIO_GPU_CMD_RESOURCE_UNREF:
965 virtio_gpu_resource_unref(g, cmd);
966 break;
967 case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
968 virtio_gpu_resource_flush(g, cmd);
969 break;
970 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
971 virtio_gpu_transfer_to_host_2d(g, cmd);
972 break;
973 case VIRTIO_GPU_CMD_SET_SCANOUT:
974 virtio_gpu_set_scanout(g, cmd);
975 break;
976 case VIRTIO_GPU_CMD_SET_SCANOUT_BLOB:
977 if (!virtio_gpu_blob_enabled(g->parent_obj.conf)) {
978 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
979 break;
980 }
981 virtio_gpu_set_scanout_blob(g, cmd);
982 break;
983 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
984 virtio_gpu_resource_attach_backing(g, cmd);
985 break;
986 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
987 virtio_gpu_resource_detach_backing(g, cmd);
988 break;
989 default:
990 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
991 break;
992 }
993 if (!cmd->finished) {
994 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error :
995 VIRTIO_GPU_RESP_OK_NODATA);
996 }
997 }
998
999 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq)
1000 {
1001 VirtIOGPU *g = VIRTIO_GPU(vdev);
1002 qemu_bh_schedule(g->ctrl_bh);
1003 }
1004
1005 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq)
1006 {
1007 VirtIOGPU *g = VIRTIO_GPU(vdev);
1008 qemu_bh_schedule(g->cursor_bh);
1009 }
1010
1011 void virtio_gpu_process_cmdq(VirtIOGPU *g)
1012 {
1013 struct virtio_gpu_ctrl_command *cmd;
1014 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
1015
1016 if (g->processing_cmdq) {
1017 return;
1018 }
1019 g->processing_cmdq = true;
1020 while (!QTAILQ_EMPTY(&g->cmdq)) {
1021 cmd = QTAILQ_FIRST(&g->cmdq);
1022
1023 if (g->parent_obj.renderer_blocked) {
1024 break;
1025 }
1026
1027 /* process command */
1028 vgc->process_cmd(g, cmd);
1029
1030 QTAILQ_REMOVE(&g->cmdq, cmd, next);
1031 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
1032 g->stats.requests++;
1033 }
1034
1035 if (!cmd->finished) {
1036 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next);
1037 g->inflight++;
1038 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
1039 if (g->stats.max_inflight < g->inflight) {
1040 g->stats.max_inflight = g->inflight;
1041 }
1042 fprintf(stderr, "inflight: %3d (+)\r", g->inflight);
1043 }
1044 } else {
1045 g_free(cmd);
1046 }
1047 }
1048 g->processing_cmdq = false;
1049 }
1050
1051 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
1052 {
1053 VirtIOGPU *g = VIRTIO_GPU(vdev);
1054 struct virtio_gpu_ctrl_command *cmd;
1055
1056 if (!virtio_queue_ready(vq)) {
1057 return;
1058 }
1059
1060 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
1061 while (cmd) {
1062 cmd->vq = vq;
1063 cmd->error = 0;
1064 cmd->finished = false;
1065 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);
1066 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
1067 }
1068
1069 virtio_gpu_process_cmdq(g);
1070 }
1071
1072 static void virtio_gpu_ctrl_bh(void *opaque)
1073 {
1074 VirtIOGPU *g = opaque;
1075 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
1076
1077 vgc->handle_ctrl(&g->parent_obj.parent_obj, g->ctrl_vq);
1078 }
1079
1080 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)
1081 {
1082 VirtIOGPU *g = VIRTIO_GPU(vdev);
1083 VirtQueueElement *elem;
1084 size_t s;
1085 struct virtio_gpu_update_cursor cursor_info;
1086
1087 if (!virtio_queue_ready(vq)) {
1088 return;
1089 }
1090 for (;;) {
1091 elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
1092 if (!elem) {
1093 break;
1094 }
1095
1096 s = iov_to_buf(elem->out_sg, elem->out_num, 0,
1097 &cursor_info, sizeof(cursor_info));
1098 if (s != sizeof(cursor_info)) {
1099 qemu_log_mask(LOG_GUEST_ERROR,
1100 "%s: cursor size incorrect %zu vs %zu\n",
1101 __func__, s, sizeof(cursor_info));
1102 } else {
1103 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info));
1104 update_cursor(g, &cursor_info);
1105 }
1106 virtqueue_push(vq, elem, 0);
1107 virtio_notify(vdev, vq);
1108 g_free(elem);
1109 }
1110 }
1111
1112 static void virtio_gpu_cursor_bh(void *opaque)
1113 {
1114 VirtIOGPU *g = opaque;
1115 virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq);
1116 }
1117
1118 static const VMStateDescription vmstate_virtio_gpu_scanout = {
1119 .name = "virtio-gpu-one-scanout",
1120 .version_id = 1,
1121 .fields = (VMStateField[]) {
1122 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
1123 VMSTATE_UINT32(width, struct virtio_gpu_scanout),
1124 VMSTATE_UINT32(height, struct virtio_gpu_scanout),
1125 VMSTATE_INT32(x, struct virtio_gpu_scanout),
1126 VMSTATE_INT32(y, struct virtio_gpu_scanout),
1127 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout),
1128 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout),
1129 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout),
1130 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout),
1131 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout),
1132 VMSTATE_END_OF_LIST()
1133 },
1134 };
1135
1136 static const VMStateDescription vmstate_virtio_gpu_scanouts = {
1137 .name = "virtio-gpu-scanouts",
1138 .version_id = 1,
1139 .fields = (VMStateField[]) {
1140 VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU),
1141 VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs,
1142 struct VirtIOGPU, NULL),
1143 VMSTATE_STRUCT_VARRAY_UINT32(parent_obj.scanout, struct VirtIOGPU,
1144 parent_obj.conf.max_outputs, 1,
1145 vmstate_virtio_gpu_scanout,
1146 struct virtio_gpu_scanout),
1147 VMSTATE_END_OF_LIST()
1148 },
1149 };
1150
1151 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
1152 const VMStateField *field, JSONWriter *vmdesc)
1153 {
1154 VirtIOGPU *g = opaque;
1155 struct virtio_gpu_simple_resource *res;
1156 int i;
1157
1158 /* in 2d mode we should never find unprocessed commands here */
1159 assert(QTAILQ_EMPTY(&g->cmdq));
1160
1161 QTAILQ_FOREACH(res, &g->reslist, next) {
1162 qemu_put_be32(f, res->resource_id);
1163 qemu_put_be32(f, res->width);
1164 qemu_put_be32(f, res->height);
1165 qemu_put_be32(f, res->format);
1166 qemu_put_be32(f, res->iov_cnt);
1167 for (i = 0; i < res->iov_cnt; i++) {
1168 qemu_put_be64(f, res->addrs[i]);
1169 qemu_put_be32(f, res->iov[i].iov_len);
1170 }
1171 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image),
1172 pixman_image_get_stride(res->image) * res->height);
1173 }
1174 qemu_put_be32(f, 0); /* end of list */
1175
1176 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
1177 }
1178
1179 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
1180 const VMStateField *field)
1181 {
1182 VirtIOGPU *g = opaque;
1183 struct virtio_gpu_simple_resource *res;
1184 struct virtio_gpu_scanout *scanout;
1185 uint32_t resource_id, pformat;
1186 int i;
1187
1188 g->hostmem = 0;
1189
1190 resource_id = qemu_get_be32(f);
1191 while (resource_id != 0) {
1192 res = virtio_gpu_find_resource(g, resource_id);
1193 if (res) {
1194 return -EINVAL;
1195 }
1196
1197 res = g_new0(struct virtio_gpu_simple_resource, 1);
1198 res->resource_id = resource_id;
1199 res->width = qemu_get_be32(f);
1200 res->height = qemu_get_be32(f);
1201 res->format = qemu_get_be32(f);
1202 res->iov_cnt = qemu_get_be32(f);
1203
1204 /* allocate */
1205 pformat = virtio_gpu_get_pixman_format(res->format);
1206 if (!pformat) {
1207 g_free(res);
1208 return -EINVAL;
1209 }
1210 res->image = pixman_image_create_bits(pformat,
1211 res->width, res->height,
1212 NULL, 0);
1213 if (!res->image) {
1214 g_free(res);
1215 return -EINVAL;
1216 }
1217
1218 res->hostmem = calc_image_hostmem(pformat, res->width, res->height);
1219
1220 res->addrs = g_new(uint64_t, res->iov_cnt);
1221 res->iov = g_new(struct iovec, res->iov_cnt);
1222
1223 /* read data */
1224 for (i = 0; i < res->iov_cnt; i++) {
1225 res->addrs[i] = qemu_get_be64(f);
1226 res->iov[i].iov_len = qemu_get_be32(f);
1227 }
1228 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image),
1229 pixman_image_get_stride(res->image) * res->height);
1230
1231 /* restore mapping */
1232 for (i = 0; i < res->iov_cnt; i++) {
1233 hwaddr len = res->iov[i].iov_len;
1234 res->iov[i].iov_base =
1235 dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
1236 res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE);
1237
1238 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
1239 /* Clean up the half-a-mapping we just created... */
1240 if (res->iov[i].iov_base) {
1241 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as,
1242 res->iov[i].iov_base,
1243 len,
1244 DMA_DIRECTION_TO_DEVICE,
1245 0);
1246 }
1247 /* ...and the mappings for previous loop iterations */
1248 res->iov_cnt = i;
1249 virtio_gpu_cleanup_mapping(g, res);
1250 pixman_image_unref(res->image);
1251 g_free(res);
1252 return -EINVAL;
1253 }
1254 }
1255
1256 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
1257 g->hostmem += res->hostmem;
1258
1259 resource_id = qemu_get_be32(f);
1260 }
1261
1262 /* load & apply scanout state */
1263 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1);
1264 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
1265 scanout = &g->parent_obj.scanout[i];
1266 if (!scanout->resource_id) {
1267 continue;
1268 }
1269 res = virtio_gpu_find_resource(g, scanout->resource_id);
1270 if (!res) {
1271 return -EINVAL;
1272 }
1273 scanout->ds = qemu_create_displaysurface_pixman(res->image);
1274 if (!scanout->ds) {
1275 return -EINVAL;
1276 }
1277
1278 dpy_gfx_replace_surface(scanout->con, scanout->ds);
1279 dpy_gfx_update_full(scanout->con);
1280 if (scanout->cursor.resource_id) {
1281 update_cursor(g, &scanout->cursor);
1282 }
1283 res->scanout_bitmask |= (1 << i);
1284 }
1285
1286 return 0;
1287 }
1288
1289 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
1290 {
1291 VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
1292 VirtIOGPU *g = VIRTIO_GPU(qdev);
1293
1294 if (virtio_gpu_blob_enabled(g->parent_obj.conf)) {
1295 if (!virtio_gpu_have_udmabuf()) {
1296 error_setg(errp, "cannot enable blob resources without udmabuf");
1297 return;
1298 }
1299
1300 if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) {
1301 error_setg(errp, "blobs and virgl are not compatible (yet)");
1302 return;
1303 }
1304 }
1305
1306 if (!virtio_gpu_base_device_realize(qdev,
1307 virtio_gpu_handle_ctrl_cb,
1308 virtio_gpu_handle_cursor_cb,
1309 errp)) {
1310 return;
1311 }
1312
1313 g->ctrl_vq = virtio_get_queue(vdev, 0);
1314 g->cursor_vq = virtio_get_queue(vdev, 1);
1315 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g);
1316 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g);
1317 QTAILQ_INIT(&g->reslist);
1318 QTAILQ_INIT(&g->cmdq);
1319 QTAILQ_INIT(&g->fenceq);
1320 }
1321
1322 void virtio_gpu_reset(VirtIODevice *vdev)
1323 {
1324 VirtIOGPU *g = VIRTIO_GPU(vdev);
1325 struct virtio_gpu_simple_resource *res, *tmp;
1326 struct virtio_gpu_ctrl_command *cmd;
1327
1328 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
1329 virtio_gpu_resource_destroy(g, res);
1330 }
1331
1332 while (!QTAILQ_EMPTY(&g->cmdq)) {
1333 cmd = QTAILQ_FIRST(&g->cmdq);
1334 QTAILQ_REMOVE(&g->cmdq, cmd, next);
1335 g_free(cmd);
1336 }
1337
1338 while (!QTAILQ_EMPTY(&g->fenceq)) {
1339 cmd = QTAILQ_FIRST(&g->fenceq);
1340 QTAILQ_REMOVE(&g->fenceq, cmd, next);
1341 g->inflight--;
1342 g_free(cmd);
1343 }
1344
1345 virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev));
1346 }
1347
1348 static void
1349 virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config)
1350 {
1351 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
1352
1353 memcpy(config, &g->virtio_config, sizeof(g->virtio_config));
1354 }
1355
1356 static void
1357 virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config)
1358 {
1359 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
1360 const struct virtio_gpu_config *vgconfig =
1361 (const struct virtio_gpu_config *)config;
1362
1363 if (vgconfig->events_clear) {
1364 g->virtio_config.events_read &= ~vgconfig->events_clear;
1365 }
1366 }
1367
1368 /*
1369 * For historical reasons virtio_gpu does not adhere to virtio migration
1370 * scheme as described in doc/virtio-migration.txt, in a sense that no
1371 * save/load callback are provided to the core. Instead the device data
1372 * is saved/loaded after the core data.
1373 *
1374 * Because of this we need a special vmsd.
1375 */
1376 static const VMStateDescription vmstate_virtio_gpu = {
1377 .name = "virtio-gpu",
1378 .minimum_version_id = VIRTIO_GPU_VM_VERSION,
1379 .version_id = VIRTIO_GPU_VM_VERSION,
1380 .fields = (VMStateField[]) {
1381 VMSTATE_VIRTIO_DEVICE /* core */,
1382 {
1383 .name = "virtio-gpu",
1384 .info = &(const VMStateInfo) {
1385 .name = "virtio-gpu",
1386 .get = virtio_gpu_load,
1387 .put = virtio_gpu_save,
1388 },
1389 .flags = VMS_SINGLE,
1390 } /* device */,
1391 VMSTATE_END_OF_LIST()
1392 },
1393 };
1394
1395 static Property virtio_gpu_properties[] = {
1396 VIRTIO_GPU_BASE_PROPERTIES(VirtIOGPU, parent_obj.conf),
1397 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf_max_hostmem,
1398 256 * MiB),
1399 DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
1400 VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
1401 DEFINE_PROP_END_OF_LIST(),
1402 };
1403
1404 static void virtio_gpu_class_init(ObjectClass *klass, void *data)
1405 {
1406 DeviceClass *dc = DEVICE_CLASS(klass);
1407 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
1408 VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass);
1409
1410 vgc->handle_ctrl = virtio_gpu_handle_ctrl;
1411 vgc->process_cmd = virtio_gpu_simple_process_cmd;
1412 vgc->update_cursor_data = virtio_gpu_update_cursor_data;
1413
1414 vdc->realize = virtio_gpu_device_realize;
1415 vdc->reset = virtio_gpu_reset;
1416 vdc->get_config = virtio_gpu_get_config;
1417 vdc->set_config = virtio_gpu_set_config;
1418
1419 dc->vmsd = &vmstate_virtio_gpu;
1420 device_class_set_props(dc, virtio_gpu_properties);
1421 }
1422
1423 static const TypeInfo virtio_gpu_info = {
1424 .name = TYPE_VIRTIO_GPU,
1425 .parent = TYPE_VIRTIO_GPU_BASE,
1426 .instance_size = sizeof(VirtIOGPU),
1427 .class_size = sizeof(VirtIOGPUClass),
1428 .class_init = virtio_gpu_class_init,
1429 };
1430
1431 static void virtio_register_types(void)
1432 {
1433 type_register_static(&virtio_gpu_info);
1434 }
1435
1436 type_init(virtio_register_types)
AR7 emulation for QEMU