target/xtensa/dbg_helper.c

   1 /*
   2  * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "qemu/osdep.h"
  29 #include "qemu/log.h"
  30 #include "cpu.h"
  31 #include "exec/helper-proto.h"
  32 #include "qemu/host-utils.h"
  33 #include "exec/exec-all.h"
  34 #include "exec/address-spaces.h"
  35
  36 void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
  37 {
  38     CPUState *cs = env_cpu(env);
  39     uint32_t change = v ^ env->sregs[IBREAKENABLE];
  40     unsigned i;
  41
  42     for (i = 0; i < env->config->nibreak; ++i) {
  43         if (change & (1 << i)) {
  44             if (v & (1 << i)) {
  45                 cpu_breakpoint_insert(cs, env->sregs[IBREAKA + i],
  46                                       BP_CPU, &env->cpu_breakpoint[i]);
  47             } else {
  48                 cpu_breakpoint_remove_by_ref(cs, env->cpu_breakpoint[i]);
  49                 env->cpu_breakpoint[i] = NULL;
  50             }
  51         }
  52     }
  53     env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1);
  54 }
  55
  56 void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
  57 {
  58     if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) {
  59         CPUState *cs = env_cpu(env);
  60
  61         cpu_breakpoint_remove_by_ref(cs, env->cpu_breakpoint[i]);
  62         cpu_breakpoint_insert(cs, v, BP_CPU, &env->cpu_breakpoint[i]);
  63     }
  64     env->sregs[IBREAKA + i] = v;
  65 }
  66
  67 bool xtensa_debug_check_breakpoint(CPUState *cs)
  68 {
  69     CPUXtensaState *env = cpu_env(cs);
  70     unsigned int i;
  71
  72     if (xtensa_get_cintlevel(env) >= env->config->debug_level) {
  73         return false;
  74     }
  75     for (i = 0; i < env->config->nibreak; ++i) {
  76         if (env->sregs[IBREAKENABLE] & (1 << i) &&
  77             env->sregs[IBREAKA + i] == env->pc) {
  78             return true;
  79         }
  80     }
  81     return false;
  82 }
  83
  84 static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka,
  85         uint32_t dbreakc)
  86 {
  87     CPUState *cs = env_cpu(env);
  88     int flags = BP_CPU | BP_STOP_BEFORE_ACCESS;
  89     uint32_t mask = dbreakc | ~DBREAKC_MASK;
  90
  91     if (env->cpu_watchpoint[i]) {
  92         cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
  93     }
  94     if (dbreakc & DBREAKC_SB) {
  95         flags |= BP_MEM_WRITE;
  96     }
  97     if (dbreakc & DBREAKC_LB) {
  98         flags |= BP_MEM_READ;
  99     }
 100     /* contiguous mask after inversion is one less than some power of 2 */
 101     if ((~mask + 1) & ~mask) {
 102         qemu_log_mask(LOG_GUEST_ERROR,
 103                       "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc);
 104         /* cut mask after the first zero bit */
 105         mask = 0xffffffff << (32 - clo32(mask));
 106     }
 107     if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1,
 108                               flags, &env->cpu_watchpoint[i])) {
 109         env->cpu_watchpoint[i] = NULL;
 110         qemu_log_mask(LOG_GUEST_ERROR,
 111                       "Failed to set data breakpoint at 0x%08x/%d\n",
 112                       dbreaka & mask, ~mask + 1);
 113     }
 114 }
 115
 116 void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
 117 {
 118     uint32_t dbreakc = env->sregs[DBREAKC + i];
 119
 120     if ((dbreakc & DBREAKC_SB_LB) &&
 121         env->sregs[DBREAKA + i] != v) {
 122         set_dbreak(env, i, v, dbreakc);
 123     }
 124     env->sregs[DBREAKA + i] = v;
 125 }
 126
 127 void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v)
 128 {
 129     if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) {
 130         if (v & DBREAKC_SB_LB) {
 131             set_dbreak(env, i, env->sregs[DBREAKA + i], v);
 132         } else {
 133             if (env->cpu_watchpoint[i]) {
 134                 CPUState *cs = env_cpu(env);
 135
 136                 cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
 137                 env->cpu_watchpoint[i] = NULL;
 138             }
 139         }
 140     }
 141     env->sregs[DBREAKC + i] = v;
 142 }