Merge tag 'v9.0.0-rc3'
[qemu/ar7.git] / target / tricore / helper.c
blob76bd2263708e4b499799c4e84151c576ccd55b45
1 /*
2 * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 #include "qemu/osdep.h"
19 #include "qemu/log.h"
20 #include "hw/registerfields.h"
21 #include "cpu.h"
22 #include "exec/exec-all.h"
23 #include "fpu/softfloat-helpers.h"
24 #include "qemu/qemu-print.h"
26 enum {
27 TLBRET_DIRTY = -4,
28 TLBRET_INVALID = -3,
29 TLBRET_NOMATCH = -2,
30 TLBRET_BADADDR = -1,
31 TLBRET_MATCH = 0
34 static int get_physical_address(CPUTriCoreState *env, hwaddr *physical,
35 int *prot, target_ulong address,
36 MMUAccessType access_type, int mmu_idx)
38 int ret = TLBRET_MATCH;
40 *physical = address & 0xFFFFFFFF;
41 *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
43 return ret;
46 hwaddr tricore_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
48 TriCoreCPU *cpu = TRICORE_CPU(cs);
49 hwaddr phys_addr;
50 int prot;
51 int mmu_idx = cpu_mmu_index(cs, false);
53 if (get_physical_address(&cpu->env, &phys_addr, &prot, addr,
54 MMU_DATA_LOAD, mmu_idx)) {
55 return -1;
57 return phys_addr;
60 /* TODO: Add exception support */
61 static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
62 int rw, int tlb_error)
66 bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
67 MMUAccessType rw, int mmu_idx,
68 bool probe, uintptr_t retaddr)
70 CPUTriCoreState *env = cpu_env(cs);
71 hwaddr physical;
72 int prot;
73 int ret = 0;
75 rw &= 1;
76 ret = get_physical_address(env, &physical, &prot,
77 address, rw, mmu_idx);
79 qemu_log_mask(CPU_LOG_MMU, "%s address=0x%" VADDR_PRIx " ret %d physical "
80 HWADDR_FMT_plx " prot %d\n",
81 __func__, address, ret, physical, prot);
83 if (ret == TLBRET_MATCH) {
84 tlb_set_page(cs, address & TARGET_PAGE_MASK,
85 physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
86 mmu_idx, TARGET_PAGE_SIZE);
87 return true;
88 } else {
89 assert(ret < 0);
90 if (probe) {
91 return false;
93 raise_mmu_exception(env, address, rw, ret);
94 cpu_loop_exit_restore(cs, retaddr);
98 void fpu_set_state(CPUTriCoreState *env)
100 switch (extract32(env->PSW, 24, 2)) {
101 case 0:
102 set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
103 break;
104 case 1:
105 set_float_rounding_mode(float_round_up, &env->fp_status);
106 break;
107 case 2:
108 set_float_rounding_mode(float_round_down, &env->fp_status);
109 break;
110 case 3:
111 set_float_rounding_mode(float_round_to_zero, &env->fp_status);
112 break;
115 set_flush_inputs_to_zero(1, &env->fp_status);
116 set_flush_to_zero(1, &env->fp_status);
117 set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
118 set_default_nan_mode(1, &env->fp_status);
121 uint32_t psw_read(CPUTriCoreState *env)
123 /* clear all USB bits */
124 env->PSW &= 0x7ffffff;
125 /* now set them from the cache */
126 env->PSW |= ((env->PSW_USB_C != 0) << 31);
127 env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1);
128 env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2);
129 env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3);
130 env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4);
132 return env->PSW;
135 void psw_write(CPUTriCoreState *env, uint32_t val)
137 env->PSW_USB_C = (val & MASK_USB_C);
138 env->PSW_USB_V = (val & MASK_USB_V) << 1;
139 env->PSW_USB_SV = (val & MASK_USB_SV) << 2;
140 env->PSW_USB_AV = (val & MASK_USB_AV) << 3;
141 env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4;
142 env->PSW = val;
144 fpu_set_state(env);
147 #define FIELD_GETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \
148 uint32_t NAME(CPUTriCoreState *env) \
150 if (tricore_has_feature(env, TRICORE_FEATURE_##FEATURE)) { \
151 return FIELD_EX32(env->REG, REG, FIELD ## _ ## FEATURE); \
153 return FIELD_EX32(env->REG, REG, FIELD ## _13); \
156 #define FIELD_GETTER(NAME, REG, FIELD) \
157 uint32_t NAME(CPUTriCoreState *env) \
159 return FIELD_EX32(env->REG, REG, FIELD); \
162 #define FIELD_SETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \
163 void NAME(CPUTriCoreState *env, uint32_t val) \
165 if (tricore_has_feature(env, TRICORE_FEATURE_##FEATURE)) { \
166 env->REG = FIELD_DP32(env->REG, REG, FIELD ## _ ## FEATURE, val); \
168 env->REG = FIELD_DP32(env->REG, REG, FIELD ## _13, val); \
171 #define FIELD_SETTER(NAME, REG, FIELD) \
172 void NAME(CPUTriCoreState *env, uint32_t val) \
174 env->REG = FIELD_DP32(env->REG, REG, FIELD, val); \
177 FIELD_GETTER_WITH_FEATURE(pcxi_get_pcpn, PCXI, PCPN, 161)
178 FIELD_SETTER_WITH_FEATURE(pcxi_set_pcpn, PCXI, PCPN, 161)
179 FIELD_GETTER_WITH_FEATURE(pcxi_get_pie, PCXI, PIE, 161)
180 FIELD_SETTER_WITH_FEATURE(pcxi_set_pie, PCXI, PIE, 161)
181 FIELD_GETTER_WITH_FEATURE(pcxi_get_ul, PCXI, UL, 161)
182 FIELD_SETTER_WITH_FEATURE(pcxi_set_ul, PCXI, UL, 161)
183 FIELD_GETTER(pcxi_get_pcxs, PCXI, PCXS)
184 FIELD_GETTER(pcxi_get_pcxo, PCXI, PCXO)
186 FIELD_GETTER_WITH_FEATURE(icr_get_ie, ICR, IE, 161)
187 FIELD_SETTER_WITH_FEATURE(icr_set_ie, ICR, IE, 161)
188 FIELD_GETTER(icr_get_ccpn, ICR, CCPN)
189 FIELD_SETTER(icr_set_ccpn, ICR, CCPN)