target/arm/cpu-qom.h

   1 /*
   2  * QEMU ARM CPU QOM header (target agnostic)
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_ARM_CPU_QOM_H
  21 #define QEMU_ARM_CPU_QOM_H
  22
  23 #include "hw/core/cpu.h"
  24
  25 #define TYPE_ARM_CPU "arm-cpu"
  26
  27 OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
  28
  29 #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
  30
  31 #define TYPE_AARCH64_CPU "aarch64-cpu"
  32 typedef struct AArch64CPUClass AArch64CPUClass;
  33 DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
  34                        TYPE_AARCH64_CPU)
  35
  36 #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
  37 #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
  38
  39 /* Meanings of the ARMCPU object's four inbound GPIO lines */
  40 #define ARM_CPU_IRQ 0
  41 #define ARM_CPU_FIQ 1
  42 #define ARM_CPU_VIRQ 2
  43 #define ARM_CPU_VFIQ 3
  44
  45 /* For M profile, some registers are banked secure vs non-secure;
  46  * these are represented as a 2-element array where the first element
  47  * is the non-secure copy and the second is the secure copy.
  48  * When the CPU does not have implement the security extension then
  49  * only the first element is used.
  50  * This means that the copy for the current security state can be
  51  * accessed via env->registerfield[env->v7m.secure] (whether the security
  52  * extension is implemented or not).
  53  */
  54 enum {
  55     M_REG_NS = 0,
  56     M_REG_S = 1,
  57     M_REG_NUM_BANKS = 2,
  58 };
  59
  60 #endif