Merge remote-tracking branch 'qemu-project/master'
[qemu/ar7.git] / target / arm / cpu-qom.h
blobb497667d61e3aff78f7d10c34227210774533222
1 /*
2 * QEMU ARM CPU QOM header (target agnostic)
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
20 #ifndef QEMU_ARM_CPU_QOM_H
21 #define QEMU_ARM_CPU_QOM_H
23 #include "hw/core/cpu.h"
25 #define TYPE_ARM_CPU "arm-cpu"
27 OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
29 #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
31 #define TYPE_AARCH64_CPU "aarch64-cpu"
32 typedef struct AArch64CPUClass AArch64CPUClass;
33 DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
34 TYPE_AARCH64_CPU)
36 #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
37 #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
39 /* Meanings of the ARMCPU object's seven inbound GPIO lines */
40 #define ARM_CPU_IRQ 0
41 #define ARM_CPU_FIQ 1
42 #define ARM_CPU_VIRQ 2
43 #define ARM_CPU_VFIQ 3
44 #define ARM_CPU_NMI 4
45 #define ARM_CPU_VINMI 5
46 #define ARM_CPU_VFNMI 6
48 /* For M profile, some registers are banked secure vs non-secure;
49 * these are represented as a 2-element array where the first element
50 * is the non-secure copy and the second is the secure copy.
51 * When the CPU does not have implement the security extension then
52 * only the first element is used.
53 * This means that the copy for the current security state can be
54 * accessed via env->registerfield[env->v7m.secure] (whether the security
55 * extension is implemented or not).
57 enum {
58 M_REG_NS = 0,
59 M_REG_S = 1,
60 M_REG_NUM_BANKS = 2,
63 #endif