linux-user/microblaze/cpu_loop.c

   1 /*
   2  *  qemu user cpu loop
   3  *
   4  *  Copyright (c) 2003-2008 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu.h"
  22 #include "user-internals.h"
  23 #include "cpu_loop-common.h"
  24 #include "signal-common.h"
  25
  26 void cpu_loop(CPUMBState *env)
  27 {
  28     int trapnr, ret, si_code, sig;
  29     CPUState *cs = env_cpu(env);
  30
  31     while (1) {
  32         cpu_exec_start(cs);
  33         trapnr = cpu_exec(cs);
  34         cpu_exec_end(cs);
  35         process_queued_cpu_work(cs);
  36
  37         switch (trapnr) {
  38         case EXCP_INTERRUPT:
  39             /* just indicate that signals should be handled asap */
  40             break;
  41         case EXCP_SYSCALL:
  42             /* Return address is 4 bytes after the call.  */
  43             env->regs[14] += 4;
  44             env->pc = env->regs[14];
  45             ret = do_syscall(env,
  46                              env->regs[12],
  47                              env->regs[5],
  48                              env->regs[6],
  49                              env->regs[7],
  50                              env->regs[8],
  51                              env->regs[9],
  52                              env->regs[10],
  53                              0, 0);
  54             if (ret == -QEMU_ERESTARTSYS) {
  55                 /* Wind back to before the syscall. */
  56                 env->pc -= 4;
  57             } else if (ret != -QEMU_ESIGRETURN) {
  58                 env->regs[3] = ret;
  59             }
  60             /* All syscall exits result in guest r14 being equal to the
  61              * PC we return to, because the kernel syscall exit "rtbd" does
  62              * this. (This is true even for sigreturn(); note that r14 is
  63              * not a userspace-usable register, as the kernel may clobber it
  64              * at any point.)
  65              */
  66             env->regs[14] = env->pc;
  67             break;
  68
  69         case EXCP_HW_EXCP:
  70             env->regs[17] = env->pc + 4;
  71             if (env->iflags & D_FLAG) {
  72                 env->esr |= 1 << 12;
  73                 env->pc -= 4;
  74                 /* FIXME: if branch was immed, replay the imm as well.  */
  75             }
  76             env->iflags &= ~(IMM_FLAG | D_FLAG);
  77             switch (env->esr & 31) {
  78             case ESR_EC_DIVZERO:
  79                 sig = TARGET_SIGFPE;
  80                 si_code = TARGET_FPE_INTDIV;
  81                 break;
  82             case ESR_EC_FPU:
  83                 /*
  84                  * Note that the kernel passes along fsr as si_code
  85                  * if there's no recognized bit set.  Possibly this
  86                  * implies that si_code is 0, but follow the structure.
  87                  */
  88                 sig = TARGET_SIGFPE;
  89                 si_code = env->fsr;
  90                 if (si_code & FSR_IO) {
  91                     si_code = TARGET_FPE_FLTINV;
  92                 } else if (si_code & FSR_OF) {
  93                     si_code = TARGET_FPE_FLTOVF;
  94                 } else if (si_code & FSR_UF) {
  95                     si_code = TARGET_FPE_FLTUND;
  96                 } else if (si_code & FSR_DZ) {
  97                     si_code = TARGET_FPE_FLTDIV;
  98                 } else if (si_code & FSR_DO) {
  99                     si_code = TARGET_FPE_FLTRES;
 100                 }
 101                 break;
 102             case ESR_EC_PRIVINSN:
 103                 sig = SIGILL;
 104                 si_code = ILL_PRVOPC;
 105                 break;
 106             default:
 107                 fprintf(stderr, "Unhandled hw-exception: 0x%x\n",
 108                         env->esr & ESR_EC_MASK);
 109                 cpu_dump_state(cs, stderr, 0);
 110                 exit(EXIT_FAILURE);
 111             }
 112             force_sig_fault(sig, si_code, env->pc);
 113             break;
 114
 115         case EXCP_DEBUG:
 116             force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
 117             break;
 118         case EXCP_ATOMIC:
 119             cpu_exec_step_atomic(cs);
 120             break;
 121         default:
 122             fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
 123             cpu_dump_state(cs, stderr, 0);
 124             exit(EXIT_FAILURE);
 125         }
 126         process_pending_signals (env);
 127     }
 128 }
 129
 130 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
 131 {
 132     env->regs[0] = regs->r0;
 133     env->regs[1] = regs->r1;
 134     env->regs[2] = regs->r2;
 135     env->regs[3] = regs->r3;
 136     env->regs[4] = regs->r4;
 137     env->regs[5] = regs->r5;
 138     env->regs[6] = regs->r6;
 139     env->regs[7] = regs->r7;
 140     env->regs[8] = regs->r8;
 141     env->regs[9] = regs->r9;
 142     env->regs[10] = regs->r10;
 143     env->regs[11] = regs->r11;
 144     env->regs[12] = regs->r12;
 145     env->regs[13] = regs->r13;
 146     env->regs[14] = regs->r14;
 147     env->regs[15] = regs->r15;
 148     env->regs[16] = regs->r16;
 149     env->regs[17] = regs->r17;
 150     env->regs[18] = regs->r18;
 151     env->regs[19] = regs->r19;
 152     env->regs[20] = regs->r20;
 153     env->regs[21] = regs->r21;
 154     env->regs[22] = regs->r22;
 155     env->regs[23] = regs->r23;
 156     env->regs[24] = regs->r24;
 157     env->regs[25] = regs->r25;
 158     env->regs[26] = regs->r26;
 159     env->regs[27] = regs->r27;
 160     env->regs[28] = regs->r28;
 161     env->regs[29] = regs->r29;
 162     env->regs[30] = regs->r30;
 163     env->regs[31] = regs->r31;
 164     env->pc = regs->pc;
 165 }