include/hw/ssi/bcm2835_spi.h

   1 /*
   2  * BCM2835 SPI Master Controller
   3  *
   4  * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw/sysbus.h"
  26 #include "hw/ssi/ssi.h"
  27 #include "qom/object.h"
  28 #include "qemu/fifo8.h"
  29
  30 #define TYPE_BCM2835_SPI "bcm2835-spi"
  31 OBJECT_DECLARE_SIMPLE_TYPE(BCM2835SPIState, BCM2835_SPI)
  32
  33 /*
  34  * Though BCM2835 documentation says FIFOs have a capacity of 16,
  35  * FIFOs are actually 16 words in size or effectively 64 bytes when operating
  36  * in non DMA mode.
  37  */
  38 #define FIFO_SIZE               64
  39 #define FIFO_SIZE_3_4           48
  40
  41 #define RO_MASK                 0x1f0000
  42
  43 #define BCM2835_SPI_CS          0x00
  44 #define BCM2835_SPI_FIFO        0x04
  45 #define BCM2835_SPI_CLK         0x08
  46 #define BCM2835_SPI_DLEN        0x0c
  47 #define BCM2835_SPI_LTOH        0x10
  48 #define BCM2835_SPI_DC          0x14
  49
  50 #define BCM2835_SPI_CS_RXF      BIT(20)
  51 #define BCM2835_SPI_CS_RXR      BIT(19)
  52 #define BCM2835_SPI_CS_TXD      BIT(18)
  53 #define BCM2835_SPI_CS_RXD      BIT(17)
  54 #define BCM2835_SPI_CS_DONE     BIT(16)
  55 #define BCM2835_SPI_CS_LEN      BIT(13)
  56 #define BCM2835_SPI_CS_REN      BIT(12)
  57 #define BCM2835_SPI_CS_INTR     BIT(10)
  58 #define BCM2835_SPI_CS_INTD     BIT(9)
  59 #define BCM2835_SPI_CS_DMAEN    BIT(8)
  60 #define BCM2835_SPI_CS_TA       BIT(7)
  61 #define BCM2835_SPI_CLEAR_RX    BIT(5)
  62 #define BCM2835_SPI_CLEAR_TX    BIT(4)
  63
  64 struct BCM2835SPIState {
  65     /* <private> */
  66     SysBusDevice parent_obj;
  67
  68     /* <public> */
  69     SSIBus *bus;
  70     MemoryRegion iomem;
  71     qemu_irq irq;
  72
  73     uint32_t cs;
  74     uint32_t clk;
  75     uint32_t dlen;
  76     uint32_t ltoh;
  77     uint32_t dc;
  78
  79     Fifo8 tx_fifo;
  80     Fifo8 rx_fifo;
  81 };