include/hw/pci/pcie.h

   1 /*
   2  * pcie.h
   3  *
   4  * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #ifndef QEMU_PCIE_H
  22 #define QEMU_PCIE_H
  23
  24 #include "hw/pci/pci_regs.h"
  25 #include "hw/pci/pcie_regs.h"
  26 #include "hw/pci/pcie_aer.h"
  27 #include "hw/pci/pcie_sriov.h"
  28 #include "hw/hotplug.h"
  29
  30 typedef enum {
  31     /* these bits must match the bits in Slot Control/Status registers.
  32      * PCI_EXP_HP_EV_xxx = PCI_EXP_SLTCTL_xxxE = PCI_EXP_SLTSTA_xxx
  33      *
  34      * Not all the bits of slot control register match with the ones of
  35      * slot status. Not some bits of slot status register is used to
  36      * show status, not to report event occurrence.
  37      * So such bits must be masked out when checking the software
  38      * notification condition.
  39      */
  40     PCI_EXP_HP_EV_ABP           = PCI_EXP_SLTCTL_ABPE,
  41                                         /* attention button pressed */
  42     PCI_EXP_HP_EV_PDC           = PCI_EXP_SLTCTL_PDCE,
  43                                         /* presence detect changed */
  44     PCI_EXP_HP_EV_CCI           = PCI_EXP_SLTCTL_CCIE,
  45                                         /* command completed */
  46
  47     PCI_EXP_HP_EV_SUPPORTED     = PCI_EXP_HP_EV_ABP |
  48                                   PCI_EXP_HP_EV_PDC |
  49                                   PCI_EXP_HP_EV_CCI,
  50                                                 /* supported event mask  */
  51
  52     /* events not listed aren't supported */
  53 } PCIExpressHotPlugEvent;
  54
  55 struct PCIExpressDevice {
  56     /* Offset of express capability in config space */
  57     uint8_t exp_cap;
  58     /* Offset of Power Management capability in config space */
  59     uint8_t pm_cap;
  60
  61     /* SLOT */
  62     bool hpev_notified; /* Logical AND of conditions for hot plug event.
  63                          Following 6.7.3.4:
  64                          Software Notification of Hot-Plug Events, an interrupt
  65                          is sent whenever the logical and of these conditions
  66                          transitions from false to true. */
  67
  68     /* AER */
  69     uint16_t aer_cap;
  70     PCIEAERLog aer_log;
  71
  72     /* Offset of ATS capability in config space */
  73     uint16_t ats_cap;
  74
  75     /* ACS */
  76     uint16_t acs_cap;
  77
  78     /* SR/IOV */
  79     uint16_t sriov_cap;
  80     PCIESriovPF sriov_pf;
  81     PCIESriovVF sriov_vf;
  82 };
  83
  84 #define COMPAT_PROP_PCP "power_controller_present"
  85
  86 /* PCI express capability helper functions */
  87 int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type,
  88                   uint8_t port, Error **errp);
  89 int pcie_cap_v1_init(PCIDevice *dev, uint8_t offset,
  90                      uint8_t type, uint8_t port);
  91 int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset);
  92 void pcie_cap_exit(PCIDevice *dev);
  93 int pcie_endpoint_cap_v1_init(PCIDevice *dev, uint8_t offset);
  94 void pcie_cap_v1_exit(PCIDevice *dev);
  95 uint8_t pcie_cap_get_type(const PCIDevice *dev);
  96 uint8_t pcie_cap_get_version(const PCIDevice *dev);
  97 void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector);
  98 uint8_t pcie_cap_flags_get_vector(PCIDevice *dev);
  99
 100 void pcie_cap_deverr_init(PCIDevice *dev);
 101 void pcie_cap_deverr_reset(PCIDevice *dev);
 102
 103 void pcie_cap_lnkctl_init(PCIDevice *dev);
 104 void pcie_cap_lnkctl_reset(PCIDevice *dev);
 105
 106 void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s);
 107 void pcie_cap_slot_reset(PCIDevice *dev);
 108 void pcie_cap_slot_get(PCIDevice *dev, uint16_t *slt_ctl, uint16_t *slt_sta);
 109 void pcie_cap_slot_write_config(PCIDevice *dev,
 110                                 uint16_t old_slt_ctl, uint16_t old_slt_sta,
 111                                 uint32_t addr, uint32_t val, int len);
 112 int pcie_cap_slot_post_load(void *opaque, int version_id);
 113 void pcie_cap_slot_push_attention_button(PCIDevice *dev);
 114 void pcie_cap_slot_enable_power(PCIDevice *dev);
 115
 116 void pcie_cap_root_init(PCIDevice *dev);
 117 void pcie_cap_root_reset(PCIDevice *dev);
 118
 119 void pcie_cap_flr_init(PCIDevice *dev);
 120 void pcie_cap_flr_write_config(PCIDevice *dev,
 121                            uint32_t addr, uint32_t val, int len);
 122
 123 /* ARI forwarding capability and control */
 124 void pcie_cap_arifwd_init(PCIDevice *dev);
 125 void pcie_cap_arifwd_reset(PCIDevice *dev);
 126 bool pcie_cap_is_arifwd_enabled(const PCIDevice *dev);
 127
 128 /* PCI express extended capability helper functions */
 129 uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);
 130 void pcie_add_capability(PCIDevice *dev,
 131                          uint16_t cap_id, uint8_t cap_ver,
 132                          uint16_t offset, uint16_t size);
 133 void pcie_sync_bridge_lnk(PCIDevice *dev);
 134
 135 void pcie_acs_init(PCIDevice *dev, uint16_t offset);
 136 void pcie_acs_reset(PCIDevice *dev);
 137
 138 void pcie_ari_init(PCIDevice *dev, uint16_t offset);
 139 void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num);
 140 void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned);
 141
 142 void pcie_cap_slot_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 143                                Error **errp);
 144 void pcie_cap_slot_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 145                            Error **errp);
 146 void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 147                              Error **errp);
 148 void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
 149                                      DeviceState *dev, Error **errp);
 150 #endif /* QEMU_PCIE_H */