Merge tag 'v9.0.0-rc3'
[qemu/ar7.git] / include / hw / pci-host / gpex.h
blobdce883573ba24c2ebcf68271b6f788624415942b
1 /*
2 * QEMU Generic PCI Express Bridge Emulation
4 * Copyright (C) 2015 Alexander Graf <agraf@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>
20 #ifndef HW_GPEX_H
21 #define HW_GPEX_H
23 #include "exec/hwaddr.h"
24 #include "hw/sysbus.h"
25 #include "hw/pci/pci_device.h"
26 #include "hw/pci/pcie_host.h"
27 #include "qom/object.h"
29 #define TYPE_GPEX_HOST "gpex-pcihost"
30 OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
32 #define TYPE_GPEX_ROOT_DEVICE "gpex-root"
33 OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
35 #define GPEX_NUM_IRQS 4
37 struct GPEXRootState {
38 /*< private >*/
39 PCIDevice parent_obj;
40 /*< public >*/
43 struct GPEXConfig {
44 MemMapEntry ecam;
45 MemMapEntry mmio32;
46 MemMapEntry mmio64;
47 MemMapEntry pio;
48 int irq;
49 PCIBus *bus;
52 struct GPEXHost {
53 /*< private >*/
54 PCIExpressHost parent_obj;
55 /*< public >*/
57 GPEXRootState gpex_root;
59 MemoryRegion io_ioport;
60 MemoryRegion io_mmio;
61 MemoryRegion io_ioport_window;
62 MemoryRegion io_mmio_window;
63 qemu_irq irq[GPEX_NUM_IRQS];
64 int irq_num[GPEX_NUM_IRQS];
66 bool allow_unmapped_accesses;
68 struct GPEXConfig gpex_cfg;
71 int gpex_set_irq_num(GPEXHost *s, int index, int gsi);
73 void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg);
74 void acpi_dsdt_add_gpex_host(Aml *scope, uint32_t irq);
76 #define PCI_HOST_PIO_BASE "x-pio-base"
77 #define PCI_HOST_PIO_SIZE "x-pio-size"
78 #define PCI_HOST_ECAM_BASE "x-ecam-base"
79 #define PCI_HOST_ECAM_SIZE "x-ecam-size"
80 #define PCI_HOST_BELOW_4G_MMIO_BASE "x-below-4g-mmio-base"
81 #define PCI_HOST_BELOW_4G_MMIO_SIZE "x-below-4g-mmio-size"
82 #define PCI_HOST_ABOVE_4G_MMIO_BASE "x-above-4g-mmio-base"
83 #define PCI_HOST_ABOVE_4G_MMIO_SIZE "x-above-4g-mmio-size"
85 #endif /* HW_GPEX_H */