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HEAD
Merge tag 'v9.0.0-rc3'
[qemu/ar7.git]
/
hw
/
riscv
/
Kconfig
blob
5d644eb7b16a486fc1beec37e5c0fd1d13415932
1
config RISCV_NUMA
2
bool
3
4
config IBEX
5
bool
6
7
# RISC-V machines in alphabetical order
8
9
config MICROCHIP_PFSOC
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bool
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select CADENCE_SDHCI
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select MCHP_PFSOC_DMC
13
select MCHP_PFSOC_IOSCB
14
select MCHP_PFSOC_MMUART
15
select MCHP_PFSOC_SYSREG
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select RISCV_ACLINT
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select UNIMP
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config OPENTITAN
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bool
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select IBEX
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select SIFIVE_PLIC
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select UNIMP
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27
config RISCV_VIRT
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bool
29
imply PCI_DEVICES
30
imply VIRTIO_VGA
31
imply TEST_DEVICES
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imply TPM_TIS_SYSBUS
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select RISCV_NUMA
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select GOLDFISH_RTC
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select PCI
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select PCI_EXPRESS_GENERIC_BRIDGE
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select PFLASH_CFI01
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select SERIAL
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select RISCV_ACLINT
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select RISCV_APLIC
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select RISCV_IMSIC
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select SIFIVE_PLIC
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select SIFIVE_TEST
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select SMBIOS
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select VIRTIO_MMIO
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select FW_CFG_DMA
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select PLATFORM_BUS
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select ACPI
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select ACPI_PCI
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config SHAKTI_C
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bool
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select RISCV_ACLINT
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select SHAKTI_UART
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select SIFIVE_PLIC
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select UNIMP
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config SIFIVE_E
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bool
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select RISCV_ACLINT
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select SIFIVE_GPIO
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select SIFIVE_PLIC
63
select SIFIVE_UART
64
select SIFIVE_E_PRCI
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select SIFIVE_E_AON
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select UNIMP
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config SIFIVE_U
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bool
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select CADENCE
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select RISCV_ACLINT
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select SIFIVE_GPIO
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select SIFIVE_SPI
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select SIFIVE_UART
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select SIFIVE_U_OTP
78
select SIFIVE_U_PRCI
79
select SIFIVE_PWM
80
select SSI_M25P80
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select SSI_SD
82
select UNIMP
83
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config SPIKE
85
bool
86
select RISCV_NUMA
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select HTIF
88
select RISCV_ACLINT
89
select SIFIVE_PLIC